adulau/aha
1
0
Fork 0
mirror of https://github.com/adulau/aha.git synced 2024-12-29 04:06:22 +00:00
Code Issues Projects Releases Packages Wiki Activity

[PATCH] ppc64: cleanup iseries runlight support

Browse source 
The iseries has a bar graph on the front panel that shows how busy it is.
The operating system sets and clears a bit in the CTRL register to control
it.

Instead of going to the complexity of using a thread info bit, just set and
clear it in the idle loop.

Also create two helper functions, ppc64_runlatch_on and ppc64_runlatch_off.

Finally don't use the short form of the SPR defines.

Signed-off-by: Anton Blanchard <anton@samba.org>
Acked-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Anton Blanchard 2005-06-02 14:02:02 -07:00 committed by Linus Torvalds
parent 79f1248962
commit 6dc2f0c7df
7 changed files with 33 additions and 36 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

9
arch/ppc64/kernel/entry.S
View file

@ -436,15 +436,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
REST_8GPRS(14, r1)
REST_10GPRS(22, r1)
#ifdef CONFIG_PPC_ISERIES
clrrdi r7,r1,THREAD_SHIFT /* get current_thread_info() */
ld r7,TI_FLAGS(r7) /* Get run light flag */
mfspr r9,CTRLF
srdi r7,r7,TIF_RUN_LIGHT
insrdi r9,r7,1,63 /* Insert run light into CTRL */
mtspr CTRLT,r9
#endif
/* convert old thread to its task_struct for return value */
addi r3,r3,-THREAD
ld r7,_NIP(r1) /* Return to _switch caller in new task */

10
arch/ppc64/kernel/head.S
View file

@ -626,10 +626,10 @@ system_reset_iSeries:
lhz r24,PACAPACAINDEX(r13) /* Get processor # */
cmpwi 0,r24,0 /* Are we processor 0? */
beq .__start_initialization_iSeries /* Start up the first processor */
mfspr r4,CTRLF
li r5,RUNLATCH /* Turn off the run light */
mfspr r4,SPRN_CTRLF
li r5,CTRL_RUNLATCH /* Turn off the run light */
andc r4,r4,r5
mtspr CTRLT,r4
mtspr SPRN_CTRLT,r4
1:
HMT_LOW
@ -2082,9 +2082,9 @@ _GLOBAL(hmt_start_secondary)
mfspr r4, HID0
ori r4, r4, 0x1
mtspr HID0, r4
mfspr r4, CTRLF
mfspr r4, SPRN_CTRLF
oris r4, r4, 0x40
mtspr CTRLT, r4
mtspr SPRN_CTRLT, r4
blr
#endif

8
arch/ppc64/kernel/idle.c
View file

@ -75,13 +75,9 @@ static int iSeries_idle(void)
{
struct paca_struct *lpaca;
long oldval;
unsigned long CTRL;
/* ensure iSeries run light will be out when idle */
clear_thread_flag(TIF_RUN_LIGHT);
CTRL = mfspr(CTRLF);
CTRL &= ~RUNLATCH;
mtspr(CTRLT, CTRL);
ppc64_runlatch_off();
lpaca = get_paca();
@ -111,7 +107,9 @@ static int iSeries_idle(void)
}
}
ppc64_runlatch_on();
schedule();
ppc64_runlatch_off();
}
return 0;

3
arch/ppc64/kernel/process.c
View file

@ -378,9 +378,6 @@ copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
childregs->gpr[1] = sp + sizeof(struct pt_regs);
p->thread.regs = NULL; /* no user register state */
clear_ti_thread_flag(p->thread_info, TIF_32BIT);
#ifdef CONFIG_PPC_ISERIES
set_ti_thread_flag(p->thread_info, TIF_RUN_LIGHT);
#endif
} else {
childregs->gpr[1] = usp;
p->thread.regs = childregs;

8
arch/ppc64/kernel/sysfs.c
View file

@ -113,7 +113,6 @@ void ppc64_enable_pmcs(void)
#ifdef CONFIG_PPC_PSERIES
unsigned long set, reset;
int ret;
unsigned int ctrl;
#endif /* CONFIG_PPC_PSERIES */
/* Only need to enable them once */
@ -167,11 +166,8 @@ void ppc64_enable_pmcs(void)
* On SMT machines we have to set the run latch in the ctrl register
* in order to make PMC6 spin.
*/
if (cpu_has_feature(CPU_FTR_SMT)) {
ctrl = mfspr(CTRLF);
ctrl |= RUNLATCH;
mtspr(CTRLT, ctrl);
}
if (cpu_has_feature(CPU_FTR_SMT))
ppc64_runlatch_on();
#endif /* CONFIG_PPC_PSERIES */
}

27
include/asm-ppc64/processor.h
View file

@ -164,6 +164,9 @@
#define SPRN_USIA 0x3AB /* User Sampled Instruction Address Register */
#define SPRN_XER 0x001 /* Fixed Point Exception Register */
#define SPRN_VRSAVE 0x100 /* Vector save */
#define SPRN_CTRLF 0x088
#define SPRN_CTRLT 0x098
#define CTRL_RUNLATCH 0x1
/* Performance monitor SPRs */
#define SPRN_SIAR 780
@ -279,12 +282,6 @@
#define XGLUE(a,b) a##b
#define GLUE(a,b) XGLUE(a,b)
/* iSeries CTRL register (for runlatch) */
#define CTRLT 0x098
#define CTRLF 0x088
#define RUNLATCH 0x0001
#ifdef __ASSEMBLY__
#define _GLOBAL(name) \
@ -499,6 +496,24 @@ static inline void prefetchw(const void *x)
#define HAVE_ARCH_PICK_MMAP_LAYOUT
static inline void ppc64_runlatch_on(void)
{
unsigned long ctrl;
ctrl = mfspr(SPRN_CTRLF);
ctrl |= CTRL_RUNLATCH;
mtspr(SPRN_CTRLT, ctrl);
}
static inline void ppc64_runlatch_off(void)
{
unsigned long ctrl;
ctrl = mfspr(SPRN_CTRLF);
ctrl &= ~CTRL_RUNLATCH;
mtspr(SPRN_CTRLT, ctrl);
}
#endif /* __KERNEL__ */
#endif /* __ASSEMBLY__ */

4
include/asm-ppc64/thread_info.h
View file

@ -96,7 +96,7 @@ static inline struct thread_info *current_thread_info(void)
#define TIF_POLLING_NRFLAG 4 /* true if poll_idle() is polling
TIF_NEED_RESCHED */
#define TIF_32BIT 5 /* 32 bit binary */
#define TIF_RUN_LIGHT 6 /* iSeries run light */
/* #define SPARE 6 */
#define TIF_ABI_PENDING 7 /* 32/64 bit switch needed */
#define TIF_SYSCALL_AUDIT 8 /* syscall auditing active */
#define TIF_SINGLESTEP 9 /* singlestepping active */
@ -110,7 +110,7 @@ static inline struct thread_info *current_thread_info(void)
#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
#define _TIF_32BIT (1<<TIF_32BIT)
#define _TIF_RUN_LIGHT (1<<TIF_RUN_LIGHT)
/* #define _SPARE (1<<SPARE) */
#define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING)
#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)