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Background:
The MCE handler has several paths that it can take, depending on various
conditions of the MCE status and the value of the 'tolerant' knob. The
exact semantics are not well defined and the code is a bit twisty.
Description:
This patch makes the MCE handler's behavior more clear by documenting the
behavior for various 'tolerant' levels. It also fixes or enhances
several small things in the handler. Specifically:
* If RIPV is set it is not safe to restart, so set the 'no way out'
flag rather than the 'kill it' flag.
* Don't panic() on correctable MCEs.
* If the _OVER bit is set *and* the _UC bit is set (meaning possibly
dropped uncorrected errors), set the 'no way out' flag.
* Use EIPV for testing whether an app can be killed (SIGBUS) rather
than RIPV. According to docs, EIPV indicates that the error is
related to the IP, while RIPV simply means the IP is valid to
restart from.
* Don't clear the MCi_STATUS registers until after the panic() path.
This leaves the status bits set after the panic() so clever BIOSes
can find them (and dumb BIOSes can do nothing).
This patch also calls nonseekable_open() in mce_open (as suggested by akpm).
Result:
Tolerant levels behave almost identically to how they always have, but
not it's well defined. There's a slightly higher chance of panic()ing
when multiple errors happen (a good thing, IMHO). If you take an MBE and
panic(), the error status bits are not cleared.
Alternatives:
None.
Testing:
I used software to inject correctable and uncorrectable errors. With
tolerant = 3, the system usually survives. With tolerant = 2, the system
usually panic()s (PCC) but not always. With tolerant = 1, the system
always panic()s. When the system panic()s, the BIOS is able to detect
that the cause of death was an MC4. I was not able to reproduce the
case of a non-PCC error in userspace, with EIPV, with (tolerant < 3).
That will be rare at best.
Signed-off-by: Tim Hockin <thockin@google.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
77 lines
3 KiB
Text
77 lines
3 KiB
Text
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Configurable sysfs parameters for the x86-64 machine check code.
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Machine checks report internal hardware error conditions detected
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by the CPU. Uncorrected errors typically cause a machine check
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(often with panic), corrected ones cause a machine check log entry.
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Machine checks are organized in banks (normally associated with
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a hardware subsystem) and subevents in a bank. The exact meaning
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of the banks and subevent is CPU specific.
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mcelog knows how to decode them.
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When you see the "Machine check errors logged" message in the system
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log then mcelog should run to collect and decode machine check entries
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from /dev/mcelog. Normally mcelog should be run regularly from a cronjob.
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Each CPU has a directory in /sys/devices/system/machinecheck/machinecheckN
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(N = CPU number)
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The directory contains some configurable entries:
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Entries:
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bankNctl
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(N bank number)
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64bit Hex bitmask enabling/disabling specific subevents for bank N
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When a bit in the bitmask is zero then the respective
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subevent will not be reported.
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By default all events are enabled.
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Note that BIOS maintain another mask to disable specific events
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per bank. This is not visible here
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The following entries appear for each CPU, but they are truly shared
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between all CPUs.
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check_interval
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How often to poll for corrected machine check errors, in seconds
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(Note output is hexademical). Default 5 minutes. When the poller
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finds MCEs it triggers an exponential speedup (poll more often) on
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the polling interval. When the poller stops finding MCEs, it
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triggers an exponential backoff (poll less often) on the polling
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interval. The check_interval variable is both the initial and
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maximum polling interval.
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tolerant
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Tolerance level. When a machine check exception occurs for a non
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corrected machine check the kernel can take different actions.
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Since machine check exceptions can happen any time it is sometimes
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risky for the kernel to kill a process because it defies
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normal kernel locking rules. The tolerance level configures
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how hard the kernel tries to recover even at some risk of
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deadlock. Higher tolerant values trade potentially better uptime
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with the risk of a crash or even corruption (for tolerant >= 3).
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0: always panic on uncorrected errors, log corrected errors
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1: panic or SIGBUS on uncorrected errors, log corrected errors
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2: SIGBUS or log uncorrected errors, log corrected errors
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3: never panic or SIGBUS, log all errors (for testing only)
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Default: 1
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Note this only makes a difference if the CPU allows recovery
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from a machine check exception. Current x86 CPUs generally do not.
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trigger
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Program to run when a machine check event is detected.
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This is an alternative to running mcelog regularly from cron
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and allows to detect events faster.
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TBD document entries for AMD threshold interrupt configuration
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For more details about the x86 machine check architecture
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see the Intel and AMD architecture manuals from their developer websites.
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For more details about the architecture see
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see http://one.firstfloor.org/~andi/mce.pdf
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