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b00dc83764
This patch removes the CVS keywords that weren't updated for a long time from comments. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
217 lines
5.4 KiB
C
217 lines
5.4 KiB
C
#ifndef __ASM_SPARC64_ELF_H
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#define __ASM_SPARC64_ELF_H
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/*
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* ELF register definitions..
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*/
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#include <asm/ptrace.h>
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#include <asm/processor.h>
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#include <asm/uaccess.h>
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#include <asm/spitfire.h>
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/*
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* Sparc section types
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*/
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#define STT_REGISTER 13
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/*
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* Sparc ELF relocation types
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*/
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#define R_SPARC_NONE 0
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#define R_SPARC_8 1
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#define R_SPARC_16 2
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#define R_SPARC_32 3
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#define R_SPARC_DISP8 4
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#define R_SPARC_DISP16 5
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#define R_SPARC_DISP32 6
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#define R_SPARC_WDISP30 7
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#define R_SPARC_WDISP22 8
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#define R_SPARC_HI22 9
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#define R_SPARC_22 10
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#define R_SPARC_13 11
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#define R_SPARC_LO10 12
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#define R_SPARC_GOT10 13
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#define R_SPARC_GOT13 14
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#define R_SPARC_GOT22 15
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#define R_SPARC_PC10 16
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#define R_SPARC_PC22 17
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#define R_SPARC_WPLT30 18
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#define R_SPARC_COPY 19
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#define R_SPARC_GLOB_DAT 20
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#define R_SPARC_JMP_SLOT 21
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#define R_SPARC_RELATIVE 22
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#define R_SPARC_UA32 23
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#define R_SPARC_PLT32 24
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#define R_SPARC_HIPLT22 25
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#define R_SPARC_LOPLT10 26
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#define R_SPARC_PCPLT32 27
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#define R_SPARC_PCPLT22 28
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#define R_SPARC_PCPLT10 29
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#define R_SPARC_10 30
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#define R_SPARC_11 31
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#define R_SPARC_64 32
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#define R_SPARC_OLO10 33
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#define R_SPARC_WDISP16 40
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#define R_SPARC_WDISP19 41
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#define R_SPARC_7 43
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#define R_SPARC_5 44
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#define R_SPARC_6 45
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/* Bits present in AT_HWCAP, primarily for Sparc32. */
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#define HWCAP_SPARC_FLUSH 1 /* CPU supports flush instruction. */
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#define HWCAP_SPARC_STBAR 2
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#define HWCAP_SPARC_SWAP 4
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#define HWCAP_SPARC_MULDIV 8
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#define HWCAP_SPARC_V9 16
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#define HWCAP_SPARC_ULTRA3 32
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#define HWCAP_SPARC_BLKINIT 64
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#define HWCAP_SPARC_N2 128
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#define CORE_DUMP_USE_REGSET
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/*
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* These are used to set parameters in the core dumps.
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*/
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#define ELF_ARCH EM_SPARCV9
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#define ELF_CLASS ELFCLASS64
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#define ELF_DATA ELFDATA2MSB
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/* Format of 64-bit elf_gregset_t is:
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* G0 --> G7
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* O0 --> O7
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* L0 --> L7
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* I0 --> I7
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* TSTATE
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* TPC
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* TNPC
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* Y
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*/
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typedef unsigned long elf_greg_t;
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#define ELF_NGREG 36
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typedef elf_greg_t elf_gregset_t[ELF_NGREG];
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typedef struct {
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unsigned long pr_regs[32];
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unsigned long pr_fsr;
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unsigned long pr_gsr;
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unsigned long pr_fprs;
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} elf_fpregset_t;
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/* Format of 32-bit elf_gregset_t is:
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* G0 --> G7
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* O0 --> O7
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* L0 --> L7
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* I0 --> I7
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* PSR, PC, nPC, Y, WIM, TBR
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*/
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typedef unsigned int compat_elf_greg_t;
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#define COMPAT_ELF_NGREG 38
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typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG];
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typedef struct {
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union {
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unsigned int pr_regs[32];
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unsigned long pr_dregs[16];
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} pr_fr;
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unsigned int __unused;
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unsigned int pr_fsr;
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unsigned char pr_qcnt;
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unsigned char pr_q_entrysize;
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unsigned char pr_en;
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unsigned int pr_q[64];
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} compat_elf_fpregset_t;
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/* UltraSparc extensions. Still unused, but will be eventually. */
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typedef struct {
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unsigned int pr_type;
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unsigned int pr_align;
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union {
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struct {
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union {
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unsigned int pr_regs[32];
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unsigned long pr_dregs[16];
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long double pr_qregs[8];
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} pr_xfr;
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} pr_v8p;
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unsigned int pr_xfsr;
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unsigned int pr_fprs;
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unsigned int pr_xg[8];
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unsigned int pr_xo[8];
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unsigned long pr_tstate;
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unsigned int pr_filler[8];
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} pr_un;
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} elf_xregset_t;
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/*
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* This is used to ensure we don't load something for the wrong architecture.
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*/
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#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
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#define compat_elf_check_arch(x) ((x)->e_machine == EM_SPARC || \
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(x)->e_machine == EM_SPARC32PLUS)
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#define compat_start_thread start_thread32
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#define USE_ELF_CORE_DUMP
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#define ELF_EXEC_PAGESIZE PAGE_SIZE
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/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
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use of this is to invoke "./ld.so someprog" to test out a new version of
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the loader. We need to make sure that it is out of the way of the program
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that it will "exec", and that there is sufficient room for the brk. */
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#define ELF_ET_DYN_BASE 0x0000010000000000UL
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#define COMPAT_ELF_ET_DYN_BASE 0x0000000070000000UL
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/* This yields a mask that user programs can use to figure out what
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instruction set this cpu supports. */
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/* On Ultra, we support all of the v8 capabilities. */
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static inline unsigned int sparc64_elf_hwcap(void)
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{
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unsigned int cap = (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR |
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HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV |
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HWCAP_SPARC_V9);
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if (tlb_type == cheetah || tlb_type == cheetah_plus)
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cap |= HWCAP_SPARC_ULTRA3;
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else if (tlb_type == hypervisor) {
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if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 ||
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sun4v_chip_type == SUN4V_CHIP_NIAGARA2)
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cap |= HWCAP_SPARC_BLKINIT;
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if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2)
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cap |= HWCAP_SPARC_N2;
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}
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return cap;
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}
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#define ELF_HWCAP sparc64_elf_hwcap();
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/* This yields a string that ld.so will use to load implementation
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specific libraries for optimization. This is more specific in
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intent than poking at uname or /proc/cpuinfo. */
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#define ELF_PLATFORM (NULL)
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#define SET_PERSONALITY(ex, ibcs2) \
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do { unsigned long new_flags = current_thread_info()->flags; \
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new_flags &= _TIF_32BIT; \
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if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
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new_flags |= _TIF_32BIT; \
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else \
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new_flags &= ~_TIF_32BIT; \
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if ((current_thread_info()->flags & _TIF_32BIT) \
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!= new_flags) \
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set_thread_flag(TIF_ABI_PENDING); \
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else \
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clear_thread_flag(TIF_ABI_PENDING); \
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/* flush_thread will update pgd cache */ \
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if (ibcs2) \
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set_personality(PER_SVR4); \
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else if (current->personality != PER_LINUX32) \
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set_personality(PER_LINUX); \
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} while (0)
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#endif /* !(__ASM_SPARC64_ELF_H) */
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