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https://github.com/adulau/aha.git
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e0a3389ab9
In preparation for refactoring - it's over 700 lines of well-isolated code and having it in a file by itself makes things more managable. While we're at it make sure that we clean up the IRQ if we fail after acquiring it on init. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
804 lines
27 KiB
C
804 lines
27 KiB
C
/*
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* wm8350-irq.c -- IRQ support for Wolfson WM8350
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*
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* Copyright 2007, 2008, 2009 Wolfson Microelectronics PLC.
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*
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* Author: Liam Girdwood, Mark Brown
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/bug.h>
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/workqueue.h>
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#include <linux/mfd/wm8350/core.h>
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#include <linux/mfd/wm8350/audio.h>
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#include <linux/mfd/wm8350/comparator.h>
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#include <linux/mfd/wm8350/gpio.h>
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#include <linux/mfd/wm8350/pmic.h>
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#include <linux/mfd/wm8350/rtc.h>
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#include <linux/mfd/wm8350/supply.h>
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#include <linux/mfd/wm8350/wdt.h>
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static void wm8350_irq_call_handler(struct wm8350 *wm8350, int irq)
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{
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mutex_lock(&wm8350->irq_mutex);
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if (wm8350->irq[irq].handler)
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wm8350->irq[irq].handler(wm8350, irq, wm8350->irq[irq].data);
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else {
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dev_err(wm8350->dev, "irq %d nobody cared. now masked.\n",
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irq);
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wm8350_mask_irq(wm8350, irq);
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}
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mutex_unlock(&wm8350->irq_mutex);
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}
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/*
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* This is a threaded IRQ handler so can access I2C/SPI. Since all
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* interrupts are clear on read the IRQ line will be reasserted and
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* the physical IRQ will be handled again if another interrupt is
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* asserted while we run - in the normal course of events this is a
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* rare occurrence so we save I2C/SPI reads.
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*/
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static irqreturn_t wm8350_irq(int irq, void *data)
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{
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struct wm8350 *wm8350 = data;
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u16 level_one, status1, status2, comp;
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/* TODO: Use block reads to improve performance? */
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level_one = wm8350_reg_read(wm8350, WM8350_SYSTEM_INTERRUPTS)
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& ~wm8350_reg_read(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK);
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status1 = wm8350_reg_read(wm8350, WM8350_INT_STATUS_1)
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& ~wm8350_reg_read(wm8350, WM8350_INT_STATUS_1_MASK);
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status2 = wm8350_reg_read(wm8350, WM8350_INT_STATUS_2)
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& ~wm8350_reg_read(wm8350, WM8350_INT_STATUS_2_MASK);
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comp = wm8350_reg_read(wm8350, WM8350_COMPARATOR_INT_STATUS)
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& ~wm8350_reg_read(wm8350, WM8350_COMPARATOR_INT_STATUS_MASK);
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/* over current */
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if (level_one & WM8350_OC_INT) {
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u16 oc;
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oc = wm8350_reg_read(wm8350, WM8350_OVER_CURRENT_INT_STATUS);
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oc &= ~wm8350_reg_read(wm8350,
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WM8350_OVER_CURRENT_INT_STATUS_MASK);
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if (oc & WM8350_OC_LS_EINT) /* limit switch */
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_OC_LS);
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}
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/* under voltage */
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if (level_one & WM8350_UV_INT) {
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u16 uv;
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uv = wm8350_reg_read(wm8350, WM8350_UNDER_VOLTAGE_INT_STATUS);
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uv &= ~wm8350_reg_read(wm8350,
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WM8350_UNDER_VOLTAGE_INT_STATUS_MASK);
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if (uv & WM8350_UV_DC1_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC1);
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if (uv & WM8350_UV_DC2_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC2);
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if (uv & WM8350_UV_DC3_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC3);
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if (uv & WM8350_UV_DC4_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC4);
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if (uv & WM8350_UV_DC5_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC5);
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if (uv & WM8350_UV_DC6_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_DC6);
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if (uv & WM8350_UV_LDO1_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_LDO1);
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if (uv & WM8350_UV_LDO2_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_LDO2);
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if (uv & WM8350_UV_LDO3_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_LDO3);
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if (uv & WM8350_UV_LDO4_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_UV_LDO4);
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}
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/* charger, RTC */
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if (status1) {
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if (status1 & WM8350_CHG_BAT_HOT_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_CHG_BAT_HOT);
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if (status1 & WM8350_CHG_BAT_COLD_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_CHG_BAT_COLD);
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if (status1 & WM8350_CHG_BAT_FAIL_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_CHG_BAT_FAIL);
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if (status1 & WM8350_CHG_TO_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_CHG_TO);
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if (status1 & WM8350_CHG_END_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_CHG_END);
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if (status1 & WM8350_CHG_START_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_CHG_START);
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if (status1 & WM8350_CHG_FAST_RDY_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_CHG_FAST_RDY);
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if (status1 & WM8350_CHG_VBATT_LT_3P9_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_CHG_VBATT_LT_3P9);
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if (status1 & WM8350_CHG_VBATT_LT_3P1_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_CHG_VBATT_LT_3P1);
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if (status1 & WM8350_CHG_VBATT_LT_2P85_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_CHG_VBATT_LT_2P85);
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if (status1 & WM8350_RTC_ALM_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_RTC_ALM);
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if (status1 & WM8350_RTC_SEC_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_RTC_SEC);
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if (status1 & WM8350_RTC_PER_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_RTC_PER);
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}
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/* current sink, system, aux adc */
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if (status2) {
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if (status2 & WM8350_CS1_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_CS1);
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if (status2 & WM8350_CS2_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_CS2);
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if (status2 & WM8350_SYS_HYST_COMP_FAIL_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_SYS_HYST_COMP_FAIL);
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if (status2 & WM8350_SYS_CHIP_GT115_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_SYS_CHIP_GT115);
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if (status2 & WM8350_SYS_CHIP_GT140_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_SYS_CHIP_GT140);
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if (status2 & WM8350_SYS_WDOG_TO_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_SYS_WDOG_TO);
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if (status2 & WM8350_AUXADC_DATARDY_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_AUXADC_DATARDY);
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if (status2 & WM8350_AUXADC_DCOMP4_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_AUXADC_DCOMP4);
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if (status2 & WM8350_AUXADC_DCOMP3_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_AUXADC_DCOMP3);
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if (status2 & WM8350_AUXADC_DCOMP2_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_AUXADC_DCOMP2);
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if (status2 & WM8350_AUXADC_DCOMP1_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_AUXADC_DCOMP1);
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if (status2 & WM8350_USB_LIMIT_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_USB_LIMIT);
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}
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/* wake, codec, ext */
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if (comp) {
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if (comp & WM8350_WKUP_OFF_STATE_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_WKUP_OFF_STATE);
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if (comp & WM8350_WKUP_HIB_STATE_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_WKUP_HIB_STATE);
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if (comp & WM8350_WKUP_CONV_FAULT_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_WKUP_CONV_FAULT);
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if (comp & WM8350_WKUP_WDOG_RST_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_WKUP_WDOG_RST);
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if (comp & WM8350_WKUP_GP_PWR_ON_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_WKUP_GP_PWR_ON);
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if (comp & WM8350_WKUP_ONKEY_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_WKUP_ONKEY);
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if (comp & WM8350_WKUP_GP_WAKEUP_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_WKUP_GP_WAKEUP);
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if (comp & WM8350_CODEC_JCK_DET_L_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_CODEC_JCK_DET_L);
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if (comp & WM8350_CODEC_JCK_DET_R_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_CODEC_JCK_DET_R);
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if (comp & WM8350_CODEC_MICSCD_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_CODEC_MICSCD);
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if (comp & WM8350_CODEC_MICD_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_CODEC_MICD);
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if (comp & WM8350_EXT_USB_FB_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_EXT_USB_FB);
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if (comp & WM8350_EXT_WALL_FB_EINT)
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_EXT_WALL_FB);
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if (comp & WM8350_EXT_BAT_FB_EINT)
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wm8350_irq_call_handler(wm8350, WM8350_IRQ_EXT_BAT_FB);
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}
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if (level_one & WM8350_GP_INT) {
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int i;
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u16 gpio;
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gpio = wm8350_reg_read(wm8350, WM8350_GPIO_INT_STATUS);
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gpio &= ~wm8350_reg_read(wm8350,
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WM8350_GPIO_INT_STATUS_MASK);
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for (i = 0; i < 12; i++) {
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if (gpio & (1 << i))
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wm8350_irq_call_handler(wm8350,
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WM8350_IRQ_GPIO(i));
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}
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}
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return IRQ_HANDLED;
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}
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int wm8350_register_irq(struct wm8350 *wm8350, int irq,
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void (*handler) (struct wm8350 *, int, void *),
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void *data)
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{
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if (irq < 0 || irq > WM8350_NUM_IRQ || !handler)
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return -EINVAL;
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if (wm8350->irq[irq].handler)
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return -EBUSY;
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mutex_lock(&wm8350->irq_mutex);
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wm8350->irq[irq].handler = handler;
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wm8350->irq[irq].data = data;
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mutex_unlock(&wm8350->irq_mutex);
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return 0;
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}
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EXPORT_SYMBOL_GPL(wm8350_register_irq);
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int wm8350_free_irq(struct wm8350 *wm8350, int irq)
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{
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if (irq < 0 || irq > WM8350_NUM_IRQ)
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return -EINVAL;
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mutex_lock(&wm8350->irq_mutex);
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wm8350->irq[irq].handler = NULL;
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mutex_unlock(&wm8350->irq_mutex);
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return 0;
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}
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EXPORT_SYMBOL_GPL(wm8350_free_irq);
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int wm8350_mask_irq(struct wm8350 *wm8350, int irq)
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{
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switch (irq) {
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case WM8350_IRQ_CHG_BAT_HOT:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
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WM8350_IM_CHG_BAT_HOT_EINT);
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case WM8350_IRQ_CHG_BAT_COLD:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
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WM8350_IM_CHG_BAT_COLD_EINT);
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case WM8350_IRQ_CHG_BAT_FAIL:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
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WM8350_IM_CHG_BAT_FAIL_EINT);
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case WM8350_IRQ_CHG_TO:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
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WM8350_IM_CHG_TO_EINT);
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case WM8350_IRQ_CHG_END:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
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WM8350_IM_CHG_END_EINT);
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case WM8350_IRQ_CHG_START:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
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WM8350_IM_CHG_START_EINT);
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case WM8350_IRQ_CHG_FAST_RDY:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
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WM8350_IM_CHG_FAST_RDY_EINT);
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case WM8350_IRQ_RTC_PER:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
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WM8350_IM_RTC_PER_EINT);
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case WM8350_IRQ_RTC_SEC:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
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WM8350_IM_RTC_SEC_EINT);
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case WM8350_IRQ_RTC_ALM:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
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WM8350_IM_RTC_ALM_EINT);
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case WM8350_IRQ_CHG_VBATT_LT_3P9:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
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WM8350_IM_CHG_VBATT_LT_3P9_EINT);
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case WM8350_IRQ_CHG_VBATT_LT_3P1:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
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WM8350_IM_CHG_VBATT_LT_3P1_EINT);
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case WM8350_IRQ_CHG_VBATT_LT_2P85:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_1_MASK,
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WM8350_IM_CHG_VBATT_LT_2P85_EINT);
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case WM8350_IRQ_CS1:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
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WM8350_IM_CS1_EINT);
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case WM8350_IRQ_CS2:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
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WM8350_IM_CS2_EINT);
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case WM8350_IRQ_USB_LIMIT:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
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WM8350_IM_USB_LIMIT_EINT);
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case WM8350_IRQ_AUXADC_DATARDY:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
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WM8350_IM_AUXADC_DATARDY_EINT);
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case WM8350_IRQ_AUXADC_DCOMP4:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
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WM8350_IM_AUXADC_DCOMP4_EINT);
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case WM8350_IRQ_AUXADC_DCOMP3:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
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WM8350_IM_AUXADC_DCOMP3_EINT);
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case WM8350_IRQ_AUXADC_DCOMP2:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
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WM8350_IM_AUXADC_DCOMP2_EINT);
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case WM8350_IRQ_AUXADC_DCOMP1:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
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WM8350_IM_AUXADC_DCOMP1_EINT);
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case WM8350_IRQ_SYS_HYST_COMP_FAIL:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
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WM8350_IM_SYS_HYST_COMP_FAIL_EINT);
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case WM8350_IRQ_SYS_CHIP_GT115:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
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WM8350_IM_SYS_CHIP_GT115_EINT);
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case WM8350_IRQ_SYS_CHIP_GT140:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
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WM8350_IM_SYS_CHIP_GT140_EINT);
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case WM8350_IRQ_SYS_WDOG_TO:
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return wm8350_set_bits(wm8350, WM8350_INT_STATUS_2_MASK,
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WM8350_IM_SYS_WDOG_TO_EINT);
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case WM8350_IRQ_UV_LDO4:
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return wm8350_set_bits(wm8350,
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WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
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WM8350_IM_UV_LDO4_EINT);
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case WM8350_IRQ_UV_LDO3:
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return wm8350_set_bits(wm8350,
|
|
WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
|
|
WM8350_IM_UV_LDO3_EINT);
|
|
case WM8350_IRQ_UV_LDO2:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
|
|
WM8350_IM_UV_LDO2_EINT);
|
|
case WM8350_IRQ_UV_LDO1:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
|
|
WM8350_IM_UV_LDO1_EINT);
|
|
case WM8350_IRQ_UV_DC6:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
|
|
WM8350_IM_UV_DC6_EINT);
|
|
case WM8350_IRQ_UV_DC5:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
|
|
WM8350_IM_UV_DC5_EINT);
|
|
case WM8350_IRQ_UV_DC4:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
|
|
WM8350_IM_UV_DC4_EINT);
|
|
case WM8350_IRQ_UV_DC3:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
|
|
WM8350_IM_UV_DC3_EINT);
|
|
case WM8350_IRQ_UV_DC2:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
|
|
WM8350_IM_UV_DC2_EINT);
|
|
case WM8350_IRQ_UV_DC1:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
|
|
WM8350_IM_UV_DC1_EINT);
|
|
case WM8350_IRQ_OC_LS:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_OVER_CURRENT_INT_STATUS_MASK,
|
|
WM8350_IM_OC_LS_EINT);
|
|
case WM8350_IRQ_EXT_USB_FB:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_EXT_USB_FB_EINT);
|
|
case WM8350_IRQ_EXT_WALL_FB:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_EXT_WALL_FB_EINT);
|
|
case WM8350_IRQ_EXT_BAT_FB:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_EXT_BAT_FB_EINT);
|
|
case WM8350_IRQ_CODEC_JCK_DET_L:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_CODEC_JCK_DET_L_EINT);
|
|
case WM8350_IRQ_CODEC_JCK_DET_R:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_CODEC_JCK_DET_R_EINT);
|
|
case WM8350_IRQ_CODEC_MICSCD:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_CODEC_MICSCD_EINT);
|
|
case WM8350_IRQ_CODEC_MICD:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_CODEC_MICD_EINT);
|
|
case WM8350_IRQ_WKUP_OFF_STATE:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_WKUP_OFF_STATE_EINT);
|
|
case WM8350_IRQ_WKUP_HIB_STATE:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_WKUP_HIB_STATE_EINT);
|
|
case WM8350_IRQ_WKUP_CONV_FAULT:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_WKUP_CONV_FAULT_EINT);
|
|
case WM8350_IRQ_WKUP_WDOG_RST:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_WKUP_OFF_STATE_EINT);
|
|
case WM8350_IRQ_WKUP_GP_PWR_ON:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_WKUP_GP_PWR_ON_EINT);
|
|
case WM8350_IRQ_WKUP_ONKEY:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_WKUP_ONKEY_EINT);
|
|
case WM8350_IRQ_WKUP_GP_WAKEUP:
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_WKUP_GP_WAKEUP_EINT);
|
|
case WM8350_IRQ_GPIO(0):
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP0_EINT);
|
|
case WM8350_IRQ_GPIO(1):
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP1_EINT);
|
|
case WM8350_IRQ_GPIO(2):
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP2_EINT);
|
|
case WM8350_IRQ_GPIO(3):
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP3_EINT);
|
|
case WM8350_IRQ_GPIO(4):
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP4_EINT);
|
|
case WM8350_IRQ_GPIO(5):
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP5_EINT);
|
|
case WM8350_IRQ_GPIO(6):
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP6_EINT);
|
|
case WM8350_IRQ_GPIO(7):
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP7_EINT);
|
|
case WM8350_IRQ_GPIO(8):
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP8_EINT);
|
|
case WM8350_IRQ_GPIO(9):
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP9_EINT);
|
|
case WM8350_IRQ_GPIO(10):
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP10_EINT);
|
|
case WM8350_IRQ_GPIO(11):
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP11_EINT);
|
|
case WM8350_IRQ_GPIO(12):
|
|
return wm8350_set_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP12_EINT);
|
|
default:
|
|
dev_warn(wm8350->dev, "Attempting to mask unknown IRQ %d\n",
|
|
irq);
|
|
return -EINVAL;
|
|
}
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(wm8350_mask_irq);
|
|
|
|
int wm8350_unmask_irq(struct wm8350 *wm8350, int irq)
|
|
{
|
|
switch (irq) {
|
|
case WM8350_IRQ_CHG_BAT_HOT:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
|
|
WM8350_IM_CHG_BAT_HOT_EINT);
|
|
case WM8350_IRQ_CHG_BAT_COLD:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
|
|
WM8350_IM_CHG_BAT_COLD_EINT);
|
|
case WM8350_IRQ_CHG_BAT_FAIL:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
|
|
WM8350_IM_CHG_BAT_FAIL_EINT);
|
|
case WM8350_IRQ_CHG_TO:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
|
|
WM8350_IM_CHG_TO_EINT);
|
|
case WM8350_IRQ_CHG_END:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
|
|
WM8350_IM_CHG_END_EINT);
|
|
case WM8350_IRQ_CHG_START:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
|
|
WM8350_IM_CHG_START_EINT);
|
|
case WM8350_IRQ_CHG_FAST_RDY:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
|
|
WM8350_IM_CHG_FAST_RDY_EINT);
|
|
case WM8350_IRQ_RTC_PER:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
|
|
WM8350_IM_RTC_PER_EINT);
|
|
case WM8350_IRQ_RTC_SEC:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
|
|
WM8350_IM_RTC_SEC_EINT);
|
|
case WM8350_IRQ_RTC_ALM:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
|
|
WM8350_IM_RTC_ALM_EINT);
|
|
case WM8350_IRQ_CHG_VBATT_LT_3P9:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
|
|
WM8350_IM_CHG_VBATT_LT_3P9_EINT);
|
|
case WM8350_IRQ_CHG_VBATT_LT_3P1:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
|
|
WM8350_IM_CHG_VBATT_LT_3P1_EINT);
|
|
case WM8350_IRQ_CHG_VBATT_LT_2P85:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_1_MASK,
|
|
WM8350_IM_CHG_VBATT_LT_2P85_EINT);
|
|
case WM8350_IRQ_CS1:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
|
|
WM8350_IM_CS1_EINT);
|
|
case WM8350_IRQ_CS2:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
|
|
WM8350_IM_CS2_EINT);
|
|
case WM8350_IRQ_USB_LIMIT:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
|
|
WM8350_IM_USB_LIMIT_EINT);
|
|
case WM8350_IRQ_AUXADC_DATARDY:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
|
|
WM8350_IM_AUXADC_DATARDY_EINT);
|
|
case WM8350_IRQ_AUXADC_DCOMP4:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
|
|
WM8350_IM_AUXADC_DCOMP4_EINT);
|
|
case WM8350_IRQ_AUXADC_DCOMP3:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
|
|
WM8350_IM_AUXADC_DCOMP3_EINT);
|
|
case WM8350_IRQ_AUXADC_DCOMP2:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
|
|
WM8350_IM_AUXADC_DCOMP2_EINT);
|
|
case WM8350_IRQ_AUXADC_DCOMP1:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
|
|
WM8350_IM_AUXADC_DCOMP1_EINT);
|
|
case WM8350_IRQ_SYS_HYST_COMP_FAIL:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
|
|
WM8350_IM_SYS_HYST_COMP_FAIL_EINT);
|
|
case WM8350_IRQ_SYS_CHIP_GT115:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
|
|
WM8350_IM_SYS_CHIP_GT115_EINT);
|
|
case WM8350_IRQ_SYS_CHIP_GT140:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
|
|
WM8350_IM_SYS_CHIP_GT140_EINT);
|
|
case WM8350_IRQ_SYS_WDOG_TO:
|
|
return wm8350_clear_bits(wm8350, WM8350_INT_STATUS_2_MASK,
|
|
WM8350_IM_SYS_WDOG_TO_EINT);
|
|
case WM8350_IRQ_UV_LDO4:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
|
|
WM8350_IM_UV_LDO4_EINT);
|
|
case WM8350_IRQ_UV_LDO3:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
|
|
WM8350_IM_UV_LDO3_EINT);
|
|
case WM8350_IRQ_UV_LDO2:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
|
|
WM8350_IM_UV_LDO2_EINT);
|
|
case WM8350_IRQ_UV_LDO1:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
|
|
WM8350_IM_UV_LDO1_EINT);
|
|
case WM8350_IRQ_UV_DC6:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
|
|
WM8350_IM_UV_DC6_EINT);
|
|
case WM8350_IRQ_UV_DC5:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
|
|
WM8350_IM_UV_DC5_EINT);
|
|
case WM8350_IRQ_UV_DC4:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
|
|
WM8350_IM_UV_DC4_EINT);
|
|
case WM8350_IRQ_UV_DC3:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
|
|
WM8350_IM_UV_DC3_EINT);
|
|
case WM8350_IRQ_UV_DC2:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
|
|
WM8350_IM_UV_DC2_EINT);
|
|
case WM8350_IRQ_UV_DC1:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_UNDER_VOLTAGE_INT_STATUS_MASK,
|
|
WM8350_IM_UV_DC1_EINT);
|
|
case WM8350_IRQ_OC_LS:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_OVER_CURRENT_INT_STATUS_MASK,
|
|
WM8350_IM_OC_LS_EINT);
|
|
case WM8350_IRQ_EXT_USB_FB:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_EXT_USB_FB_EINT);
|
|
case WM8350_IRQ_EXT_WALL_FB:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_EXT_WALL_FB_EINT);
|
|
case WM8350_IRQ_EXT_BAT_FB:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_EXT_BAT_FB_EINT);
|
|
case WM8350_IRQ_CODEC_JCK_DET_L:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_CODEC_JCK_DET_L_EINT);
|
|
case WM8350_IRQ_CODEC_JCK_DET_R:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_CODEC_JCK_DET_R_EINT);
|
|
case WM8350_IRQ_CODEC_MICSCD:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_CODEC_MICSCD_EINT);
|
|
case WM8350_IRQ_CODEC_MICD:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_CODEC_MICD_EINT);
|
|
case WM8350_IRQ_WKUP_OFF_STATE:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_WKUP_OFF_STATE_EINT);
|
|
case WM8350_IRQ_WKUP_HIB_STATE:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_WKUP_HIB_STATE_EINT);
|
|
case WM8350_IRQ_WKUP_CONV_FAULT:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_WKUP_CONV_FAULT_EINT);
|
|
case WM8350_IRQ_WKUP_WDOG_RST:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_WKUP_OFF_STATE_EINT);
|
|
case WM8350_IRQ_WKUP_GP_PWR_ON:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_WKUP_GP_PWR_ON_EINT);
|
|
case WM8350_IRQ_WKUP_ONKEY:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_WKUP_ONKEY_EINT);
|
|
case WM8350_IRQ_WKUP_GP_WAKEUP:
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_COMPARATOR_INT_STATUS_MASK,
|
|
WM8350_IM_WKUP_GP_WAKEUP_EINT);
|
|
case WM8350_IRQ_GPIO(0):
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP0_EINT);
|
|
case WM8350_IRQ_GPIO(1):
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP1_EINT);
|
|
case WM8350_IRQ_GPIO(2):
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP2_EINT);
|
|
case WM8350_IRQ_GPIO(3):
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP3_EINT);
|
|
case WM8350_IRQ_GPIO(4):
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP4_EINT);
|
|
case WM8350_IRQ_GPIO(5):
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP5_EINT);
|
|
case WM8350_IRQ_GPIO(6):
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP6_EINT);
|
|
case WM8350_IRQ_GPIO(7):
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP7_EINT);
|
|
case WM8350_IRQ_GPIO(8):
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP8_EINT);
|
|
case WM8350_IRQ_GPIO(9):
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP9_EINT);
|
|
case WM8350_IRQ_GPIO(10):
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP10_EINT);
|
|
case WM8350_IRQ_GPIO(11):
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP11_EINT);
|
|
case WM8350_IRQ_GPIO(12):
|
|
return wm8350_clear_bits(wm8350,
|
|
WM8350_GPIO_INT_STATUS_MASK,
|
|
WM8350_IM_GP12_EINT);
|
|
default:
|
|
dev_warn(wm8350->dev, "Attempting to unmask unknown IRQ %d\n",
|
|
irq);
|
|
return -EINVAL;
|
|
}
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(wm8350_unmask_irq);
|
|
|
|
int wm8350_irq_init(struct wm8350 *wm8350, int irq,
|
|
struct wm8350_platform_data *pdata)
|
|
{
|
|
int ret;
|
|
int flags = IRQF_ONESHOT;
|
|
|
|
if (!irq) {
|
|
dev_err(wm8350->dev, "No IRQ configured\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0xFFFF);
|
|
wm8350_reg_write(wm8350, WM8350_INT_STATUS_1_MASK, 0xFFFF);
|
|
wm8350_reg_write(wm8350, WM8350_INT_STATUS_2_MASK, 0xFFFF);
|
|
wm8350_reg_write(wm8350, WM8350_UNDER_VOLTAGE_INT_STATUS_MASK, 0xFFFF);
|
|
wm8350_reg_write(wm8350, WM8350_GPIO_INT_STATUS_MASK, 0xFFFF);
|
|
wm8350_reg_write(wm8350, WM8350_COMPARATOR_INT_STATUS_MASK, 0xFFFF);
|
|
|
|
mutex_init(&wm8350->irq_mutex);
|
|
wm8350->chip_irq = irq;
|
|
|
|
if (pdata && pdata->irq_high) {
|
|
flags |= IRQF_TRIGGER_HIGH;
|
|
|
|
wm8350_set_bits(wm8350, WM8350_SYSTEM_CONTROL_1,
|
|
WM8350_IRQ_POL);
|
|
} else {
|
|
flags |= IRQF_TRIGGER_LOW;
|
|
|
|
wm8350_clear_bits(wm8350, WM8350_SYSTEM_CONTROL_1,
|
|
WM8350_IRQ_POL);
|
|
}
|
|
|
|
ret = request_threaded_irq(irq, NULL, wm8350_irq, flags,
|
|
"wm8350", wm8350);
|
|
if (ret != 0)
|
|
dev_err(wm8350->dev, "Failed to request IRQ: %d\n", ret);
|
|
|
|
return ret;
|
|
}
|
|
|
|
int wm8350_irq_exit(struct wm8350 *wm8350)
|
|
{
|
|
free_irq(wm8350->chip_irq, wm8350);
|
|
return 0;
|
|
}
|