mirror of
https://github.com/adulau/aha.git
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16ed55f9de
Removed unnecessary hiwat code to free up the number available IOCBs. Eliminates unnecessary eh_ escalations due to inability to obtain IOCB pkt for marker. v2. - Remove define not used anymore and fix req_q_coun accounting. Signed-off-by: Karen Higgins <karen.higgins@qlogic.com> [michaelc: ported patch from qlogic.com driver to upstream] Signed-off-by: Mike Christie <michaelc@cs.wisc.edu> Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
907 lines
27 KiB
C
907 lines
27 KiB
C
/*
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* QLogic iSCSI HBA Driver
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* Copyright (c) 2003-2006 QLogic Corporation
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*
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* See LICENSE.qla4xxx for copyright and licensing details.
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*/
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#include "ql4_def.h"
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#include "ql4_glbl.h"
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#include "ql4_dbg.h"
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#include "ql4_inline.h"
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/**
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* qla4xxx_mailbox_command - issues mailbox commands
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* @ha: Pointer to host adapter structure.
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* @inCount: number of mailbox registers to load.
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* @outCount: number of mailbox registers to return.
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* @mbx_cmd: data pointer for mailbox in registers.
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* @mbx_sts: data pointer for mailbox out registers.
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*
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* This routine sssue mailbox commands and waits for completion.
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* If outCount is 0, this routine completes successfully WITHOUT waiting
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* for the mailbox command to complete.
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**/
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static int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,
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uint8_t outCount, uint32_t *mbx_cmd,
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uint32_t *mbx_sts)
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{
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int status = QLA_ERROR;
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uint8_t i;
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u_long wait_count;
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uint32_t intr_status;
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unsigned long flags = 0;
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/* Make sure that pointers are valid */
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if (!mbx_cmd || !mbx_sts) {
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DEBUG2(printk("scsi%ld: %s: Invalid mbx_cmd or mbx_sts "
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"pointer\n", ha->host_no, __func__));
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return status;
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}
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/* Mailbox code active */
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wait_count = MBOX_TOV * 100;
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while (wait_count--) {
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mutex_lock(&ha->mbox_sem);
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if (!test_bit(AF_MBOX_COMMAND, &ha->flags)) {
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set_bit(AF_MBOX_COMMAND, &ha->flags);
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mutex_unlock(&ha->mbox_sem);
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break;
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}
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mutex_unlock(&ha->mbox_sem);
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if (!wait_count) {
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DEBUG2(printk("scsi%ld: %s: mbox_sem failed\n",
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ha->host_no, __func__));
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return status;
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}
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msleep(10);
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}
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/* To prevent overwriting mailbox registers for a command that has
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* not yet been serviced, check to see if a previously issued
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* mailbox command is interrupting.
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* -----------------------------------------------------------------
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*/
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spin_lock_irqsave(&ha->hardware_lock, flags);
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intr_status = readl(&ha->reg->ctrl_status);
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if (intr_status & CSR_SCSI_PROCESSOR_INTR) {
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/* Service existing interrupt */
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qla4xxx_interrupt_service_routine(ha, intr_status);
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clear_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
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}
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/* Send the mailbox command to the firmware */
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ha->mbox_status_count = outCount;
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for (i = 0; i < outCount; i++)
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ha->mbox_status[i] = 0;
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/* Load all mailbox registers, except mailbox 0. */
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for (i = 1; i < inCount; i++)
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writel(mbx_cmd[i], &ha->reg->mailbox[i]);
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/* Wakeup firmware */
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writel(mbx_cmd[0], &ha->reg->mailbox[0]);
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readl(&ha->reg->mailbox[0]);
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writel(set_rmask(CSR_INTR_RISC), &ha->reg->ctrl_status);
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readl(&ha->reg->ctrl_status);
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spin_unlock_irqrestore(&ha->hardware_lock, flags);
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/* Wait for completion */
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/*
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* If we don't want status, don't wait for the mailbox command to
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* complete. For example, MBOX_CMD_RESET_FW doesn't return status,
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* you must poll the inbound Interrupt Mask for completion.
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*/
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if (outCount == 0) {
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status = QLA_SUCCESS;
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goto mbox_exit;
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}
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/* Wait for command to complete */
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wait_count = jiffies + MBOX_TOV * HZ;
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while (test_bit(AF_MBOX_COMMAND_DONE, &ha->flags) == 0) {
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if (time_after_eq(jiffies, wait_count))
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break;
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spin_lock_irqsave(&ha->hardware_lock, flags);
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intr_status = readl(&ha->reg->ctrl_status);
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if (intr_status & INTR_PENDING) {
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/*
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* Service the interrupt.
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* The ISR will save the mailbox status registers
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* to a temporary storage location in the adapter
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* structure.
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*/
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ha->mbox_status_count = outCount;
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qla4xxx_interrupt_service_routine(ha, intr_status);
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}
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spin_unlock_irqrestore(&ha->hardware_lock, flags);
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msleep(10);
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}
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/* Check for mailbox timeout. */
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if (!test_bit(AF_MBOX_COMMAND_DONE, &ha->flags)) {
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DEBUG2(printk("scsi%ld: Mailbox Cmd 0x%08X timed out ...,"
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" Scheduling Adapter Reset\n", ha->host_no,
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mbx_cmd[0]));
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ha->mailbox_timeout_count++;
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mbx_sts[0] = (-1);
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set_bit(DPC_RESET_HA, &ha->dpc_flags);
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goto mbox_exit;
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}
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/*
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* Copy the mailbox out registers to the caller's mailbox in/out
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* structure.
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*/
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spin_lock_irqsave(&ha->hardware_lock, flags);
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for (i = 0; i < outCount; i++)
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mbx_sts[i] = ha->mbox_status[i];
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/* Set return status and error flags (if applicable). */
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switch (ha->mbox_status[0]) {
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case MBOX_STS_COMMAND_COMPLETE:
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status = QLA_SUCCESS;
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break;
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case MBOX_STS_INTERMEDIATE_COMPLETION:
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status = QLA_SUCCESS;
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break;
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case MBOX_STS_BUSY:
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DEBUG2( printk("scsi%ld: %s: Cmd = %08X, ISP BUSY\n",
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ha->host_no, __func__, mbx_cmd[0]));
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ha->mailbox_timeout_count++;
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break;
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default:
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DEBUG2(printk("scsi%ld: %s: **** FAILED, cmd = %08X, "
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"sts = %08X ****\n", ha->host_no, __func__,
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mbx_cmd[0], mbx_sts[0]));
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break;
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}
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spin_unlock_irqrestore(&ha->hardware_lock, flags);
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mbox_exit:
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mutex_lock(&ha->mbox_sem);
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clear_bit(AF_MBOX_COMMAND, &ha->flags);
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mutex_unlock(&ha->mbox_sem);
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clear_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
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return status;
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}
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/**
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* qla4xxx_initialize_fw_cb - initializes firmware control block.
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* @ha: Pointer to host adapter structure.
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**/
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int qla4xxx_initialize_fw_cb(struct scsi_qla_host * ha)
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{
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struct init_fw_ctrl_blk *init_fw_cb;
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dma_addr_t init_fw_cb_dma;
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uint32_t mbox_cmd[MBOX_REG_COUNT];
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uint32_t mbox_sts[MBOX_REG_COUNT];
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int status = QLA_ERROR;
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init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
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sizeof(struct init_fw_ctrl_blk),
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&init_fw_cb_dma, GFP_KERNEL);
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if (init_fw_cb == NULL) {
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DEBUG2(printk("scsi%ld: %s: Unable to alloc init_cb\n",
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ha->host_no, __func__));
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return 10;
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}
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memset(init_fw_cb, 0, sizeof(struct init_fw_ctrl_blk));
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/* Get Initialize Firmware Control Block. */
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memset(&mbox_cmd, 0, sizeof(mbox_cmd));
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memset(&mbox_sts, 0, sizeof(mbox_sts));
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mbox_cmd[0] = MBOX_CMD_GET_INIT_FW_CTRL_BLOCK;
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mbox_cmd[2] = LSDW(init_fw_cb_dma);
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mbox_cmd[3] = MSDW(init_fw_cb_dma);
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mbox_cmd[4] = sizeof(struct init_fw_ctrl_blk);
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if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) !=
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QLA_SUCCESS) {
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dma_free_coherent(&ha->pdev->dev,
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sizeof(struct init_fw_ctrl_blk),
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init_fw_cb, init_fw_cb_dma);
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return status;
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}
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/* Initialize request and response queues. */
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qla4xxx_init_rings(ha);
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/* Fill in the request and response queue information. */
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init_fw_cb->pri.rqq_consumer_idx = cpu_to_le16(ha->request_out);
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init_fw_cb->pri.compq_producer_idx = cpu_to_le16(ha->response_in);
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init_fw_cb->pri.rqq_len = __constant_cpu_to_le16(REQUEST_QUEUE_DEPTH);
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init_fw_cb->pri.compq_len = __constant_cpu_to_le16(RESPONSE_QUEUE_DEPTH);
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init_fw_cb->pri.rqq_addr_lo = cpu_to_le32(LSDW(ha->request_dma));
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init_fw_cb->pri.rqq_addr_hi = cpu_to_le32(MSDW(ha->request_dma));
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init_fw_cb->pri.compq_addr_lo = cpu_to_le32(LSDW(ha->response_dma));
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init_fw_cb->pri.compq_addr_hi = cpu_to_le32(MSDW(ha->response_dma));
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init_fw_cb->pri.shdwreg_addr_lo =
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cpu_to_le32(LSDW(ha->shadow_regs_dma));
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init_fw_cb->pri.shdwreg_addr_hi =
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cpu_to_le32(MSDW(ha->shadow_regs_dma));
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/* Set up required options. */
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init_fw_cb->pri.fw_options |=
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__constant_cpu_to_le16(FWOPT_SESSION_MODE |
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FWOPT_INITIATOR_MODE);
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init_fw_cb->pri.fw_options &= __constant_cpu_to_le16(~FWOPT_TARGET_MODE);
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/* Save some info in adapter structure. */
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ha->firmware_options = le16_to_cpu(init_fw_cb->pri.fw_options);
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ha->tcp_options = le16_to_cpu(init_fw_cb->pri.ipv4_tcp_opts);
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ha->heartbeat_interval = init_fw_cb->pri.hb_interval;
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memcpy(ha->ip_address, init_fw_cb->pri.ipv4_addr,
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min(sizeof(ha->ip_address), sizeof(init_fw_cb->pri.ipv4_addr)));
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memcpy(ha->subnet_mask, init_fw_cb->pri.ipv4_subnet,
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min(sizeof(ha->subnet_mask), sizeof(init_fw_cb->pri.ipv4_subnet)));
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memcpy(ha->gateway, init_fw_cb->pri.ipv4_gw_addr,
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min(sizeof(ha->gateway), sizeof(init_fw_cb->pri.ipv4_gw_addr)));
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memcpy(ha->name_string, init_fw_cb->pri.iscsi_name,
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min(sizeof(ha->name_string),
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sizeof(init_fw_cb->pri.iscsi_name)));
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/*memcpy(ha->alias, init_fw_cb->Alias,
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min(sizeof(ha->alias), sizeof(init_fw_cb->Alias)));*/
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/* Save Command Line Paramater info */
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ha->port_down_retry_count = le16_to_cpu(init_fw_cb->pri.conn_ka_timeout);
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ha->discovery_wait = ql4xdiscoverywait;
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/* Send Initialize Firmware Control Block. */
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memset(&mbox_cmd, 0, sizeof(mbox_cmd));
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memset(&mbox_sts, 0, sizeof(mbox_sts));
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mbox_cmd[0] = MBOX_CMD_INITIALIZE_FIRMWARE;
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mbox_cmd[1] = 0;
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mbox_cmd[2] = LSDW(init_fw_cb_dma);
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mbox_cmd[3] = MSDW(init_fw_cb_dma);
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mbox_cmd[4] = sizeof(struct init_fw_ctrl_blk);
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if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) ==
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QLA_SUCCESS)
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status = QLA_SUCCESS;
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else {
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DEBUG2(printk("scsi%ld: %s: MBOX_CMD_INITIALIZE_FIRMWARE "
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"failed w/ status %04X\n", ha->host_no, __func__,
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mbox_sts[0]));
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}
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dma_free_coherent(&ha->pdev->dev, sizeof(struct init_fw_ctrl_blk),
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init_fw_cb, init_fw_cb_dma);
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return status;
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}
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/**
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* qla4xxx_get_dhcp_ip_address - gets HBA ip address via DHCP
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* @ha: Pointer to host adapter structure.
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**/
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int qla4xxx_get_dhcp_ip_address(struct scsi_qla_host * ha)
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{
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struct init_fw_ctrl_blk *init_fw_cb;
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dma_addr_t init_fw_cb_dma;
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uint32_t mbox_cmd[MBOX_REG_COUNT];
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uint32_t mbox_sts[MBOX_REG_COUNT];
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init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
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sizeof(struct init_fw_ctrl_blk),
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&init_fw_cb_dma, GFP_KERNEL);
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if (init_fw_cb == NULL) {
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printk("scsi%ld: %s: Unable to alloc init_cb\n", ha->host_no,
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__func__);
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return 10;
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}
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/* Get Initialize Firmware Control Block. */
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memset(&mbox_cmd, 0, sizeof(mbox_cmd));
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memset(&mbox_sts, 0, sizeof(mbox_sts));
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memset(init_fw_cb, 0, sizeof(struct init_fw_ctrl_blk));
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mbox_cmd[0] = MBOX_CMD_GET_INIT_FW_CTRL_BLOCK;
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mbox_cmd[2] = LSDW(init_fw_cb_dma);
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mbox_cmd[3] = MSDW(init_fw_cb_dma);
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mbox_cmd[4] = sizeof(struct init_fw_ctrl_blk);
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if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) !=
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QLA_SUCCESS) {
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DEBUG2(printk("scsi%ld: %s: Failed to get init_fw_ctrl_blk\n",
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ha->host_no, __func__));
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dma_free_coherent(&ha->pdev->dev,
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sizeof(struct init_fw_ctrl_blk),
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init_fw_cb, init_fw_cb_dma);
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return QLA_ERROR;
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}
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/* Save IP Address. */
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memcpy(ha->ip_address, init_fw_cb->pri.ipv4_addr,
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min(sizeof(ha->ip_address), sizeof(init_fw_cb->pri.ipv4_addr)));
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memcpy(ha->subnet_mask, init_fw_cb->pri.ipv4_subnet,
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min(sizeof(ha->subnet_mask), sizeof(init_fw_cb->pri.ipv4_subnet)));
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memcpy(ha->gateway, init_fw_cb->pri.ipv4_gw_addr,
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min(sizeof(ha->gateway), sizeof(init_fw_cb->pri.ipv4_gw_addr)));
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dma_free_coherent(&ha->pdev->dev, sizeof(struct init_fw_ctrl_blk),
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init_fw_cb, init_fw_cb_dma);
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return QLA_SUCCESS;
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}
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/**
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* qla4xxx_get_firmware_state - gets firmware state of HBA
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* @ha: Pointer to host adapter structure.
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**/
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int qla4xxx_get_firmware_state(struct scsi_qla_host * ha)
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{
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uint32_t mbox_cmd[MBOX_REG_COUNT];
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uint32_t mbox_sts[MBOX_REG_COUNT];
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/* Get firmware version */
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memset(&mbox_cmd, 0, sizeof(mbox_cmd));
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memset(&mbox_sts, 0, sizeof(mbox_sts));
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mbox_cmd[0] = MBOX_CMD_GET_FW_STATE;
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if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 4, &mbox_cmd[0], &mbox_sts[0]) !=
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QLA_SUCCESS) {
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DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATE failed w/ "
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"status %04X\n", ha->host_no, __func__,
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mbox_sts[0]));
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return QLA_ERROR;
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}
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ha->firmware_state = mbox_sts[1];
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ha->board_id = mbox_sts[2];
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ha->addl_fw_state = mbox_sts[3];
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DEBUG2(printk("scsi%ld: %s firmware_state=0x%x\n",
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ha->host_no, __func__, ha->firmware_state);)
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return QLA_SUCCESS;
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}
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/**
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* qla4xxx_get_firmware_status - retrieves firmware status
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* @ha: Pointer to host adapter structure.
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**/
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int qla4xxx_get_firmware_status(struct scsi_qla_host * ha)
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{
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uint32_t mbox_cmd[MBOX_REG_COUNT];
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uint32_t mbox_sts[MBOX_REG_COUNT];
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/* Get firmware version */
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memset(&mbox_cmd, 0, sizeof(mbox_cmd));
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memset(&mbox_sts, 0, sizeof(mbox_sts));
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mbox_cmd[0] = MBOX_CMD_GET_FW_STATUS;
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if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0], &mbox_sts[0]) !=
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QLA_SUCCESS) {
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DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATUS failed w/ "
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"status %04X\n", ha->host_no, __func__,
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mbox_sts[0]));
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return QLA_ERROR;
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}
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return QLA_SUCCESS;
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}
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/**
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* qla4xxx_get_fwddb_entry - retrieves firmware ddb entry
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* @ha: Pointer to host adapter structure.
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* @fw_ddb_index: Firmware's device database index
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* @fw_ddb_entry: Pointer to firmware's device database entry structure
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* @num_valid_ddb_entries: Pointer to number of valid ddb entries
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* @next_ddb_index: Pointer to next valid device database index
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* @fw_ddb_device_state: Pointer to device state
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**/
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int qla4xxx_get_fwddb_entry(struct scsi_qla_host *ha,
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uint16_t fw_ddb_index,
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struct dev_db_entry *fw_ddb_entry,
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dma_addr_t fw_ddb_entry_dma,
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uint32_t *num_valid_ddb_entries,
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uint32_t *next_ddb_index,
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uint32_t *fw_ddb_device_state,
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uint32_t *conn_err_detail,
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uint16_t *tcp_source_port_num,
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uint16_t *connection_id)
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{
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int status = QLA_ERROR;
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uint32_t mbox_cmd[MBOX_REG_COUNT];
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uint32_t mbox_sts[MBOX_REG_COUNT];
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/* Make sure the device index is valid */
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if (fw_ddb_index >= MAX_DDB_ENTRIES) {
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DEBUG2(printk("scsi%ld: %s: index [%d] out of range.\n",
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ha->host_no, __func__, fw_ddb_index));
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goto exit_get_fwddb;
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}
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memset(&mbox_cmd, 0, sizeof(mbox_cmd));
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|
memset(&mbox_sts, 0, sizeof(mbox_sts));
|
|
|
|
mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY;
|
|
mbox_cmd[1] = (uint32_t) fw_ddb_index;
|
|
mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
|
|
mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
|
|
mbox_cmd[4] = sizeof(struct dev_db_entry);
|
|
|
|
if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 7, &mbox_cmd[0], &mbox_sts[0]) ==
|
|
QLA_ERROR) {
|
|
DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_DATABASE_ENTRY failed"
|
|
" with status 0x%04X\n", ha->host_no, __func__,
|
|
mbox_sts[0]));
|
|
goto exit_get_fwddb;
|
|
}
|
|
if (fw_ddb_index != mbox_sts[1]) {
|
|
DEBUG2(printk("scsi%ld: %s: index mismatch [%d] != [%d].\n",
|
|
ha->host_no, __func__, fw_ddb_index,
|
|
mbox_sts[1]));
|
|
goto exit_get_fwddb;
|
|
}
|
|
if (fw_ddb_entry) {
|
|
dev_info(&ha->pdev->dev, "DDB[%d] MB0 %04x Tot %d Next %d "
|
|
"State %04x ConnErr %08x %d.%d.%d.%d:%04d \"%s\"\n",
|
|
fw_ddb_index, mbox_sts[0], mbox_sts[2], mbox_sts[3],
|
|
mbox_sts[4], mbox_sts[5], fw_ddb_entry->ip_addr[0],
|
|
fw_ddb_entry->ip_addr[1], fw_ddb_entry->ip_addr[2],
|
|
fw_ddb_entry->ip_addr[3],
|
|
le16_to_cpu(fw_ddb_entry->port),
|
|
fw_ddb_entry->iscsi_name);
|
|
}
|
|
if (num_valid_ddb_entries)
|
|
*num_valid_ddb_entries = mbox_sts[2];
|
|
if (next_ddb_index)
|
|
*next_ddb_index = mbox_sts[3];
|
|
if (fw_ddb_device_state)
|
|
*fw_ddb_device_state = mbox_sts[4];
|
|
|
|
/*
|
|
* RA: This mailbox has been changed to pass connection error and
|
|
* details. Its true for ISP4010 as per Version E - Not sure when it
|
|
* was changed. Get the time2wait from the fw_dd_entry field :
|
|
* default_time2wait which we call it as minTime2Wait DEV_DB_ENTRY
|
|
* struct.
|
|
*/
|
|
if (conn_err_detail)
|
|
*conn_err_detail = mbox_sts[5];
|
|
if (tcp_source_port_num)
|
|
*tcp_source_port_num = (uint16_t) mbox_sts[6] >> 16;
|
|
if (connection_id)
|
|
*connection_id = (uint16_t) mbox_sts[6] & 0x00FF;
|
|
status = QLA_SUCCESS;
|
|
|
|
exit_get_fwddb:
|
|
return status;
|
|
}
|
|
|
|
/**
|
|
* qla4xxx_set_fwddb_entry - sets a ddb entry.
|
|
* @ha: Pointer to host adapter structure.
|
|
* @fw_ddb_index: Firmware's device database index
|
|
* @fw_ddb_entry: Pointer to firmware's ddb entry structure, or NULL.
|
|
*
|
|
* This routine initializes or updates the adapter's device database
|
|
* entry for the specified device. It also triggers a login for the
|
|
* specified device. Therefore, it may also be used as a secondary
|
|
* login routine when a NULL pointer is specified for the fw_ddb_entry.
|
|
**/
|
|
int qla4xxx_set_ddb_entry(struct scsi_qla_host * ha, uint16_t fw_ddb_index,
|
|
dma_addr_t fw_ddb_entry_dma)
|
|
{
|
|
uint32_t mbox_cmd[MBOX_REG_COUNT];
|
|
uint32_t mbox_sts[MBOX_REG_COUNT];
|
|
|
|
/* Do not wait for completion. The firmware will send us an
|
|
* ASTS_DATABASE_CHANGED (0x8014) to notify us of the login status.
|
|
*/
|
|
memset(&mbox_cmd, 0, sizeof(mbox_cmd));
|
|
memset(&mbox_sts, 0, sizeof(mbox_sts));
|
|
|
|
mbox_cmd[0] = MBOX_CMD_SET_DATABASE_ENTRY;
|
|
mbox_cmd[1] = (uint32_t) fw_ddb_index;
|
|
mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
|
|
mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
|
|
mbox_cmd[4] = sizeof(struct dev_db_entry);
|
|
|
|
return qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]);
|
|
}
|
|
|
|
/**
|
|
* qla4xxx_get_crash_record - retrieves crash record.
|
|
* @ha: Pointer to host adapter structure.
|
|
*
|
|
* This routine retrieves a crash record from the QLA4010 after an 8002h aen.
|
|
**/
|
|
void qla4xxx_get_crash_record(struct scsi_qla_host * ha)
|
|
{
|
|
uint32_t mbox_cmd[MBOX_REG_COUNT];
|
|
uint32_t mbox_sts[MBOX_REG_COUNT];
|
|
struct crash_record *crash_record = NULL;
|
|
dma_addr_t crash_record_dma = 0;
|
|
uint32_t crash_record_size = 0;
|
|
|
|
memset(&mbox_cmd, 0, sizeof(mbox_cmd));
|
|
memset(&mbox_sts, 0, sizeof(mbox_cmd));
|
|
|
|
/* Get size of crash record. */
|
|
mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
|
|
|
|
if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
|
|
QLA_SUCCESS) {
|
|
DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve size!\n",
|
|
ha->host_no, __func__));
|
|
goto exit_get_crash_record;
|
|
}
|
|
crash_record_size = mbox_sts[4];
|
|
if (crash_record_size == 0) {
|
|
DEBUG2(printk("scsi%ld: %s: ERROR: Crash record size is 0!\n",
|
|
ha->host_no, __func__));
|
|
goto exit_get_crash_record;
|
|
}
|
|
|
|
/* Alloc Memory for Crash Record. */
|
|
crash_record = dma_alloc_coherent(&ha->pdev->dev, crash_record_size,
|
|
&crash_record_dma, GFP_KERNEL);
|
|
if (crash_record == NULL)
|
|
goto exit_get_crash_record;
|
|
|
|
/* Get Crash Record. */
|
|
memset(&mbox_cmd, 0, sizeof(mbox_cmd));
|
|
memset(&mbox_sts, 0, sizeof(mbox_cmd));
|
|
|
|
mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
|
|
mbox_cmd[2] = LSDW(crash_record_dma);
|
|
mbox_cmd[3] = MSDW(crash_record_dma);
|
|
mbox_cmd[4] = crash_record_size;
|
|
|
|
if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
|
|
QLA_SUCCESS)
|
|
goto exit_get_crash_record;
|
|
|
|
/* Dump Crash Record. */
|
|
|
|
exit_get_crash_record:
|
|
if (crash_record)
|
|
dma_free_coherent(&ha->pdev->dev, crash_record_size,
|
|
crash_record, crash_record_dma);
|
|
}
|
|
|
|
/**
|
|
* qla4xxx_get_conn_event_log - retrieves connection event log
|
|
* @ha: Pointer to host adapter structure.
|
|
**/
|
|
void qla4xxx_get_conn_event_log(struct scsi_qla_host * ha)
|
|
{
|
|
uint32_t mbox_cmd[MBOX_REG_COUNT];
|
|
uint32_t mbox_sts[MBOX_REG_COUNT];
|
|
struct conn_event_log_entry *event_log = NULL;
|
|
dma_addr_t event_log_dma = 0;
|
|
uint32_t event_log_size = 0;
|
|
uint32_t num_valid_entries;
|
|
uint32_t oldest_entry = 0;
|
|
uint32_t max_event_log_entries;
|
|
uint8_t i;
|
|
|
|
|
|
memset(&mbox_cmd, 0, sizeof(mbox_cmd));
|
|
memset(&mbox_sts, 0, sizeof(mbox_cmd));
|
|
|
|
/* Get size of crash record. */
|
|
mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
|
|
|
|
if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
|
|
QLA_SUCCESS)
|
|
goto exit_get_event_log;
|
|
|
|
event_log_size = mbox_sts[4];
|
|
if (event_log_size == 0)
|
|
goto exit_get_event_log;
|
|
|
|
/* Alloc Memory for Crash Record. */
|
|
event_log = dma_alloc_coherent(&ha->pdev->dev, event_log_size,
|
|
&event_log_dma, GFP_KERNEL);
|
|
if (event_log == NULL)
|
|
goto exit_get_event_log;
|
|
|
|
/* Get Crash Record. */
|
|
memset(&mbox_cmd, 0, sizeof(mbox_cmd));
|
|
memset(&mbox_sts, 0, sizeof(mbox_cmd));
|
|
|
|
mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
|
|
mbox_cmd[2] = LSDW(event_log_dma);
|
|
mbox_cmd[3] = MSDW(event_log_dma);
|
|
|
|
if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
|
|
QLA_SUCCESS) {
|
|
DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve event "
|
|
"log!\n", ha->host_no, __func__));
|
|
goto exit_get_event_log;
|
|
}
|
|
|
|
/* Dump Event Log. */
|
|
num_valid_entries = mbox_sts[1];
|
|
|
|
max_event_log_entries = event_log_size /
|
|
sizeof(struct conn_event_log_entry);
|
|
|
|
if (num_valid_entries > max_event_log_entries)
|
|
oldest_entry = num_valid_entries % max_event_log_entries;
|
|
|
|
DEBUG3(printk("scsi%ld: Connection Event Log Dump (%d entries):\n",
|
|
ha->host_no, num_valid_entries));
|
|
|
|
if (ql4xextended_error_logging == 3) {
|
|
if (oldest_entry == 0) {
|
|
/* Circular Buffer has not wrapped around */
|
|
for (i=0; i < num_valid_entries; i++) {
|
|
qla4xxx_dump_buffer((uint8_t *)event_log+
|
|
(i*sizeof(*event_log)),
|
|
sizeof(*event_log));
|
|
}
|
|
}
|
|
else {
|
|
/* Circular Buffer has wrapped around -
|
|
* display accordingly*/
|
|
for (i=oldest_entry; i < max_event_log_entries; i++) {
|
|
qla4xxx_dump_buffer((uint8_t *)event_log+
|
|
(i*sizeof(*event_log)),
|
|
sizeof(*event_log));
|
|
}
|
|
for (i=0; i < oldest_entry; i++) {
|
|
qla4xxx_dump_buffer((uint8_t *)event_log+
|
|
(i*sizeof(*event_log)),
|
|
sizeof(*event_log));
|
|
}
|
|
}
|
|
}
|
|
|
|
exit_get_event_log:
|
|
if (event_log)
|
|
dma_free_coherent(&ha->pdev->dev, event_log_size, event_log,
|
|
event_log_dma);
|
|
}
|
|
|
|
/**
|
|
* qla4xxx_reset_lun - issues LUN Reset
|
|
* @ha: Pointer to host adapter structure.
|
|
* @db_entry: Pointer to device database entry
|
|
* @un_entry: Pointer to lun entry structure
|
|
*
|
|
* This routine performs a LUN RESET on the specified target/lun.
|
|
* The caller must ensure that the ddb_entry and lun_entry pointers
|
|
* are valid before calling this routine.
|
|
**/
|
|
int qla4xxx_reset_lun(struct scsi_qla_host * ha, struct ddb_entry * ddb_entry,
|
|
int lun)
|
|
{
|
|
uint32_t mbox_cmd[MBOX_REG_COUNT];
|
|
uint32_t mbox_sts[MBOX_REG_COUNT];
|
|
int status = QLA_SUCCESS;
|
|
|
|
DEBUG2(printk("scsi%ld:%d:%d: lun reset issued\n", ha->host_no,
|
|
ddb_entry->os_target_id, lun));
|
|
|
|
/*
|
|
* Send lun reset command to ISP, so that the ISP will return all
|
|
* outstanding requests with RESET status
|
|
*/
|
|
memset(&mbox_cmd, 0, sizeof(mbox_cmd));
|
|
memset(&mbox_sts, 0, sizeof(mbox_sts));
|
|
|
|
mbox_cmd[0] = MBOX_CMD_LUN_RESET;
|
|
mbox_cmd[1] = ddb_entry->fw_ddb_index;
|
|
mbox_cmd[2] = lun << 8;
|
|
mbox_cmd[5] = 0x01; /* Immediate Command Enable */
|
|
|
|
qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]);
|
|
if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
|
|
mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
|
|
status = QLA_ERROR;
|
|
|
|
return status;
|
|
}
|
|
|
|
/**
|
|
* qla4xxx_reset_target - issues target Reset
|
|
* @ha: Pointer to host adapter structure.
|
|
* @db_entry: Pointer to device database entry
|
|
* @un_entry: Pointer to lun entry structure
|
|
*
|
|
* This routine performs a TARGET RESET on the specified target.
|
|
* The caller must ensure that the ddb_entry pointers
|
|
* are valid before calling this routine.
|
|
**/
|
|
int qla4xxx_reset_target(struct scsi_qla_host *ha,
|
|
struct ddb_entry *ddb_entry)
|
|
{
|
|
uint32_t mbox_cmd[MBOX_REG_COUNT];
|
|
uint32_t mbox_sts[MBOX_REG_COUNT];
|
|
int status = QLA_SUCCESS;
|
|
|
|
DEBUG2(printk("scsi%ld:%d: target reset issued\n", ha->host_no,
|
|
ddb_entry->os_target_id));
|
|
|
|
/*
|
|
* Send target reset command to ISP, so that the ISP will return all
|
|
* outstanding requests with RESET status
|
|
*/
|
|
memset(&mbox_cmd, 0, sizeof(mbox_cmd));
|
|
memset(&mbox_sts, 0, sizeof(mbox_sts));
|
|
|
|
mbox_cmd[0] = MBOX_CMD_TARGET_WARM_RESET;
|
|
mbox_cmd[1] = ddb_entry->fw_ddb_index;
|
|
mbox_cmd[5] = 0x01; /* Immediate Command Enable */
|
|
|
|
qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
|
|
&mbox_sts[0]);
|
|
if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
|
|
mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
|
|
status = QLA_ERROR;
|
|
|
|
return status;
|
|
}
|
|
|
|
int qla4xxx_get_flash(struct scsi_qla_host * ha, dma_addr_t dma_addr,
|
|
uint32_t offset, uint32_t len)
|
|
{
|
|
uint32_t mbox_cmd[MBOX_REG_COUNT];
|
|
uint32_t mbox_sts[MBOX_REG_COUNT];
|
|
|
|
memset(&mbox_cmd, 0, sizeof(mbox_cmd));
|
|
memset(&mbox_sts, 0, sizeof(mbox_sts));
|
|
|
|
mbox_cmd[0] = MBOX_CMD_READ_FLASH;
|
|
mbox_cmd[1] = LSDW(dma_addr);
|
|
mbox_cmd[2] = MSDW(dma_addr);
|
|
mbox_cmd[3] = offset;
|
|
mbox_cmd[4] = len;
|
|
|
|
if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0], &mbox_sts[0]) !=
|
|
QLA_SUCCESS) {
|
|
DEBUG2(printk("scsi%ld: %s: MBOX_CMD_READ_FLASH, failed w/ "
|
|
"status %04X %04X, offset %08x, len %08x\n", ha->host_no,
|
|
__func__, mbox_sts[0], mbox_sts[1], offset, len));
|
|
return QLA_ERROR;
|
|
}
|
|
return QLA_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
* qla4xxx_get_fw_version - gets firmware version
|
|
* @ha: Pointer to host adapter structure.
|
|
*
|
|
* Retrieves the firmware version on HBA. In QLA4010, mailboxes 2 & 3 may
|
|
* hold an address for data. Make sure that we write 0 to those mailboxes,
|
|
* if unused.
|
|
**/
|
|
int qla4xxx_get_fw_version(struct scsi_qla_host * ha)
|
|
{
|
|
uint32_t mbox_cmd[MBOX_REG_COUNT];
|
|
uint32_t mbox_sts[MBOX_REG_COUNT];
|
|
|
|
/* Get firmware version. */
|
|
memset(&mbox_cmd, 0, sizeof(mbox_cmd));
|
|
memset(&mbox_sts, 0, sizeof(mbox_sts));
|
|
|
|
mbox_cmd[0] = MBOX_CMD_ABOUT_FW;
|
|
|
|
if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
|
|
QLA_SUCCESS) {
|
|
DEBUG2(printk("scsi%ld: %s: MBOX_CMD_ABOUT_FW failed w/ "
|
|
"status %04X\n", ha->host_no, __func__, mbox_sts[0]));
|
|
return QLA_ERROR;
|
|
}
|
|
|
|
/* Save firmware version information. */
|
|
ha->firmware_version[0] = mbox_sts[1];
|
|
ha->firmware_version[1] = mbox_sts[2];
|
|
ha->patch_number = mbox_sts[3];
|
|
ha->build_number = mbox_sts[4];
|
|
|
|
return QLA_SUCCESS;
|
|
}
|
|
|
|
static int qla4xxx_get_default_ddb(struct scsi_qla_host *ha,
|
|
dma_addr_t dma_addr)
|
|
{
|
|
uint32_t mbox_cmd[MBOX_REG_COUNT];
|
|
uint32_t mbox_sts[MBOX_REG_COUNT];
|
|
|
|
memset(&mbox_cmd, 0, sizeof(mbox_cmd));
|
|
memset(&mbox_sts, 0, sizeof(mbox_sts));
|
|
|
|
mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY_DEFAULTS;
|
|
mbox_cmd[2] = LSDW(dma_addr);
|
|
mbox_cmd[3] = MSDW(dma_addr);
|
|
|
|
if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) !=
|
|
QLA_SUCCESS) {
|
|
DEBUG2(printk("scsi%ld: %s: failed status %04X\n",
|
|
ha->host_no, __func__, mbox_sts[0]));
|
|
return QLA_ERROR;
|
|
}
|
|
return QLA_SUCCESS;
|
|
}
|
|
|
|
static int qla4xxx_req_ddb_entry(struct scsi_qla_host *ha, uint32_t *ddb_index)
|
|
{
|
|
uint32_t mbox_cmd[MBOX_REG_COUNT];
|
|
uint32_t mbox_sts[MBOX_REG_COUNT];
|
|
|
|
memset(&mbox_cmd, 0, sizeof(mbox_cmd));
|
|
memset(&mbox_sts, 0, sizeof(mbox_sts));
|
|
|
|
mbox_cmd[0] = MBOX_CMD_REQUEST_DATABASE_ENTRY;
|
|
mbox_cmd[1] = MAX_PRST_DEV_DB_ENTRIES;
|
|
|
|
if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0], &mbox_sts[0]) !=
|
|
QLA_SUCCESS) {
|
|
if (mbox_sts[0] == MBOX_STS_COMMAND_ERROR) {
|
|
*ddb_index = mbox_sts[2];
|
|
} else {
|
|
DEBUG2(printk("scsi%ld: %s: failed status %04X\n",
|
|
ha->host_no, __func__, mbox_sts[0]));
|
|
return QLA_ERROR;
|
|
}
|
|
} else {
|
|
*ddb_index = MAX_PRST_DEV_DB_ENTRIES;
|
|
}
|
|
|
|
return QLA_SUCCESS;
|
|
}
|
|
|
|
|
|
int qla4xxx_send_tgts(struct scsi_qla_host *ha, char *ip, uint16_t port)
|
|
{
|
|
struct dev_db_entry *fw_ddb_entry;
|
|
dma_addr_t fw_ddb_entry_dma;
|
|
uint32_t ddb_index;
|
|
int ret_val = QLA_SUCCESS;
|
|
|
|
|
|
fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev,
|
|
sizeof(*fw_ddb_entry),
|
|
&fw_ddb_entry_dma, GFP_KERNEL);
|
|
if (!fw_ddb_entry) {
|
|
DEBUG2(printk("scsi%ld: %s: Unable to allocate dma buffer.\n",
|
|
ha->host_no, __func__));
|
|
ret_val = QLA_ERROR;
|
|
goto qla4xxx_send_tgts_exit;
|
|
}
|
|
|
|
ret_val = qla4xxx_get_default_ddb(ha, fw_ddb_entry_dma);
|
|
if (ret_val != QLA_SUCCESS)
|
|
goto qla4xxx_send_tgts_exit;
|
|
|
|
ret_val = qla4xxx_req_ddb_entry(ha, &ddb_index);
|
|
if (ret_val != QLA_SUCCESS)
|
|
goto qla4xxx_send_tgts_exit;
|
|
|
|
memset(fw_ddb_entry->iscsi_alias, 0,
|
|
sizeof(fw_ddb_entry->iscsi_alias));
|
|
|
|
memset(fw_ddb_entry->iscsi_name, 0,
|
|
sizeof(fw_ddb_entry->iscsi_name));
|
|
|
|
memset(fw_ddb_entry->ip_addr, 0, sizeof(fw_ddb_entry->ip_addr));
|
|
memset(fw_ddb_entry->tgt_addr, 0,
|
|
sizeof(fw_ddb_entry->tgt_addr));
|
|
|
|
fw_ddb_entry->options = (DDB_OPT_DISC_SESSION | DDB_OPT_TARGET);
|
|
fw_ddb_entry->port = cpu_to_le16(ntohs(port));
|
|
|
|
fw_ddb_entry->ip_addr[0] = *ip;
|
|
fw_ddb_entry->ip_addr[1] = *(ip + 1);
|
|
fw_ddb_entry->ip_addr[2] = *(ip + 2);
|
|
fw_ddb_entry->ip_addr[3] = *(ip + 3);
|
|
|
|
ret_val = qla4xxx_set_ddb_entry(ha, ddb_index, fw_ddb_entry_dma);
|
|
|
|
qla4xxx_send_tgts_exit:
|
|
dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
|
|
fw_ddb_entry, fw_ddb_entry_dma);
|
|
return ret_val;
|
|
}
|
|
|