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b892afd1e6
Michal Ostrowski points out what the real problem was: the spaces at the start of the definition of the 'checker-shell' make function. Cc: Michal Ostrowski <mostrows@watson.ibm.com> Acked-by: David Miller <davem@davemloft.net> Acked-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Acked-by: Oleg Verych <olecom@flower.upol.cz> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
225 lines
8.2 KiB
Text
225 lines
8.2 KiB
Text
####
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# kbuild: Generic definitions
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# Convenient constants
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comma := ,
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squote := '
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empty :=
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space := $(empty) $(empty)
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###
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# Name of target with a '.' as filename prefix. foo/bar.o => foo/.bar.o
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dot-target = $(dir $@).$(notdir $@)
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###
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# The temporary file to save gcc -MD generated dependencies must not
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# contain a comma
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depfile = $(subst $(comma),_,$(dot-target).d)
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###
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# filename of target with directory and extension stripped
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basetarget = $(basename $(notdir $@))
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###
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# Escape single quote for use in echo statements
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escsq = $(subst $(squote),'\$(squote)',$1)
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###
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# filechk is used to check if the content of a generated file is updated.
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# Sample usage:
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# define filechk_sample
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# echo $KERNELRELEASE
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# endef
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# version.h : Makefile
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# $(call filechk,sample)
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# The rule defined shall write to stdout the content of the new file.
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# The existing file will be compared with the new one.
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# - If no file exist it is created
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# - If the content differ the new file is used
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# - If they are equal no change, and no timestamp update
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# - stdin is piped in from the first prerequisite ($<) so one has
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# to specify a valid file as first prerequisite (often the kbuild file)
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define filechk
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$(Q)set -e; \
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echo ' CHK $@'; \
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mkdir -p $(dir $@); \
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$(filechk_$(1)) < $< > $@.tmp; \
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if [ -r $@ ] && cmp -s $@ $@.tmp; then \
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rm -f $@.tmp; \
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else \
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echo ' UPD $@'; \
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mv -f $@.tmp $@; \
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fi
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endef
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######
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# gcc support functions
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# See documentation in Documentation/kbuild/makefiles.txt
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# checker-shell
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# Usage: option = $(call checker-shell,$(CC)...-o $$OUT,option-ok,otherwise)
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# Exit code chooses option. $$OUT is safe location for needless output.
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define checker-shell
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$(shell set -e; \
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DIR=$(KBUILD_EXTMOD); \
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cd $${DIR:-$(objtree)}; \
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OUT=$$PWD/.$$$$.null; \
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if $(1) >/dev/null 2>&1; \
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then echo "$(2)"; \
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else echo "$(3)"; \
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fi; \
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rm -f $$OUT)
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endef
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# as-option
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# Usage: cflags-y += $(call as-option,-Wa$(comma)-isa=foo,)
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as-option = $(call checker-shell,\
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$(CC) $(CFLAGS) $(1) -c -xassembler /dev/null -o $$OUT,$(1),$(2))
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# as-instr
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# Usage: cflags-y += $(call as-instr,instr,option1,option2)
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as-instr = $(call checker-shell,\
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printf "$(1)" | $(CC) $(AFLAGS) -c -xassembler -o $$OUT -,$(2),$(3))
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# cc-option
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# Usage: cflags-y += $(call cc-option,-march=winchip-c6,-march=i586)
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cc-option = $(call checker-shell,\
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$(CC) $(CFLAGS) $(if $(3),$(3),$(1)) -S -xc /dev/null -o $$OUT,$(1),$(2))
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# cc-option-yn
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# Usage: flag := $(call cc-option-yn,-march=winchip-c6)
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cc-option-yn = $(call cc-option,"y","n",$(1))
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# cc-option-align
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# Prefix align with either -falign or -malign
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cc-option-align = $(subst -functions=0,,\
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$(call cc-option,-falign-functions=0,-malign-functions=0))
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# cc-version
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# Usage gcc-ver := $(call cc-version,$(CC))
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cc-version = $(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-version.sh $(CC))
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# cc-ifversion
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# Usage: EXTRA_CFLAGS += $(call cc-ifversion, -lt, 0402, -O1)
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cc-ifversion = $(shell [ $(call cc-version, $(CC)) $(1) $(2) ] && echo $(3))
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# ld-option
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# Usage: ldflags += $(call ld-option, -Wl$(comma)--hash-style=both)
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ld-option = $(call checker-shell,\
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$(CC) $(1) -nostdlib -xc /dev/null -o $$OUT,$(1),$(2))
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######
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# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj=
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# Usage:
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# $(Q)$(MAKE) $(build)=dir
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build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj
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# Prefix -I with $(srctree) if it is not an absolute path,
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# add original to the end
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addtree = $(if \
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$(filter-out -I/%,$(1)),$(patsubst -I%,-I$(srctree)/%,$(1))) $(1)
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# Find all -I options and call addtree
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flags = $(foreach o,$($(1)),\
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$(if $(filter -I%,$(o)),$(call addtree,$(o)),$(o)))
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# echo command.
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# Short version is used, if $(quiet) equals `quiet_', otherwise full one.
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echo-cmd = $(if $($(quiet)cmd_$(1)),\
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echo ' $(call escsq,$($(quiet)cmd_$(1)))$(echo-why)';)
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# printing commands
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cmd = @$(echo-cmd) $(cmd_$(1))
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# Add $(obj)/ for paths that are not absolute
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objectify = $(foreach o,$(1),$(if $(filter /%,$(o)),$(o),$(obj)/$(o)))
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###
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# if_changed - execute command if any prerequisite is newer than
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# target, or command line has changed
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# if_changed_dep - as if_changed, but uses fixdep to reveal dependencies
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# including used config symbols
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# if_changed_rule - as if_changed but execute rule instead
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# See Documentation/kbuild/makefiles.txt for more info
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ifneq ($(KBUILD_NOCMDDEP),1)
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# Check if both arguments has same arguments. Result is empty string, if equal.
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# User may override this check using make KBUILD_NOCMDDEP=1
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arg-check = $(strip $(filter-out $(cmd_$(1)), $(cmd_$@)) \
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$(filter-out $(cmd_$@), $(cmd_$(1))) )
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endif
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# >'< substitution is for echo to work,
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# >$< substitution to preserve $ when reloading .cmd file
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# note: when using inline perl scripts [perl -e '...$$t=1;...']
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# in $(cmd_xxx) double $$ your perl vars
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make-cmd = $(subst \#,\\\#,$(subst $$,$$$$,$(call escsq,$(cmd_$(1)))))
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# Find any prerequisites that is newer than target or that does not exist.
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# PHONY targets skipped in both cases.
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any-prereq = $(filter-out $(PHONY),$?) $(filter-out $(PHONY) $(wildcard $^),$^)
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# Execute command if command has changed or prerequisite(s) are updated.
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#
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if_changed = $(if $(strip $(any-prereq) $(arg-check)), \
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@set -e; \
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$(echo-cmd) $(cmd_$(1)); \
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echo 'cmd_$@ := $(make-cmd)' > $(dot-target).cmd)
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# Execute the command and also postprocess generated .d dependencies file.
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#
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if_changed_dep = $(if $(strip $(any-prereq) $(arg-check) ), \
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@set -e; \
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$(echo-cmd) $(cmd_$(1)); \
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scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' > $(dot-target).tmp;\
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rm -f $(depfile); \
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mv -f $(dot-target).tmp $(dot-target).cmd)
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# Will check if $(cmd_foo) changed, or any of the prerequisites changed,
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# and if so will execute $(rule_foo).
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# Usage: $(call if_changed_rule,foo)
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#
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if_changed_rule = $(if $(strip $(any-prereq) $(arg-check) ), \
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@set -e; \
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$(rule_$(1)))
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###
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# why - tell why a a target got build
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# enabled by make V=2
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# Output (listed in the order they are checked):
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# (1) - due to target is PHONY
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# (2) - due to target missing
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# (3) - due to: file1.h file2.h
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# (4) - due to command line change
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# (5) - due to missing .cmd file
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# (6) - due to target not in $(targets)
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# (1) PHONY targets are always build
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# (2) No target, so we better build it
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# (3) Prerequisite is newer than target
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# (4) The command line stored in the file named dir/.target.cmd
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# differed from actual command line. This happens when compiler
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# options changes
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# (5) No dir/.target.cmd file (used to store command line)
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# (6) No dir/.target.cmd file and target not listed in $(targets)
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# This is a good hint that there is a bug in the kbuild file
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ifeq ($(KBUILD_VERBOSE),2)
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why = \
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$(if $(filter $@, $(PHONY)),- due to target is PHONY, \
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$(if $(wildcard $@), \
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$(if $(strip $(any-prereq)),- due to: $(any-prereq), \
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$(if $(arg-check), \
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$(if $(cmd_$@),- due to command line change, \
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$(if $(filter $@, $(targets)), \
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- due to missing .cmd file, \
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- due to $(notdir $@) not in $$(targets) \
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) \
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) \
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) \
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), \
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- due to target missing \
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) \
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)
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echo-why = $(call escsq, $(strip $(why)))
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endif
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