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The VFPv3D16 is a VFPv3 CPU configuration where only 16 double registers are present, as the VFPv2 configuration. This patch adds the corresponding hwcap bits so that applications or debuggers have more information about the supported features. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
32 lines
729 B
C
32 lines
729 B
C
#ifndef __ASMARM_HWCAP_H
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#define __ASMARM_HWCAP_H
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/*
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* HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP
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*/
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#define HWCAP_SWP 1
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#define HWCAP_HALF 2
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#define HWCAP_THUMB 4
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#define HWCAP_26BIT 8 /* Play it safe */
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#define HWCAP_FAST_MULT 16
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#define HWCAP_FPA 32
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#define HWCAP_VFP 64
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#define HWCAP_EDSP 128
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#define HWCAP_JAVA 256
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#define HWCAP_IWMMXT 512
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#define HWCAP_CRUNCH 1024
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#define HWCAP_THUMBEE 2048
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#define HWCAP_NEON 4096
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#define HWCAP_VFPv3 8192
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#define HWCAP_VFPv3D16 16384
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#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
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/*
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* This yields a mask that user programs can use to figure out what
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* instruction set this cpu supports.
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*/
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#define ELF_HWCAP (elf_hwcap)
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extern unsigned int elf_hwcap;
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#endif
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#endif
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