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a6d297f008
Especially with Sandisk SDHC cards, the second SWITCH command was failing with a timeout and the card was not recognized at all. However if the system was busy, or debugging was enabled, or a udelay(100) was inserted before the second SWITCH command in the core code, then the timing was so that the card started to work. With some unusual block sizes, the data FIFO status doesn't indicate a "empty" state right away when the data transfer is done. Queuing another data transfer in that condition results in a transfer timeout. The empty FIFO bit eventually get set by itself in less than 50 usecs when it is not set right away. So let's just poll for that bit before configuring the controller with a new data transfer. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Pierre Ossman <pierre@ossman.eu> |
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