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a28724b0fb
Reserve the bus number range used by the Virtual Function when pcibios_assign_all_busses() returns true. Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
247 lines
5.3 KiB
C
247 lines
5.3 KiB
C
/*
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* drivers/pci/iov.c
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*
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* Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
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*
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* PCI Express I/O Virtualization (IOV) support.
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* Single Root IOV 1.0
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*/
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#include <linux/pci.h>
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#include <linux/mutex.h>
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#include <linux/string.h>
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#include <linux/delay.h>
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#include "pci.h"
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static inline u8 virtfn_bus(struct pci_dev *dev, int id)
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{
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return dev->bus->number + ((dev->devfn + dev->sriov->offset +
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dev->sriov->stride * id) >> 8);
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}
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static inline u8 virtfn_devfn(struct pci_dev *dev, int id)
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{
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return (dev->devfn + dev->sriov->offset +
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dev->sriov->stride * id) & 0xff;
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}
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static int sriov_init(struct pci_dev *dev, int pos)
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{
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int i;
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int rc;
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int nres;
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u32 pgsz;
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u16 ctrl, total, offset, stride;
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struct pci_sriov *iov;
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struct resource *res;
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struct pci_dev *pdev;
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if (dev->pcie_type != PCI_EXP_TYPE_RC_END &&
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dev->pcie_type != PCI_EXP_TYPE_ENDPOINT)
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return -ENODEV;
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pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
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if (ctrl & PCI_SRIOV_CTRL_VFE) {
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pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
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ssleep(1);
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}
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pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
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if (!total)
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return 0;
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ctrl = 0;
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list_for_each_entry(pdev, &dev->bus->devices, bus_list)
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if (pdev->is_physfn)
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goto found;
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pdev = NULL;
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if (pci_ari_enabled(dev->bus))
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ctrl |= PCI_SRIOV_CTRL_ARI;
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found:
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pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
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pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, total);
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pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
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pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
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if (!offset || (total > 1 && !stride))
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return -EIO;
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pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
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i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
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pgsz &= ~((1 << i) - 1);
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if (!pgsz)
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return -EIO;
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pgsz &= ~(pgsz - 1);
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pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
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nres = 0;
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for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
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res = dev->resource + PCI_IOV_RESOURCES + i;
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i += __pci_read_base(dev, pci_bar_unknown, res,
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pos + PCI_SRIOV_BAR + i * 4);
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if (!res->flags)
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continue;
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if (resource_size(res) & (PAGE_SIZE - 1)) {
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rc = -EIO;
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goto failed;
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}
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res->end = res->start + resource_size(res) * total - 1;
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nres++;
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}
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iov = kzalloc(sizeof(*iov), GFP_KERNEL);
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if (!iov) {
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rc = -ENOMEM;
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goto failed;
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}
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iov->pos = pos;
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iov->nres = nres;
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iov->ctrl = ctrl;
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iov->total = total;
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iov->offset = offset;
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iov->stride = stride;
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iov->pgsz = pgsz;
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iov->self = dev;
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pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
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pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
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if (pdev)
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iov->dev = pci_dev_get(pdev);
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else {
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iov->dev = dev;
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mutex_init(&iov->lock);
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}
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dev->sriov = iov;
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dev->is_physfn = 1;
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return 0;
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failed:
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for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
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res = dev->resource + PCI_IOV_RESOURCES + i;
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res->flags = 0;
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}
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return rc;
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}
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static void sriov_release(struct pci_dev *dev)
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{
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if (dev == dev->sriov->dev)
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mutex_destroy(&dev->sriov->lock);
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else
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pci_dev_put(dev->sriov->dev);
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kfree(dev->sriov);
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dev->sriov = NULL;
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}
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static void sriov_restore_state(struct pci_dev *dev)
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{
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int i;
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u16 ctrl;
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struct pci_sriov *iov = dev->sriov;
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pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
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if (ctrl & PCI_SRIOV_CTRL_VFE)
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return;
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for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
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pci_update_resource(dev, i);
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pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
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pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
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if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
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msleep(100);
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}
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/**
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* pci_iov_init - initialize the IOV capability
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* @dev: the PCI device
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*
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* Returns 0 on success, or negative on failure.
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*/
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int pci_iov_init(struct pci_dev *dev)
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{
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int pos;
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if (!dev->is_pcie)
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return -ENODEV;
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pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
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if (pos)
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return sriov_init(dev, pos);
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return -ENODEV;
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}
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/**
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* pci_iov_release - release resources used by the IOV capability
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* @dev: the PCI device
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*/
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void pci_iov_release(struct pci_dev *dev)
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{
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if (dev->is_physfn)
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sriov_release(dev);
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}
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/**
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* pci_iov_resource_bar - get position of the SR-IOV BAR
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* @dev: the PCI device
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* @resno: the resource number
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* @type: the BAR type to be filled in
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*
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* Returns position of the BAR encapsulated in the SR-IOV capability.
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*/
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int pci_iov_resource_bar(struct pci_dev *dev, int resno,
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enum pci_bar_type *type)
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{
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if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)
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return 0;
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BUG_ON(!dev->is_physfn);
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*type = pci_bar_unknown;
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return dev->sriov->pos + PCI_SRIOV_BAR +
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4 * (resno - PCI_IOV_RESOURCES);
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}
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/**
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* pci_restore_iov_state - restore the state of the IOV capability
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* @dev: the PCI device
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*/
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void pci_restore_iov_state(struct pci_dev *dev)
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{
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if (dev->is_physfn)
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sriov_restore_state(dev);
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}
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/**
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* pci_iov_bus_range - find bus range used by Virtual Function
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* @bus: the PCI bus
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*
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* Returns max number of buses (exclude current one) used by Virtual
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* Functions.
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*/
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int pci_iov_bus_range(struct pci_bus *bus)
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{
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int max = 0;
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u8 busnr;
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struct pci_dev *dev;
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list_for_each_entry(dev, &bus->devices, bus_list) {
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if (!dev->is_physfn)
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continue;
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busnr = virtfn_bus(dev, dev->sriov->total - 1);
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if (busnr > max)
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max = busnr;
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}
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return max ? max - bus->number : 0;
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}
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