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On my Intel chipset (965GM), the GTT is entirely erased across suspend/resume. This patch simply re-plays the current mapping at resume time to restore the table.=20 I noticed this once I started relying on persistent GTT mappings across VT switch in our GEM work -- the old X server and DRM code carefully unbind all memory from the GTT on VT switch, but GEM does not bother. I placed the list management and rewrite code in the generic layer on the assumption that it will be needed on other hardware, but I did not add the rewrite call to anything other than the Intel resume function. Keep a list of current GATT mappings. At resume time, rewrite them into the GATT. This is needed on Intel (at least) as the entire GATT is cleared across suspend/resume. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Keith Packard <keithp@keithp.com> Cc: Dave Jones <davej@codemonkey.org.uk> Cc: Andi Kleen <andi@firstfloor.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
109 lines
3.5 KiB
C
109 lines
3.5 KiB
C
/*
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* AGPGART backend specific includes. Not for userspace consumption.
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*
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* Copyright (C) 2004 Silicon Graphics, Inc.
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* Copyright (C) 2002-2003 Dave Jones
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* Copyright (C) 1999 Jeff Hartmann
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* Copyright (C) 1999 Precision Insight, Inc.
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* Copyright (C) 1999 Xi Graphics, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
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* OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef _AGP_BACKEND_H
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#define _AGP_BACKEND_H 1
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#include <linux/list.h>
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enum chipset_type {
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NOT_SUPPORTED,
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SUPPORTED,
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};
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struct agp_version {
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u16 major;
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u16 minor;
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};
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struct agp_kern_info {
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struct agp_version version;
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struct pci_dev *device;
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enum chipset_type chipset;
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unsigned long mode;
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unsigned long aper_base;
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size_t aper_size;
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int max_memory; /* In pages */
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int current_memory;
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bool cant_use_aperture;
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unsigned long page_mask;
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struct vm_operations_struct *vm_ops;
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};
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/*
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* The agp_memory structure has information about the block of agp memory
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* allocated. A caller may manipulate the next and prev pointers to link
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* each allocated item into a list. These pointers are ignored by the backend.
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* Everything else should never be written to, but the caller may read any of
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* the items to determine the status of this block of agp memory.
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*/
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struct agp_bridge_data;
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struct agp_memory {
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struct agp_memory *next;
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struct agp_memory *prev;
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struct agp_bridge_data *bridge;
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unsigned long *memory;
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size_t page_count;
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int key;
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int num_scratch_pages;
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off_t pg_start;
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u32 type;
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u32 physical;
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bool is_bound;
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bool is_flushed;
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bool vmalloc_flag;
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/* list of agp_memory mapped to the aperture */
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struct list_head mapped_list;
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};
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#define AGP_NORMAL_MEMORY 0
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#define AGP_USER_TYPES (1 << 16)
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#define AGP_USER_MEMORY (AGP_USER_TYPES)
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#define AGP_USER_CACHED_MEMORY (AGP_USER_TYPES + 1)
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extern struct agp_bridge_data *agp_bridge;
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extern struct list_head agp_bridges;
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extern struct agp_bridge_data *(*agp_find_bridge)(struct pci_dev *);
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extern void agp_free_memory(struct agp_memory *);
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extern struct agp_memory *agp_allocate_memory(struct agp_bridge_data *, size_t, u32);
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extern int agp_copy_info(struct agp_bridge_data *, struct agp_kern_info *);
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extern int agp_bind_memory(struct agp_memory *, off_t);
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extern int agp_unbind_memory(struct agp_memory *);
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extern int agp_rebind_memory(void);
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extern void agp_enable(struct agp_bridge_data *, u32);
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extern struct agp_bridge_data *agp_backend_acquire(struct pci_dev *);
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extern void agp_backend_release(struct agp_bridge_data *);
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extern void agp_flush_chipset(struct agp_bridge_data *);
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#endif /* _AGP_BACKEND_H */
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