David Daney cd847b7857 MIPS: Octeon: Use lockless interrupt controller operations when possible. ... Some newer Octeon chips have registers that allow lockless operation of the interrupt controller. Take advantage of them. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2009-11-02 12:00:07 +01:00
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executive	MIPS: Export erratum function needed by octeon-ethernet driver.	2009-06-17 11:06:29 +01:00
csrc-octeon.c	MIPS: Cavium: Add struct clocksource * argument to octeon_cvmcount_read()	2009-05-14 13:50:29 +01:00
dma-octeon.c	MIPS: Reorganize Cavium OCTEON PCI support.	2009-07-03 15:45:29 +01:00
flash_setup.c	MIPS: Stop using <asm-generic/int-l64.h>.	2009-03-30 14:49:41 +02:00
Kconfig
Makefile	MIPS: Octeon: Move some platform device registration to its own file.	2009-09-17 20:07:52 +02:00
octeon-irq.c	MIPS: Octeon: Use lockless interrupt controller operations when possible.	2009-11-02 12:00:07 +01:00
octeon-memcpy.S
octeon-platform.c	MIPS: Octeon: Move some platform device registration to its own file.	2009-09-17 20:07:52 +02:00
octeon_boot.h	MIPS: Cavium: Add CPU hotplugging code.	2009-06-24 18:34:40 +01:00
serial.c
setup.c	MIPS: Octeon: Move some platform device registration to its own file.	2009-09-17 20:07:52 +02:00
smp.c	MIPS: Octeon: Fix compile error in arch/mips/cavium-octeon/smp.c	2009-11-02 12:00:01 +01:00