aha/arch/mips/txx9
Atsushi Nemoto fcc152f3bf MIPS: TXx9: Fix spi-baseclk value
TXx9 SPI bit rate is calculated by:
	fBR = fSPI / 2 / (n + 1)
	(fSPI is SPI master clock freq, i.e. imbusclk freq.)
So use imbus_clk / 2 as a spi-baseclk.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:07 +01:00
..
generic MIPS: TXx9: Fix spi-baseclk value 2009-11-02 12:00:07 +01:00
jmr3927 MIPS: TXx9: IOC LED support 2008-10-11 16:18:49 +01:00
rbtx4927 MIPS: TXx9: Add ACLC support 2009-06-17 11:06:25 +01:00
rbtx4938 MIPS: TXx9: Add SRAMC support 2009-06-17 11:06:27 +01:00
rbtx4939 MIPS: RBTX4939: Fix IOC pin-enable register updating 2009-08-03 17:52:44 +01:00
Kconfig MIPS: TXx9: Add ACLC support 2009-06-17 11:06:25 +01:00