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https://github.com/adulau/aha.git
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1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
156 lines
3.7 KiB
C
156 lines
3.7 KiB
C
/*
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* IA-32 exception handlers
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*
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* Copyright (C) 2000 Asit K. Mallick <asit.k.mallick@intel.com>
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* Copyright (C) 2001-2002 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*
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* 06/16/00 A. Mallick added siginfo for most cases (close to IA32)
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* 09/29/00 D. Mosberger added ia32_intercept()
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*/
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include "ia32priv.h"
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#include <asm/intrinsics.h>
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#include <asm/ptrace.h>
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int
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ia32_intercept (struct pt_regs *regs, unsigned long isr)
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{
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switch ((isr >> 16) & 0xff) {
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case 0: /* Instruction intercept fault */
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case 4: /* Locked Data reference fault */
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case 1: /* Gate intercept trap */
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return -1;
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case 2: /* System flag trap */
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if (((isr >> 14) & 0x3) >= 2) {
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/* MOV SS, POP SS instructions */
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ia64_psr(regs)->id = 1;
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return 0;
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} else
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return -1;
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}
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return -1;
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}
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int
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ia32_exception (struct pt_regs *regs, unsigned long isr)
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{
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struct siginfo siginfo;
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/* initialize these fields to avoid leaking kernel bits to user space: */
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siginfo.si_errno = 0;
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siginfo.si_flags = 0;
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siginfo.si_isr = 0;
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siginfo.si_imm = 0;
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switch ((isr >> 16) & 0xff) {
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case 1:
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case 2:
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siginfo.si_signo = SIGTRAP;
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if (isr == 0)
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siginfo.si_code = TRAP_TRACE;
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else if (isr & 0x4)
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siginfo.si_code = TRAP_BRANCH;
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else
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siginfo.si_code = TRAP_BRKPT;
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break;
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case 3:
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siginfo.si_signo = SIGTRAP;
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siginfo.si_code = TRAP_BRKPT;
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break;
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case 0: /* Divide fault */
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siginfo.si_signo = SIGFPE;
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siginfo.si_code = FPE_INTDIV;
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break;
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case 4: /* Overflow */
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case 5: /* Bounds fault */
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siginfo.si_signo = SIGFPE;
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siginfo.si_code = 0;
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break;
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case 6: /* Invalid Op-code */
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siginfo.si_signo = SIGILL;
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siginfo.si_code = ILL_ILLOPN;
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break;
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case 7: /* FP DNA */
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case 8: /* Double Fault */
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case 9: /* Invalid TSS */
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case 11: /* Segment not present */
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case 12: /* Stack fault */
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case 13: /* General Protection Fault */
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siginfo.si_signo = SIGSEGV;
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siginfo.si_code = 0;
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break;
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case 16: /* Pending FP error */
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{
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unsigned long fsr, fcr;
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fsr = ia64_getreg(_IA64_REG_AR_FSR);
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fcr = ia64_getreg(_IA64_REG_AR_FCR);
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siginfo.si_signo = SIGFPE;
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/*
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* (~cwd & swd) will mask out exceptions that are not set to unmasked
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* status. 0x3f is the exception bits in these regs, 0x200 is the
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* C1 reg you need in case of a stack fault, 0x040 is the stack
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* fault bit. We should only be taking one exception at a time,
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* so if this combination doesn't produce any single exception,
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* then we have a bad program that isn't synchronizing its FPU usage
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* and it will suffer the consequences since we won't be able to
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* fully reproduce the context of the exception
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*/
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siginfo.si_isr = isr;
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siginfo.si_flags = __ISR_VALID;
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switch(((~fcr) & (fsr & 0x3f)) | (fsr & 0x240)) {
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case 0x000:
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default:
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siginfo.si_code = 0;
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break;
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case 0x001: /* Invalid Op */
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case 0x040: /* Stack Fault */
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case 0x240: /* Stack Fault | Direction */
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siginfo.si_code = FPE_FLTINV;
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break;
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case 0x002: /* Denormalize */
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case 0x010: /* Underflow */
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siginfo.si_code = FPE_FLTUND;
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break;
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case 0x004: /* Zero Divide */
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siginfo.si_code = FPE_FLTDIV;
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break;
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case 0x008: /* Overflow */
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siginfo.si_code = FPE_FLTOVF;
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break;
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case 0x020: /* Precision */
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siginfo.si_code = FPE_FLTRES;
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break;
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}
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break;
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}
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case 17: /* Alignment check */
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siginfo.si_signo = SIGSEGV;
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siginfo.si_code = BUS_ADRALN;
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break;
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case 19: /* SSE Numeric error */
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siginfo.si_signo = SIGFPE;
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siginfo.si_code = 0;
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break;
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default:
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return -1;
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}
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force_sig_info(siginfo.si_signo, &siginfo, current);
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return 0;
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}
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