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3b920cef34
This patch fix compilation problem of start-up codes. (head-nommu.S, arch/arm/kernel/Makefile) Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
85 lines
2.2 KiB
ArmAsm
85 lines
2.2 KiB
ArmAsm
/*
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* linux/arch/arm/kernel/head-nommu.S
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*
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* Copyright (C) 1994-2002 Russell King
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* Copyright (C) 2003-2006 Hyok S. Choi
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Common kernel startup code (non-paged MM)
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* for 32-bit CPUs which has a process ID register(CP15).
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*
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*/
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#include <linux/config.h>
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/assembler.h>
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#include <asm/mach-types.h>
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#include <asm/procinfo.h>
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#include <asm/ptrace.h>
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#include <asm/thread_info.h>
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#include <asm/system.h>
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#define PROCINFO_INITFUNC 12
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#define MACHINFO_TYPE 0
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/*
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* Kernel startup entry point.
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* ---------------------------
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*
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* This is normally called from the decompressor code. The requirements
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* are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
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* r1 = machine nr.
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*
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* See linux/arch/arm/tools/mach-types for the complete list of machine
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* numbers for r1.
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*
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*/
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__INIT
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.type stext, %function
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ENTRY(stext)
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msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ ensure svc mode
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@ and irqs disabled
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mrc p15, 0, r9, c0, c0 @ get processor id
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bl __lookup_processor_type @ r5=procinfo r9=cpuid
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movs r10, r5 @ invalid processor (r5=0)?
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beq __error_p @ yes, error 'p'
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bl __lookup_machine_type @ r5=machinfo
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movs r8, r5 @ invalid machine (r5=0)?
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beq __error_a @ yes, error 'a'
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ldr r13, __switch_data @ address to jump to after
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@ the initialization is done
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adr lr, __after_proc_init @ return (PIC) address
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add pc, r10, #PROCINFO_INITFUNC
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/*
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* Set the Control Register and Read the process ID.
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*/
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.type __after_proc_init, %function
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__after_proc_init:
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mrc p15, 0, r0, c1, c0, 0 @ read control reg
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#ifdef CONFIG_ALIGNMENT_TRAP
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orr r0, r0, #CR_A
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#else
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bic r0, r0, #CR_A
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#endif
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#ifdef CONFIG_CPU_DCACHE_DISABLE
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bic r0, r0, #CR_C
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#endif
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#ifdef CONFIG_CPU_BPREDICT_DISABLE
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bic r0, r0, #CR_Z
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#endif
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#ifdef CONFIG_CPU_ICACHE_DISABLE
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bic r0, r0, #CR_I
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#endif
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mcr p15, 0, r0, c1, c0, 0 @ write control reg
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mov pc, r13 @ clear the BSS and jump
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@ to start_kernel
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.ltorg
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#include "head-common.S"
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