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This patch adds the SPU event based profiling funcitonality for the IBM Cell processor. Previously, the CELL OProfile kernel code supported PPU event, PPU cycle profiling and SPU cycle profiling. The addition of SPU event profiling allows the users to identify where in their SPU code various SPU evnets are occuring. This should help users further identify issues with their code. Note, SPU profiling has some limitations due to HW constraints. Only one event at a time can be used for profiling and SPU event profiling must be time sliced across all of the SPUs in a node. The patch adds a new arch specific file to the OProfile file system. The file has bit 0 set to indicate that the kernel supports SPU event profiling. The user tool must check this file/bit to make sure the kernel supports SPU event profiling before trying to do SPU event profiling. The user tool check is part of the user tool patch for SPU event profiling. Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Robert Richter <robert.richter@amd.com>
140 lines
3 KiB
C
140 lines
3 KiB
C
/*
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* Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
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*
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* Based on alpha version.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _ASM_POWERPC_OPROFILE_IMPL_H
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#define _ASM_POWERPC_OPROFILE_IMPL_H
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#ifdef __KERNEL__
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#define OP_MAX_COUNTER 8
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/* Per-counter configuration as set via oprofilefs. */
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struct op_counter_config {
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unsigned long enabled;
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unsigned long event;
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unsigned long count;
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/* Classic doesn't support per-counter user/kernel selection */
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unsigned long kernel;
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unsigned long user;
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unsigned long unit_mask;
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};
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/* System-wide configuration as set via oprofilefs. */
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struct op_system_config {
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#ifdef CONFIG_PPC64
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unsigned long mmcr0;
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unsigned long mmcr1;
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unsigned long mmcra;
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#ifdef CONFIG_OPROFILE_CELL
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/* Register for oprofile user tool to check cell kernel profiling
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* suport.
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*/
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unsigned long cell_support;
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#endif
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#endif
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unsigned long enable_kernel;
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unsigned long enable_user;
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};
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/* Per-arch configuration */
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struct op_powerpc_model {
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int (*reg_setup) (struct op_counter_config *,
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struct op_system_config *,
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int num_counters);
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int (*cpu_setup) (struct op_counter_config *);
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int (*start) (struct op_counter_config *);
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int (*global_start) (struct op_counter_config *);
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void (*stop) (void);
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void (*global_stop) (void);
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int (*sync_start)(void);
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int (*sync_stop)(void);
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void (*handle_interrupt) (struct pt_regs *,
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struct op_counter_config *);
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int num_counters;
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};
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extern struct op_powerpc_model op_model_fsl_emb;
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extern struct op_powerpc_model op_model_rs64;
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extern struct op_powerpc_model op_model_power4;
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extern struct op_powerpc_model op_model_7450;
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extern struct op_powerpc_model op_model_cell;
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extern struct op_powerpc_model op_model_pa6t;
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/* All the classic PPC parts use these */
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static inline unsigned int classic_ctr_read(unsigned int i)
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{
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switch(i) {
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case 0:
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return mfspr(SPRN_PMC1);
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case 1:
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return mfspr(SPRN_PMC2);
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case 2:
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return mfspr(SPRN_PMC3);
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case 3:
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return mfspr(SPRN_PMC4);
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case 4:
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return mfspr(SPRN_PMC5);
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case 5:
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return mfspr(SPRN_PMC6);
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/* No PPC32 chip has more than 6 so far */
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#ifdef CONFIG_PPC64
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case 6:
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return mfspr(SPRN_PMC7);
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case 7:
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return mfspr(SPRN_PMC8);
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#endif
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default:
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return 0;
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}
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}
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static inline void classic_ctr_write(unsigned int i, unsigned int val)
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{
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switch(i) {
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case 0:
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mtspr(SPRN_PMC1, val);
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break;
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case 1:
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mtspr(SPRN_PMC2, val);
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break;
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case 2:
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mtspr(SPRN_PMC3, val);
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break;
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case 3:
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mtspr(SPRN_PMC4, val);
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break;
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case 4:
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mtspr(SPRN_PMC5, val);
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break;
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case 5:
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mtspr(SPRN_PMC6, val);
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break;
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/* No PPC32 chip has more than 6, yet */
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#ifdef CONFIG_PPC64
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case 6:
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mtspr(SPRN_PMC7, val);
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break;
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case 7:
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mtspr(SPRN_PMC8, val);
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break;
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#endif
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default:
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break;
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}
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}
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extern void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth);
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_OPROFILE_IMPL_H */
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