mirror of
https://github.com/adulau/aha.git
synced 2025-01-01 05:36:24 +00:00
2eaa7ec286
So far flush_cache_range() did't consider the I-cache largely because it
did rarely ever matter to real world code. This was working primarily
because normally code and data are don't share the same pages - with the
exception of MIPS16 code which uses address constants embedded between
the code. The following sequence of events may break the code:
o MIPS16 executable being loaded
o dynamic linker relocates the address constants embedded into the code:
o Uses mprotect(2) to make code pages PROT_READ|PROT_WRITE
o Performs the actual relocations by writing to the pages which likely
are COW. Because no PROT_EXEC is set I-cache coherence will not be
considered.
o Uses mprotect(2) to switch code pages back to PROT_READ|PROT_EXEC.
This results in a call to flush_cache_range() which also does not
consider I-caches.
o => executing the page just having been relocated may now result in the
I-cache getting refilled with stale data from memory.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||
|---|---|---|
| .. | ||
| au1000 | ||
| basler/excite | ||
| bcm47xx | ||
| boot | ||
| cobalt | ||
| configs | ||
| dec | ||
| emma2rh | ||
| fw | ||
| gt64120/wrppmc | ||
| jazz | ||
| jmr3927 | ||
| kernel | ||
| lasat | ||
| lemote/lm2e | ||
| lib | ||
| math-emu | ||
| mips-boards | ||
| mipssim | ||
| mm | ||
| oprofile | ||
| pci | ||
| philips/pnx8550 | ||
| pmc-sierra | ||
| sgi-ip22 | ||
| sgi-ip27 | ||
| sgi-ip32 | ||
| sibyte | ||
| sni | ||
| tx4927 | ||
| tx4938 | ||
| vr41xx | ||
| defconfig | ||
| Kconfig | ||
| Kconfig.debug | ||
| Makefile | ||