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24dc5f33ea
Update libata LLDs to use devres. Core layer is already converted to
support managed LLDs. This patch simplifies initialization and fixes
many resource related bugs in init failure and detach path. For
example, all converted drivers now handle ata_device_add() failure
gracefully without excessive resource rollback code.
As most resources are released automatically on driver detach, many
drivers don't need or can do with much simpler ->{port|host}_stop().
In general, stop callbacks are need iff port or host needs to be given
commands to shut it down. Note that freezing is enough in many cases
and ports are automatically frozen before being detached.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
247 lines
6.2 KiB
C
247 lines
6.2 KiB
C
/*
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* pata_hpt3x3 - HPT3x3 driver
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* (c) Copyright 2005-2006 Red Hat
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*
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* Was pata_hpt34x but the naming was confusing as it supported the
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* 343 and 363 so it has been renamed.
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*
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* Based on:
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* linux/drivers/ide/pci/hpt34x.c Version 0.40 Sept 10, 2002
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* Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
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*
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* May be copied or modified under the terms of the GNU General Public
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* License
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#define DRV_NAME "pata_hpt3x3"
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#define DRV_VERSION "0.4.2"
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static int hpt3x3_probe_init(struct ata_port *ap)
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{
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ap->cbl = ATA_CBL_PATA40;
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return ata_std_prereset(ap);
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}
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/**
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* hpt3x3_probe_reset - reset the hpt3x3 bus
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* @ap: ATA port to reset
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*
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* Perform the housekeeping when doing an ATA bus reeset. We just
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* need to force the cable type.
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*/
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static void hpt3x3_error_handler(struct ata_port *ap)
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{
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return ata_bmdma_drive_eh(ap, hpt3x3_probe_init, ata_std_softreset, NULL, ata_std_postreset);
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}
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/**
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* hpt3x3_set_piomode - PIO setup
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* @ap: ATA interface
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* @adev: device on the interface
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*
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* Set our PIO requirements. This is fairly simple on the HPT3x3 as
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* all we have to do is clear the MWDMA and UDMA bits then load the
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* mode number.
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*/
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static void hpt3x3_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u32 r1, r2;
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int dn = 2 * ap->port_no + adev->devno;
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pci_read_config_dword(pdev, 0x44, &r1);
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pci_read_config_dword(pdev, 0x48, &r2);
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/* Load the PIO timing number */
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r1 &= ~(7 << (3 * dn));
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r1 |= (adev->pio_mode - XFER_PIO_0) << (3 * dn);
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r2 &= ~(0x11 << dn); /* Clear MWDMA and UDMA bits */
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pci_write_config_dword(pdev, 0x44, r1);
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pci_write_config_dword(pdev, 0x48, r2);
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}
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/**
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* hpt3x3_set_dmamode - DMA timing setup
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* @ap: ATA interface
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* @adev: Device being configured
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*
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* Set up the channel for MWDMA or UDMA modes. Much the same as with
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* PIO, load the mode number and then set MWDMA or UDMA flag.
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*/
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static void hpt3x3_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u32 r1, r2;
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int dn = 2 * ap->port_no + adev->devno;
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int mode_num = adev->dma_mode & 0x0F;
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pci_read_config_dword(pdev, 0x44, &r1);
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pci_read_config_dword(pdev, 0x48, &r2);
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/* Load the timing number */
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r1 &= ~(7 << (3 * dn));
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r1 |= (mode_num << (3 * dn));
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r2 &= ~(0x11 << dn); /* Clear MWDMA and UDMA bits */
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if (adev->dma_mode >= XFER_UDMA_0)
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r2 |= 0x01 << dn; /* Ultra mode */
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else
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r2 |= 0x10 << dn; /* MWDMA */
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pci_write_config_dword(pdev, 0x44, r1);
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pci_write_config_dword(pdev, 0x48, r2);
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}
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static struct scsi_host_template hpt3x3_sht = {
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.module = THIS_MODULE,
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.name = DRV_NAME,
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.ioctl = ata_scsi_ioctl,
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.queuecommand = ata_scsi_queuecmd,
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.can_queue = ATA_DEF_QUEUE,
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.this_id = ATA_SHT_THIS_ID,
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.sg_tablesize = LIBATA_MAX_PRD,
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.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
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.emulated = ATA_SHT_EMULATED,
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.use_clustering = ATA_SHT_USE_CLUSTERING,
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.proc_name = DRV_NAME,
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.dma_boundary = ATA_DMA_BOUNDARY,
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.slave_configure = ata_scsi_slave_config,
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.slave_destroy = ata_scsi_slave_destroy,
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.bios_param = ata_std_bios_param,
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.resume = ata_scsi_device_resume,
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.suspend = ata_scsi_device_suspend,
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};
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static struct ata_port_operations hpt3x3_port_ops = {
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.port_disable = ata_port_disable,
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.set_piomode = hpt3x3_set_piomode,
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.set_dmamode = hpt3x3_set_dmamode,
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.mode_filter = ata_pci_default_filter,
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.tf_load = ata_tf_load,
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.tf_read = ata_tf_read,
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.check_status = ata_check_status,
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.exec_command = ata_exec_command,
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.dev_select = ata_std_dev_select,
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.freeze = ata_bmdma_freeze,
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.thaw = ata_bmdma_thaw,
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.error_handler = hpt3x3_error_handler,
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.post_internal_cmd = ata_bmdma_post_internal_cmd,
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.bmdma_setup = ata_bmdma_setup,
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.bmdma_start = ata_bmdma_start,
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.bmdma_stop = ata_bmdma_stop,
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.bmdma_status = ata_bmdma_status,
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.qc_prep = ata_qc_prep,
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.qc_issue = ata_qc_issue_prot,
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.data_xfer = ata_pio_data_xfer,
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.irq_handler = ata_interrupt,
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.irq_clear = ata_bmdma_irq_clear,
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.port_start = ata_port_start,
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};
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/**
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* hpt3x3_init_chipset - chip setup
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* @dev: PCI device
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*
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* Perform the setup required at boot and on resume.
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*/
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static void hpt3x3_init_chipset(struct pci_dev *dev)
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{
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u16 cmd;
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/* Initialize the board */
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pci_write_config_word(dev, 0x80, 0x00);
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/* Check if it is a 343 or a 363. 363 has COMMAND_MEMORY set */
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pci_read_config_word(dev, PCI_COMMAND, &cmd);
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if (cmd & PCI_COMMAND_MEMORY)
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pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF0);
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else
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pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x20);
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}
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/**
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* hpt3x3_init_one - Initialise an HPT343/363
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* @dev: PCI device
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* @id: Entry in match table
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*
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* Perform basic initialisation. The chip has a quirk that it won't
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* function unless it is at XX00. The old ATA driver touched this up
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* but we leave it for pci quirks to do properly.
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*/
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static int hpt3x3_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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{
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static struct ata_port_info info = {
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.sht = &hpt3x3_sht,
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.flags = ATA_FLAG_SLAVE_POSS|ATA_FLAG_SRST,
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.pio_mask = 0x1f,
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.mwdma_mask = 0x07,
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.udma_mask = 0x07,
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.port_ops = &hpt3x3_port_ops
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};
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static struct ata_port_info *port_info[2] = { &info, &info };
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hpt3x3_init_chipset(dev);
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/* Now kick off ATA set up */
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return ata_pci_init_one(dev, port_info, 2);
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}
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static int hpt3x3_reinit_one(struct pci_dev *dev)
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{
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hpt3x3_init_chipset(dev);
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return ata_pci_device_resume(dev);
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}
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static const struct pci_device_id hpt3x3[] = {
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{ PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT343), },
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{ },
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};
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static struct pci_driver hpt3x3_pci_driver = {
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.name = DRV_NAME,
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.id_table = hpt3x3,
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.probe = hpt3x3_init_one,
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.remove = ata_pci_remove_one,
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.suspend = ata_pci_device_suspend,
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.resume = hpt3x3_reinit_one,
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};
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static int __init hpt3x3_init(void)
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{
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return pci_register_driver(&hpt3x3_pci_driver);
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}
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static void __exit hpt3x3_exit(void)
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{
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pci_unregister_driver(&hpt3x3_pci_driver);
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}
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MODULE_AUTHOR("Alan Cox");
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MODULE_DESCRIPTION("low-level driver for the Highpoint HPT343/363");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(pci, hpt3x3);
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MODULE_VERSION(DRV_VERSION);
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module_init(hpt3x3_init);
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module_exit(hpt3x3_exit);
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