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This adds core support for the ST-Ericsson U300 series platforms: U300, U330, U335 and U365. Supports memory mappings, interrupt controller, system timer (clocksource and clockevents), and binds to the existing drivers for the PrimeCells used in this design: PL190 (VIC), PL180 (MMC/SD host) and PL011 (UART). This is intented to serve as starting point for our mainling work, more patches to follow. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
40 lines
1 KiB
ArmAsm
40 lines
1 KiB
ArmAsm
/*
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*
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* arch-arm/mach-u300/include/mach/entry-macro.S
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*
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*
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* Copyright (C) 2006-2009 ST-Ericsson AB
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* License terms: GNU General Public License (GPL) version 2
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* Low-level IRQ helper macros for ST-Ericsson U300
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* Author: Linus Walleij <linus.walleij@stericsson.com>
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*/
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#include <mach/hardware.h>
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#include <asm/hardware/vic.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON0_BASE
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ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
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mov \irqnr, #0
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teq \irqstat, #0
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bne 1002f
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1001: ldr \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON1_BASE
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ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
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mov \irqnr, #32
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teq \irqstat, #0
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beq 1003f
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1002: tst \irqstat, #1
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bne 1003f
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add \irqnr, \irqnr, #1
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movs \irqstat, \irqstat, lsr #1
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bne 1002b
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1003: /* EQ will be set if no irqs pending */
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.endm
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