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0d1cdd7ab6
Skip single step if event priority of current instruction is higher than that of the first instruction, from which gdb starts single step. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
435 lines
12 KiB
C
435 lines
12 KiB
C
/*
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* File: arch/blackfin/kernel/kgdb.c
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* Based on:
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* Author: Sonic Zhang
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*
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* Created:
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* Description:
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*
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* Rev: $Id: kgdb_bfin_linux-2.6.x.patch 4934 2007-02-13 09:32:11Z sonicz $
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*
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* Modified:
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* Copyright 2005-2006 Analog Devices Inc.
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see the file COPYING, or write
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* to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/string.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <linux/spinlock.h>
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#include <linux/delay.h>
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#include <linux/ptrace.h> /* for linux pt_regs struct */
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#include <linux/kgdb.h>
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#include <linux/console.h>
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#include <linux/init.h>
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#include <linux/debugger.h>
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#include <linux/errno.h>
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#include <linux/irq.h>
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#include <asm/system.h>
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#include <asm/traps.h>
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#include <asm/blackfin.h>
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/* Put the error code here just in case the user cares. */
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int gdb_bf533errcode;
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/* Likewise, the vector number here (since GDB only gets the signal
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number through the usual means, and that's not very specific). */
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int gdb_bf533vector = -1;
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#if KGDB_MAX_NO_CPUS != 8
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#error change the definition of slavecpulocks
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#endif
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void regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
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{
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gdb_regs[BFIN_R0] = regs->r0;
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gdb_regs[BFIN_R1] = regs->r1;
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gdb_regs[BFIN_R2] = regs->r2;
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gdb_regs[BFIN_R3] = regs->r3;
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gdb_regs[BFIN_R4] = regs->r4;
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gdb_regs[BFIN_R5] = regs->r5;
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gdb_regs[BFIN_R6] = regs->r6;
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gdb_regs[BFIN_R7] = regs->r7;
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gdb_regs[BFIN_P0] = regs->p0;
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gdb_regs[BFIN_P1] = regs->p1;
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gdb_regs[BFIN_P2] = regs->p2;
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gdb_regs[BFIN_P3] = regs->p3;
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gdb_regs[BFIN_P4] = regs->p4;
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gdb_regs[BFIN_P5] = regs->p5;
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gdb_regs[BFIN_SP] = regs->reserved;
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gdb_regs[BFIN_FP] = regs->fp;
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gdb_regs[BFIN_I0] = regs->i0;
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gdb_regs[BFIN_I1] = regs->i1;
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gdb_regs[BFIN_I2] = regs->i2;
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gdb_regs[BFIN_I3] = regs->i3;
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gdb_regs[BFIN_M0] = regs->m0;
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gdb_regs[BFIN_M1] = regs->m1;
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gdb_regs[BFIN_M2] = regs->m2;
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gdb_regs[BFIN_M3] = regs->m3;
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gdb_regs[BFIN_B0] = regs->b0;
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gdb_regs[BFIN_B1] = regs->b1;
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gdb_regs[BFIN_B2] = regs->b2;
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gdb_regs[BFIN_B3] = regs->b3;
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gdb_regs[BFIN_L0] = regs->l0;
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gdb_regs[BFIN_L1] = regs->l1;
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gdb_regs[BFIN_L2] = regs->l2;
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gdb_regs[BFIN_L3] = regs->l3;
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gdb_regs[BFIN_A0_DOT_X] = regs->a0x;
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gdb_regs[BFIN_A0_DOT_W] = regs->a0w;
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gdb_regs[BFIN_A1_DOT_X] = regs->a1x;
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gdb_regs[BFIN_A1_DOT_W] = regs->a1w;
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gdb_regs[BFIN_ASTAT] = regs->astat;
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gdb_regs[BFIN_RETS] = regs->rets;
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gdb_regs[BFIN_LC0] = regs->lc0;
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gdb_regs[BFIN_LT0] = regs->lt0;
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gdb_regs[BFIN_LB0] = regs->lb0;
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gdb_regs[BFIN_LC1] = regs->lc1;
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gdb_regs[BFIN_LT1] = regs->lt1;
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gdb_regs[BFIN_LB1] = regs->lb1;
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gdb_regs[BFIN_CYCLES] = 0;
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gdb_regs[BFIN_CYCLES2] = 0;
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gdb_regs[BFIN_USP] = regs->usp;
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gdb_regs[BFIN_SEQSTAT] = regs->seqstat;
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gdb_regs[BFIN_SYSCFG] = regs->syscfg;
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gdb_regs[BFIN_RETI] = regs->pc;
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gdb_regs[BFIN_RETX] = regs->retx;
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gdb_regs[BFIN_RETN] = regs->retn;
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gdb_regs[BFIN_RETE] = regs->rete;
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gdb_regs[BFIN_PC] = regs->pc;
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gdb_regs[BFIN_CC] = 0;
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gdb_regs[BFIN_EXTRA1] = 0;
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gdb_regs[BFIN_EXTRA2] = 0;
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gdb_regs[BFIN_EXTRA3] = 0;
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gdb_regs[BFIN_IPEND] = regs->ipend;
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}
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/*
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* Extracts ebp, esp and eip values understandable by gdb from the values
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* saved by switch_to.
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* thread.esp points to ebp. flags and ebp are pushed in switch_to hence esp
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* prior to entering switch_to is 8 greater then the value that is saved.
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* If switch_to changes, change following code appropriately.
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*/
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void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
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{
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gdb_regs[BFIN_SP] = p->thread.ksp;
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gdb_regs[BFIN_PC] = p->thread.pc;
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gdb_regs[BFIN_SEQSTAT] = p->thread.seqstat;
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}
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void gdb_regs_to_regs(unsigned long *gdb_regs, struct pt_regs *regs)
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{
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regs->r0 = gdb_regs[BFIN_R0];
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regs->r1 = gdb_regs[BFIN_R1];
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regs->r2 = gdb_regs[BFIN_R2];
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regs->r3 = gdb_regs[BFIN_R3];
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regs->r4 = gdb_regs[BFIN_R4];
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regs->r5 = gdb_regs[BFIN_R5];
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regs->r6 = gdb_regs[BFIN_R6];
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regs->r7 = gdb_regs[BFIN_R7];
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regs->p0 = gdb_regs[BFIN_P0];
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regs->p1 = gdb_regs[BFIN_P1];
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regs->p2 = gdb_regs[BFIN_P2];
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regs->p3 = gdb_regs[BFIN_P3];
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regs->p4 = gdb_regs[BFIN_P4];
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regs->p5 = gdb_regs[BFIN_P5];
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regs->fp = gdb_regs[BFIN_FP];
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regs->i0 = gdb_regs[BFIN_I0];
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regs->i1 = gdb_regs[BFIN_I1];
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regs->i2 = gdb_regs[BFIN_I2];
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regs->i3 = gdb_regs[BFIN_I3];
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regs->m0 = gdb_regs[BFIN_M0];
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regs->m1 = gdb_regs[BFIN_M1];
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regs->m2 = gdb_regs[BFIN_M2];
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regs->m3 = gdb_regs[BFIN_M3];
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regs->b0 = gdb_regs[BFIN_B0];
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regs->b1 = gdb_regs[BFIN_B1];
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regs->b2 = gdb_regs[BFIN_B2];
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regs->b3 = gdb_regs[BFIN_B3];
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regs->l0 = gdb_regs[BFIN_L0];
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regs->l1 = gdb_regs[BFIN_L1];
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regs->l2 = gdb_regs[BFIN_L2];
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regs->l3 = gdb_regs[BFIN_L3];
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regs->a0x = gdb_regs[BFIN_A0_DOT_X];
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regs->a0w = gdb_regs[BFIN_A0_DOT_W];
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regs->a1x = gdb_regs[BFIN_A1_DOT_X];
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regs->a1w = gdb_regs[BFIN_A1_DOT_W];
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regs->rets = gdb_regs[BFIN_RETS];
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regs->lc0 = gdb_regs[BFIN_LC0];
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regs->lt0 = gdb_regs[BFIN_LT0];
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regs->lb0 = gdb_regs[BFIN_LB0];
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regs->lc1 = gdb_regs[BFIN_LC1];
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regs->lt1 = gdb_regs[BFIN_LT1];
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regs->lb1 = gdb_regs[BFIN_LB1];
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regs->usp = gdb_regs[BFIN_USP];
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regs->syscfg = gdb_regs[BFIN_SYSCFG];
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regs->retx = gdb_regs[BFIN_PC];
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regs->retn = gdb_regs[BFIN_RETN];
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regs->rete = gdb_regs[BFIN_RETE];
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regs->pc = gdb_regs[BFIN_PC];
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#if 0 /* can't change these */
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regs->astat = gdb_regs[BFIN_ASTAT];
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regs->seqstat = gdb_regs[BFIN_SEQSTAT];
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regs->ipend = gdb_regs[BFIN_IPEND];
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#endif
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}
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struct hw_breakpoint {
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unsigned int occupied:1;
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unsigned int skip:1;
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unsigned int enabled:1;
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unsigned int type:1;
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unsigned int dataacc:2;
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unsigned short count;
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unsigned int addr;
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} breakinfo[HW_BREAKPOINT_NUM];
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int kgdb_arch_init(void)
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{
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debugger_step = 0;
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kgdb_remove_all_hw_break();
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return 0;
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}
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int kgdb_set_hw_break(unsigned long addr)
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{
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int breakno;
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for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++)
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if (!breakinfo[breakno].occupied) {
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breakinfo[breakno].occupied = 1;
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breakinfo[breakno].enabled = 1;
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breakinfo[breakno].type = 1;
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breakinfo[breakno].addr = addr;
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return 0;
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}
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return -ENOSPC;
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}
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int kgdb_remove_hw_break(unsigned long addr)
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{
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int breakno;
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for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++)
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if (breakinfo[breakno].addr == addr)
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memset(&(breakinfo[breakno]), 0, sizeof(struct hw_breakpoint));
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return 0;
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}
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void kgdb_remove_all_hw_break(void)
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{
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memset(breakinfo, 0, sizeof(struct hw_breakpoint)*8);
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}
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/*
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void kgdb_show_info(void)
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{
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printk(KERN_DEBUG "hwd: wpia0=0x%x, wpiacnt0=%d, wpiactl=0x%x, wpstat=0x%x\n",
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bfin_read_WPIA0(), bfin_read_WPIACNT0(),
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bfin_read_WPIACTL(), bfin_read_WPSTAT());
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}
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*/
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void kgdb_correct_hw_break(void)
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{
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int breakno;
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int correctit;
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uint32_t wpdactl = bfin_read_WPDACTL();
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correctit = 0;
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for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++) {
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if (breakinfo[breakno].type == 1) {
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switch (breakno) {
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case 0:
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if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN0)) {
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correctit = 1;
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wpdactl &= ~(WPIREN01|EMUSW0);
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wpdactl |= WPIAEN0|WPICNTEN0;
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bfin_write_WPIA0(breakinfo[breakno].addr);
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bfin_write_WPIACNT0(breakinfo[breakno].skip);
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} else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN0)) {
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correctit = 1;
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wpdactl &= ~WPIAEN0;
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}
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break;
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case 1:
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if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN1)) {
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correctit = 1;
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wpdactl &= ~(WPIREN01|EMUSW1);
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wpdactl |= WPIAEN1|WPICNTEN1;
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bfin_write_WPIA1(breakinfo[breakno].addr);
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bfin_write_WPIACNT1(breakinfo[breakno].skip);
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} else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN1)) {
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correctit = 1;
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wpdactl &= ~WPIAEN1;
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}
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break;
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case 2:
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if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN2)) {
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correctit = 1;
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wpdactl &= ~(WPIREN23|EMUSW2);
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wpdactl |= WPIAEN2|WPICNTEN2;
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bfin_write_WPIA2(breakinfo[breakno].addr);
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bfin_write_WPIACNT2(breakinfo[breakno].skip);
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} else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN2)) {
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correctit = 1;
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wpdactl &= ~WPIAEN2;
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}
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break;
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case 3:
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if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN3)) {
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correctit = 1;
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wpdactl &= ~(WPIREN23|EMUSW3);
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wpdactl |= WPIAEN3|WPICNTEN3;
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bfin_write_WPIA3(breakinfo[breakno].addr);
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bfin_write_WPIACNT3(breakinfo[breakno].skip);
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} else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN3)) {
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correctit = 1;
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wpdactl &= ~WPIAEN3;
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}
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break;
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case 4:
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if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN4)) {
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correctit = 1;
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wpdactl &= ~(WPIREN45|EMUSW4);
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wpdactl |= WPIAEN4|WPICNTEN4;
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bfin_write_WPIA4(breakinfo[breakno].addr);
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bfin_write_WPIACNT4(breakinfo[breakno].skip);
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} else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN4)) {
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correctit = 1;
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wpdactl &= ~WPIAEN4;
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}
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break;
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case 5:
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if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN5)) {
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correctit = 1;
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wpdactl &= ~(WPIREN45|EMUSW5);
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wpdactl |= WPIAEN5|WPICNTEN5;
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bfin_write_WPIA5(breakinfo[breakno].addr);
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bfin_write_WPIACNT5(breakinfo[breakno].skip);
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} else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN5)) {
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correctit = 1;
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wpdactl &= ~WPIAEN5;
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}
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break;
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}
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}
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}
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if (correctit) {
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wpdactl &= ~WPAND;
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wpdactl |= WPPWR;
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/*printk("correct_hw_break: wpdactl=0x%x\n", wpdactl);*/
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bfin_write_WPDACTL(wpdactl);
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CSYNC();
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/*kgdb_show_info();*/
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}
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}
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void kgdb_disable_hw_debug(struct pt_regs *regs)
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{
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/* Disable hardware debugging while we are in kgdb */
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bfin_write_WPIACTL(bfin_read_WPIACTL() & ~0x1);
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CSYNC();
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}
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void kgdb_post_master_code(struct pt_regs *regs, int eVector, int err_code)
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{
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/* Master processor is completely in the debugger */
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gdb_bf533vector = eVector;
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gdb_bf533errcode = err_code;
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}
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int kgdb_arch_handle_exception(int exceptionVector, int signo,
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int err_code, char *remcom_in_buffer,
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char *remcom_out_buffer,
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struct pt_regs *linux_regs)
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{
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long addr;
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long breakno;
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char *ptr;
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int newPC;
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int wp_status;
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int i;
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switch (remcom_in_buffer[0]) {
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case 'c':
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case 's':
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if (kgdb_contthread && kgdb_contthread != current) {
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strcpy(remcom_out_buffer, "E00");
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break;
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}
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kgdb_contthread = NULL;
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/* try to read optional parameter, pc unchanged if no parm */
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ptr = &remcom_in_buffer[1];
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if (kgdb_hex2long(&ptr, &addr)) {
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linux_regs->retx = addr;
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}
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newPC = linux_regs->retx;
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/* clear the trace bit */
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linux_regs->syscfg &= 0xfffffffe;
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/* set the trace bit if we're stepping */
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if (remcom_in_buffer[0] == 's') {
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linux_regs->syscfg |= 0x1;
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debugger_step = linux_regs->ipend;
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debugger_step >>= 6;
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for (i = 10; i > 0; i--, debugger_step >>= 1)
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if (debugger_step & 1)
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break;
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/* i indicate event priority of current stopped instruction
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* user space instruction is 0, IVG15 is 1, IVTMR is 10.
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* debugger_step > 0 means in single step mode
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*/
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debugger_step = i + 1;
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} else {
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debugger_step = 0;
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}
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wp_status = bfin_read_WPSTAT();
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CSYNC();
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if (exceptionVector == VEC_WATCH) {
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for (breakno = 0; breakno < 6; ++breakno) {
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if (wp_status & (1 << breakno)) {
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breakinfo->skip = 1;
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break;
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}
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}
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}
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kgdb_correct_hw_break();
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bfin_write_WPSTAT(0);
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return 0;
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} /* switch */
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return -1; /* this means that we do not want to exit from the handler */
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}
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struct kgdb_arch arch_kgdb_ops = {
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.gdb_bpt_instr = {0xa1},
|
|
.flags = KGDB_HW_BREAKPOINT,
|
|
};
|