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00adadc121
Spurious IRQs seen on MMC after 2.6.29. Flush posted write in IRQ handler. The interrupt line is released by clearing the error status bits in the MMCHS_STAT register, which must occur before the interrupt handler returns to avoid unwanted irqs. Hence the need to flush the posted write. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com> Acked-by: Tony Lindgen <tony@atomide.com> Signed-off-by: Pierre Ossman <pierre@ossman.eu> |
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