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5df6d737dd
fnic is a driver for the Cisco PCI-Express FCoE HBA Signed-off-by: Abhijeet Joglekar <abjoglek@cisco.com> Signed-off-by: Joe Eykholt <jeykholt@cisco.com> Signed-off-by: Mike Christie <michaelc@cs.wisc.edu> Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
67 lines
2.2 KiB
C
67 lines
2.2 KiB
C
/*
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* Copyright 2008 Cisco Systems, Inc. All rights reserved.
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* Copyright 2007 Nuova Systems, Inc. All rights reserved.
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*
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* This program is free software; you may redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef _FNIC_IO_H_
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#define _FNIC_IO_H_
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#include <scsi/fc/fc_fcp.h>
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#define FNIC_DFLT_SG_DESC_CNT 32
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#define FNIC_MAX_SG_DESC_CNT 1024 /* Maximum descriptors per sgl */
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#define FNIC_SG_DESC_ALIGN 16 /* Descriptor address alignment */
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struct host_sg_desc {
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__le64 addr;
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__le32 len;
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u32 _resvd;
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};
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struct fnic_dflt_sgl_list {
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struct host_sg_desc sg_desc[FNIC_DFLT_SG_DESC_CNT];
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};
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struct fnic_sgl_list {
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struct host_sg_desc sg_desc[FNIC_MAX_SG_DESC_CNT];
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};
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enum fnic_sgl_list_type {
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FNIC_SGL_CACHE_DFLT = 0, /* cache with default size sgl */
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FNIC_SGL_CACHE_MAX, /* cache with max size sgl */
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FNIC_SGL_NUM_CACHES /* number of sgl caches */
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};
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enum fnic_ioreq_state {
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FNIC_IOREQ_CMD_PENDING = 0,
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FNIC_IOREQ_ABTS_PENDING,
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FNIC_IOREQ_ABTS_COMPLETE,
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FNIC_IOREQ_CMD_COMPLETE,
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};
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struct fnic_io_req {
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struct host_sg_desc *sgl_list; /* sgl list */
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void *sgl_list_alloc; /* sgl list address used for free */
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dma_addr_t sense_buf_pa; /* dma address for sense buffer*/
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dma_addr_t sgl_list_pa; /* dma address for sgl list */
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u16 sgl_cnt;
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u8 sgl_type; /* device DMA descriptor list type */
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u8 io_completed:1; /* set to 1 when fw completes IO */
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u32 port_id; /* remote port DID */
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struct completion *abts_done; /* completion for abts */
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struct completion *dr_done; /* completion for device reset */
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};
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#endif /* _FNIC_IO_H_ */
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