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dabd14684b
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
143 lines
3.3 KiB
C
143 lines
3.3 KiB
C
/*
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* linux/drivers/pcmcia/sa1100_neponset.c
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*
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* Neponset PCMCIA specific routines
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <mach/neponset.h>
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#include <asm/hardware/sa1111.h>
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#include "sa1111_generic.h"
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/*
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* Neponset uses the Maxim MAX1600, with the following connections:
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*
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* MAX1600 Neponset
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*
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* A0VCC SA-1111 GPIO A<1>
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* A1VCC SA-1111 GPIO A<0>
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* A0VPP CPLD NCR A0VPP
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* A1VPP CPLD NCR A1VPP
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* B0VCC SA-1111 GPIO A<2>
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* B1VCC SA-1111 GPIO A<3>
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* B0VPP ground (slot B is CF)
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* B1VPP ground (slot B is CF)
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*
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* VX VCC (5V)
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* VY VCC3_3 (3.3V)
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* 12INA 12V
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* 12INB ground (slot B is CF)
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*
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* The MAX1600 CODE pin is tied to ground, placing the device in
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* "Standard Intel code" mode. Refer to the Maxim data sheet for
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* the corresponding truth table.
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*/
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static int
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neponset_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, const socket_state_t *state)
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{
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struct sa1111_pcmcia_socket *s = to_skt(skt);
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unsigned int ncr_mask, ncr_set, pa_dwr_mask, pa_dwr_set;
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int ret;
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switch (skt->nr) {
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case 0:
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pa_dwr_mask = GPIO_A0 | GPIO_A1;
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ncr_mask = NCR_A0VPP | NCR_A1VPP;
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if (state->Vpp == 0)
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ncr_set = 0;
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else if (state->Vpp == 120)
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ncr_set = NCR_A1VPP;
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else if (state->Vpp == state->Vcc)
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ncr_set = NCR_A0VPP;
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else {
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printk(KERN_ERR "%s(): unrecognized VPP %u\n",
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__func__, state->Vpp);
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return -1;
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}
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break;
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case 1:
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pa_dwr_mask = GPIO_A2 | GPIO_A3;
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ncr_mask = 0;
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ncr_set = 0;
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if (state->Vpp != state->Vcc && state->Vpp != 0) {
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printk(KERN_ERR "%s(): CF slot cannot support VPP %u\n",
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__func__, state->Vpp);
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return -1;
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}
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break;
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default:
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return -1;
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}
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/*
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* pa_dwr_set is the mask for selecting Vcc on both sockets.
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* pa_dwr_mask selects which bits (and therefore socket) we change.
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*/
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switch (state->Vcc) {
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default:
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case 0: pa_dwr_set = 0; break;
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case 33: pa_dwr_set = GPIO_A1|GPIO_A2; break;
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case 50: pa_dwr_set = GPIO_A0|GPIO_A3; break;
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}
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ret = sa1111_pcmcia_configure_socket(skt, state);
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if (ret == 0) {
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unsigned long flags;
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local_irq_save(flags);
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NCR_0 = (NCR_0 & ~ncr_mask) | ncr_set;
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local_irq_restore(flags);
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sa1111_set_io(s->dev, pa_dwr_mask, pa_dwr_set);
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}
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return 0;
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}
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static void neponset_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
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{
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if (skt->nr == 0)
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NCR_0 &= ~(NCR_A0VPP | NCR_A1VPP);
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sa1111_pcmcia_socket_init(skt);
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}
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static struct pcmcia_low_level neponset_pcmcia_ops = {
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.owner = THIS_MODULE,
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.configure_socket = neponset_pcmcia_configure_socket,
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.socket_init = neponset_pcmcia_socket_init,
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.first = 0,
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.nr = 2,
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};
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int pcmcia_neponset_init(struct sa1111_dev *sadev)
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{
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int ret = -ENODEV;
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if (machine_is_assabet()) {
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/*
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* Set GPIO_A<3:0> to be outputs for the MAX1600,
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* and switch to standby mode.
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*/
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sa1111_set_io_dir(sadev, GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0, 0);
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sa1111_set_io(sadev, GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0);
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sa1111_set_sleep_io(sadev, GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0);
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sa11xx_drv_pcmcia_ops(&neponset_pcmcia_ops);
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ret = sa1111_pcmcia_add(sadev, &neponset_pcmcia_ops,
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sa11xx_drv_pcmcia_add_one);
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}
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return ret;
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}
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