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Add Intel AVX(Advanced Vector Extensions) instruction set support to x86 instruction decoder. This adds insn.vex_prefix field for storing VEX prefixes, and introduces some original tags for expressing opcodes attributes. Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Jim Keniston <jkenisto@us.ibm.com> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Cc: Christoph Hellwig <hch@infradead.org> Cc: Frank Ch. Eigler <fche@redhat.com> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Jason Baron <jbaron@redhat.com> Cc: K.Prasad <prasad@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com> LKML-Reference: <20091027204226.30545.23451.stgit@harusame> Signed-off-by: Ingo Molnar <mingo@elte.hu>
90 lines
2.5 KiB
C
90 lines
2.5 KiB
C
/*
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* x86 instruction attribute tables
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*
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* Written by Masami Hiramatsu <mhiramat@redhat.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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*/
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#include <asm/insn.h>
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/* Attribute tables are generated from opcode map */
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#include "inat-tables.c"
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/* Attribute search APIs */
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insn_attr_t inat_get_opcode_attribute(insn_byte_t opcode)
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{
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return inat_primary_table[opcode];
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}
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insn_attr_t inat_get_escape_attribute(insn_byte_t opcode, insn_byte_t last_pfx,
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insn_attr_t esc_attr)
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{
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const insn_attr_t *table;
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insn_attr_t lpfx_attr;
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int n, m = 0;
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n = inat_escape_id(esc_attr);
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if (last_pfx) {
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lpfx_attr = inat_get_opcode_attribute(last_pfx);
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m = inat_last_prefix_id(lpfx_attr);
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}
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table = inat_escape_tables[n][0];
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if (!table)
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return 0;
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if (inat_has_variant(table[opcode]) && m) {
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table = inat_escape_tables[n][m];
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if (!table)
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return 0;
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}
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return table[opcode];
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}
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insn_attr_t inat_get_group_attribute(insn_byte_t modrm, insn_byte_t last_pfx,
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insn_attr_t grp_attr)
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{
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const insn_attr_t *table;
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insn_attr_t lpfx_attr;
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int n, m = 0;
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n = inat_group_id(grp_attr);
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if (last_pfx) {
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lpfx_attr = inat_get_opcode_attribute(last_pfx);
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m = inat_last_prefix_id(lpfx_attr);
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}
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table = inat_group_tables[n][0];
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if (!table)
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return inat_group_common_attribute(grp_attr);
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if (inat_has_variant(table[X86_MODRM_REG(modrm)]) && m) {
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table = inat_group_tables[n][m];
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if (!table)
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return inat_group_common_attribute(grp_attr);
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}
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return table[X86_MODRM_REG(modrm)] |
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inat_group_common_attribute(grp_attr);
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}
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insn_attr_t inat_get_avx_attribute(insn_byte_t opcode, insn_byte_t vex_m,
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insn_byte_t vex_p)
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{
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const insn_attr_t *table;
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if (vex_m > X86_VEX_M_MAX || vex_p > INAT_LSTPFX_MAX)
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return 0;
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table = inat_avx_tables[vex_m][vex_p];
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if (!table)
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return 0;
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return table[opcode];
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}
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