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https://github.com/adulau/aha.git
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fd6ac7bb9d
Signed-off-by: Dmitriy Taychenachev <dimichxp@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
251 lines
6 KiB
C
251 lines
6 KiB
C
/*
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* Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Sascha Hauer, kernel@pengutronix.de
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor,
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* Boston, MA 02110-1301, USA.
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*/
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/serial.h>
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#include <linux/gpio.h>
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#include <mach/hardware.h>
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#include <mach/irqs.h>
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#include <mach/imx-uart.h>
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static struct resource uart0[] = {
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{
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.start = MXC91231_UART1_BASE_ADDR,
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.end = MXC91231_UART1_BASE_ADDR + 0x0B5,
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.flags = IORESOURCE_MEM,
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}, {
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.start = MXC91231_INT_UART1_RX,
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.end = MXC91231_INT_UART1_RX,
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.flags = IORESOURCE_IRQ,
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}, {
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.start = MXC91231_INT_UART1_TX,
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.end = MXC91231_INT_UART1_TX,
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.flags = IORESOURCE_IRQ,
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}, {
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.start = MXC91231_INT_UART1_MINT,
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.end = MXC91231_INT_UART1_MINT,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mxc_uart_device0 = {
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.name = "imx-uart",
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.id = 0,
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.resource = uart0,
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.num_resources = ARRAY_SIZE(uart0),
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};
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static struct resource uart1[] = {
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{
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.start = MXC91231_UART2_BASE_ADDR,
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.end = MXC91231_UART2_BASE_ADDR + 0x0B5,
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.flags = IORESOURCE_MEM,
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}, {
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.start = MXC91231_INT_UART2_RX,
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.end = MXC91231_INT_UART2_RX,
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.flags = IORESOURCE_IRQ,
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}, {
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.start = MXC91231_INT_UART2_TX,
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.end = MXC91231_INT_UART2_TX,
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.flags = IORESOURCE_IRQ,
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}, {
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.start = MXC91231_INT_UART2_MINT,
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.end = MXC91231_INT_UART2_MINT,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mxc_uart_device1 = {
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.name = "imx-uart",
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.id = 1,
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.resource = uart1,
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.num_resources = ARRAY_SIZE(uart1),
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};
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static struct resource uart2[] = {
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{
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.start = MXC91231_UART3_BASE_ADDR,
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.end = MXC91231_UART3_BASE_ADDR + 0x0B5,
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.flags = IORESOURCE_MEM,
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}, {
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.start = MXC91231_INT_UART3_RX,
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.end = MXC91231_INT_UART3_RX,
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.flags = IORESOURCE_IRQ,
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}, {
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.start = MXC91231_INT_UART3_TX,
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.end = MXC91231_INT_UART3_TX,
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.flags = IORESOURCE_IRQ,
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}, {
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.start = MXC91231_INT_UART3_MINT,
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.end = MXC91231_INT_UART3_MINT,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mxc_uart_device2 = {
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.name = "imx-uart",
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.id = 2,
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.resource = uart2,
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.num_resources = ARRAY_SIZE(uart2),
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};
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/* GPIO port description */
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static struct mxc_gpio_port mxc_gpio_ports[] = {
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[0] = {
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.chip.label = "gpio-0",
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.base = MXC91231_IO_ADDRESS(MXC91231_GPIO1_AP_BASE_ADDR),
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.irq = MXC91231_INT_GPIO1,
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.virtual_irq_start = MXC_GPIO_IRQ_START,
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},
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[1] = {
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.chip.label = "gpio-1",
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.base = MXC91231_IO_ADDRESS(MXC91231_GPIO2_AP_BASE_ADDR),
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.irq = MXC91231_INT_GPIO2,
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.virtual_irq_start = MXC_GPIO_IRQ_START + 32,
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},
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[2] = {
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.chip.label = "gpio-2",
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.base = MXC91231_IO_ADDRESS(MXC91231_GPIO3_AP_BASE_ADDR),
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.irq = MXC91231_INT_GPIO3,
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.virtual_irq_start = MXC_GPIO_IRQ_START + 64,
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},
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[3] = {
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.chip.label = "gpio-3",
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.base = MXC91231_IO_ADDRESS(MXC91231_GPIO4_SH_BASE_ADDR),
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.irq = MXC91231_INT_GPIO4,
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.virtual_irq_start = MXC_GPIO_IRQ_START + 96,
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},
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};
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int __init mxc_register_gpios(void)
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{
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return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports));
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}
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static struct resource mxc_nand_resources[] = {
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{
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.start = MXC91231_NFC_BASE_ADDR,
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.end = MXC91231_NFC_BASE_ADDR + 0xfff,
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.flags = IORESOURCE_MEM
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}, {
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.start = MXC91231_INT_NANDFC,
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.end = MXC91231_INT_NANDFC,
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.flags = IORESOURCE_IRQ
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},
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};
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struct platform_device mxc_nand_device = {
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.name = "mxc_nand",
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.id = 0,
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.num_resources = ARRAY_SIZE(mxc_nand_resources),
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.resource = mxc_nand_resources,
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};
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static struct resource mxc_sdhc0_resources[] = {
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{
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.start = MXC91231_MMC_SDHC1_BASE_ADDR,
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.end = MXC91231_MMC_SDHC1_BASE_ADDR + SZ_16K - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = MXC91231_INT_MMC_SDHC1,
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.end = MXC91231_INT_MMC_SDHC1,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource mxc_sdhc1_resources[] = {
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{
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.start = MXC91231_MMC_SDHC2_BASE_ADDR,
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.end = MXC91231_MMC_SDHC2_BASE_ADDR + SZ_16K - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = MXC91231_INT_MMC_SDHC2,
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.end = MXC91231_INT_MMC_SDHC2,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mxc_sdhc_device0 = {
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.name = "mxc-mmc",
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.id = 0,
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.num_resources = ARRAY_SIZE(mxc_sdhc0_resources),
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.resource = mxc_sdhc0_resources,
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};
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struct platform_device mxc_sdhc_device1 = {
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.name = "mxc-mmc",
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.id = 1,
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.num_resources = ARRAY_SIZE(mxc_sdhc1_resources),
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.resource = mxc_sdhc1_resources,
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};
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static struct resource mxc_cspi0_resources[] = {
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{
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.start = MXC91231_CSPI1_BASE_ADDR,
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.end = MXC91231_CSPI1_BASE_ADDR + 0x20,
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.flags = IORESOURCE_MEM,
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}, {
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.start = MXC91231_INT_CSPI1,
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.end = MXC91231_INT_CSPI1,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mxc_cspi_device0 = {
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.name = "spi_imx",
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.id = 0,
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.num_resources = ARRAY_SIZE(mxc_cspi0_resources),
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.resource = mxc_cspi0_resources,
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};
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static struct resource mxc_cspi1_resources[] = {
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{
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.start = MXC91231_CSPI2_BASE_ADDR,
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.end = MXC91231_CSPI2_BASE_ADDR + 0x20,
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.flags = IORESOURCE_MEM,
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}, {
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.start = MXC91231_INT_CSPI2,
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.end = MXC91231_INT_CSPI2,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mxc_cspi_device1 = {
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.name = "spi_imx",
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.id = 1,
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.num_resources = ARRAY_SIZE(mxc_cspi1_resources),
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.resource = mxc_cspi1_resources,
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};
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static struct resource mxc_wdog0_resources[] = {
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{
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.start = MXC91231_WDOG1_BASE_ADDR,
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.end = MXC91231_WDOG1_BASE_ADDR + 0x10,
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.flags = IORESOURCE_MEM,
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},
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};
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struct platform_device mxc_wdog_device0 = {
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.name = "mxc-wdt",
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.id = 0,
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.num_resources = ARRAY_SIZE(mxc_wdog0_resources),
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.resource = mxc_wdog0_resources,
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};
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