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MIPS: Octeon: False positive timeout
If we reach the test just below the loop with a `timeout' value of 0, this does not mean that the timeout caused the loop to end, but rather the `smi_rd.s.pending', in the last iteration. If timeout caused the loop to end, then `timeout' is -1, not 0. Since this can occur only in the last iteration, it is not very likely to be a problem. By changing the post- to prefix decrement we ensure that a timeout of 0 does mean it timed out. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Acked-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -421,7 +421,7 @@ static inline int cvmx_mdio_45_read(int bus_id, int phy_id, int device,
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do {
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cvmx_wait(1000);
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smi_rd.u64 = cvmx_read_csr(CVMX_SMIX_RD_DAT(bus_id));
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} while (smi_rd.s.pending && timeout--);
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} while (smi_rd.s.pending && --timeout);
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if (timeout <= 0) {
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cvmx_dprintf("cvmx_mdio_45_read: bus_id %d phy_id %2d "
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