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https://github.com/adulau/aha.git
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[IA64] support for cpu0 removal
here is the BSP removal support for IA64. Its pretty much the same thing that was released a while back, but has your feedback incorporated. - Removed CONFIG_BSP_REMOVE_WORKAROUND and associated cmdline param - Fixed compile issue with sn2/zx1 due to a undefined fix_b0_for_bsp - some formatting nits (whitespace etc) This has been tested on tiger and long back by alex on hp systems as well. Signed-off-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
This commit is contained in:
Ashok Raj
Tony Luck
parent
db9edfd7e3
commit
ff741906ad
12 changed files with 183 additions and 18 deletions
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@ -272,6 +272,25 @@ config SCHED_SMT
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Intel IA64 chips with MultiThreading at a cost of slightly increased
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overhead in some places. If unsure say N here.
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config PERMIT_BSP_REMOVE
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bool "Support removal of Bootstrap Processor"
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depends on HOTPLUG_CPU
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default n
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---help---
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Say Y here if your platform SAL will support removal of BSP with HOTPLUG_CPU
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support.
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config FORCE_CPEI_RETARGET
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bool "Force assumption that CPEI can be re-targetted"
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depends on PERMIT_BSP_REMOVE
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default n
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---help---
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Say Y if you need to force the assumption that CPEI can be re-targetted to
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any cpu in the system. This hint is available via ACPI 3.0 specifications.
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Tiger4 systems are capable of re-directing CPEI to any CPU other than BSP.
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This option it useful to enable this feature on older BIOS's as well.
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You can also enable this by using boot command line option force_cpei=1.
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config PREEMPT
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bool "Preemptible Kernel"
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help
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@ -114,6 +114,8 @@ CONFIG_FORCE_MAX_ZONEORDER=17
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CONFIG_SMP=y
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CONFIG_NR_CPUS=4
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CONFIG_HOTPLUG_CPU=y
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CONFIG_PERMIT_BSP_REMOVE=y
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CONFIG_FORCE_CPEI_RETARGET=y
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# CONFIG_SCHED_SMT is not set
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# CONFIG_PREEMPT is not set
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CONFIG_SELECT_MEMORY_MODEL=y
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@ -287,16 +287,20 @@ acpi_parse_plat_int_src(acpi_table_entry_header * header,
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unsigned int can_cpei_retarget(void)
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{
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extern int cpe_vector;
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extern unsigned int force_cpei_retarget;
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/*
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* Only if CPEI is supported and the override flag
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* is present, otherwise return that its re-targettable
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* if we are in polling mode.
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*/
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if (cpe_vector > 0 && !acpi_cpei_override)
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return 0;
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else
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return 1;
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if (cpe_vector > 0) {
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if (acpi_cpei_override || force_cpei_retarget)
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return 1;
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else
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return 0;
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}
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return 1;
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}
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unsigned int is_cpu_cpei_target(unsigned int cpu)
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@ -631,6 +631,7 @@ get_target_cpu (unsigned int gsi, int vector)
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{
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#ifdef CONFIG_SMP
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static int cpu = -1;
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extern int cpe_vector;
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/*
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* In case of vector shared by multiple RTEs, all RTEs that
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@ -653,6 +654,11 @@ get_target_cpu (unsigned int gsi, int vector)
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if (!cpu_online(smp_processor_id()))
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return cpu_physical_id(smp_processor_id());
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#ifdef CONFIG_ACPI
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if (cpe_vector > 0 && vector == IA64_CPEP_VECTOR)
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return get_cpei_target_cpu();
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#endif
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#ifdef CONFIG_NUMA
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{
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int num_cpus, cpu_index, iosapic_index, numa_cpu, i = 0;
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@ -163,8 +163,19 @@ void fixup_irqs(void)
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{
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unsigned int irq;
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extern void ia64_process_pending_intr(void);
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extern void ia64_disable_timer(void);
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extern volatile int time_keeper_id;
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ia64_disable_timer();
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/*
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* Find a new timesync master
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*/
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if (smp_processor_id() == time_keeper_id) {
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time_keeper_id = first_cpu(cpu_online_map);
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printk ("CPU %d is now promoted to time-keeper master\n", time_keeper_id);
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}
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ia64_set_itv(1<<16);
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/*
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* Phase 1: Locate irq's bound to this cpu and
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* relocate them for cpu removal.
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@ -289,6 +289,7 @@ ia64_mca_log_sal_error_record(int sal_info_type)
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#ifdef CONFIG_ACPI
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int cpe_vector = -1;
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int ia64_cpe_irq = -1;
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static irqreturn_t
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ia64_mca_cpe_int_handler (int cpe_irq, void *arg, struct pt_regs *ptregs)
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@ -1444,11 +1445,13 @@ void __devinit
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ia64_mca_cpu_init(void *cpu_data)
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{
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void *pal_vaddr;
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static int first_time = 1;
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if (smp_processor_id() == 0) {
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if (first_time) {
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void *mca_data;
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int cpu;
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first_time = 0;
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mca_data = alloc_bootmem(sizeof(struct ia64_mca_cpu)
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* NR_CPUS + KERNEL_STACK_SIZE);
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mca_data = (void *)(((unsigned long)mca_data +
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@ -1704,6 +1707,7 @@ ia64_mca_late_init(void)
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desc = irq_descp(irq);
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desc->status |= IRQ_PER_CPU;
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setup_irq(irq, &mca_cpe_irqaction);
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ia64_cpe_irq = irq;
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}
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ia64_mca_register_cpev(cpe_vector);
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IA64_MCA_DEBUG("%s: CPEI/P setup and enabled.\n", __FUNCTION__);
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@ -6718,6 +6718,7 @@ __initcall(pfm_init);
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void
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pfm_init_percpu (void)
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{
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static int first_time=1;
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/*
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* make sure no measurement is active
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* (may inherit programmed PMCs from EFI).
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@ -6730,8 +6731,10 @@ pfm_init_percpu (void)
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*/
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pfm_unfreeze_pmu();
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if (smp_processor_id() == 0)
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if (first_time) {
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register_percpu_irq(IA64_PERFMON_VECTOR, &perfmon_irqaction);
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first_time=0;
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}
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ia64_setreg(_IA64_REG_CR_PMV, IA64_PERFMON_VECTOR);
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ia64_srlz_d();
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@ -70,6 +70,12 @@
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#endif
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#ifdef CONFIG_HOTPLUG_CPU
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#ifdef CONFIG_PERMIT_BSP_REMOVE
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#define bsp_remove_ok 1
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#else
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#define bsp_remove_ok 0
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#endif
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/*
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* Store all idle threads, this can be reused instead of creating
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* a new thread. Also avoids complicated thread destroy functionality
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@ -104,7 +110,7 @@ struct sal_to_os_boot *sal_state_for_booting_cpu = &sal_boot_rendez_state[0];
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/*
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* ITC synchronization related stuff:
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*/
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#define MASTER 0
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#define MASTER (0)
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#define SLAVE (SMP_CACHE_BYTES/8)
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#define NUM_ROUNDS 64 /* magic value */
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@ -151,6 +157,27 @@ char __initdata no_int_routing;
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unsigned char smp_int_redirect; /* are INT and IPI redirectable by the chipset? */
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#ifdef CONFIG_FORCE_CPEI_RETARGET
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#define CPEI_OVERRIDE_DEFAULT (1)
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#else
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#define CPEI_OVERRIDE_DEFAULT (0)
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#endif
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unsigned int force_cpei_retarget = CPEI_OVERRIDE_DEFAULT;
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static int __init
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cmdl_force_cpei(char *str)
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{
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int value=0;
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get_option (&str, &value);
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force_cpei_retarget = value;
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return 1;
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}
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__setup("force_cpei=", cmdl_force_cpei);
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static int __init
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nointroute (char *str)
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{
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@ -161,6 +188,27 @@ nointroute (char *str)
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__setup("nointroute", nointroute);
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static void fix_b0_for_bsp(void)
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{
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#ifdef CONFIG_HOTPLUG_CPU
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int cpuid;
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static int fix_bsp_b0 = 1;
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cpuid = smp_processor_id();
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/*
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* Cache the b0 value on the first AP that comes up
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*/
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if (!(fix_bsp_b0 && cpuid))
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return;
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sal_boot_rendez_state[0].br[0] = sal_boot_rendez_state[cpuid].br[0];
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printk ("Fixed BSP b0 value from CPU %d\n", cpuid);
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fix_bsp_b0 = 0;
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#endif
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}
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void
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sync_master (void *arg)
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{
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@ -327,8 +375,9 @@ smp_setup_percpu_timer (void)
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static void __devinit
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smp_callin (void)
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{
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int cpuid, phys_id;
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int cpuid, phys_id, itc_master;
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extern void ia64_init_itm(void);
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extern volatile int time_keeper_id;
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#ifdef CONFIG_PERFMON
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extern void pfm_init_percpu(void);
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@ -336,6 +385,7 @@ smp_callin (void)
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cpuid = smp_processor_id();
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phys_id = hard_smp_processor_id();
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itc_master = time_keeper_id;
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if (cpu_online(cpuid)) {
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printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n",
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@ -343,6 +393,8 @@ smp_callin (void)
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BUG();
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}
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fix_b0_for_bsp();
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lock_ipi_calllock();
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cpu_set(cpuid, cpu_online_map);
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unlock_ipi_calllock();
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@ -365,8 +417,8 @@ smp_callin (void)
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* calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls
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* local_bh_enable(), which bugs out if irqs are not enabled...
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*/
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Dprintk("Going to syncup ITC with BP.\n");
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ia64_sync_itc(0);
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Dprintk("Going to syncup ITC with ITC Master.\n");
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ia64_sync_itc(itc_master);
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}
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/*
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@ -638,6 +690,47 @@ remove_siblinginfo(int cpu)
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}
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extern void fixup_irqs(void);
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int migrate_platform_irqs(unsigned int cpu)
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{
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int new_cpei_cpu;
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irq_desc_t *desc = NULL;
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cpumask_t mask;
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int retval = 0;
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/*
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* dont permit CPEI target to removed.
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*/
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if (cpe_vector > 0 && is_cpu_cpei_target(cpu)) {
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printk ("CPU (%d) is CPEI Target\n", cpu);
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if (can_cpei_retarget()) {
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/*
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* Now re-target the CPEI to a different processor
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*/
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new_cpei_cpu = any_online_cpu(cpu_online_map);
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mask = cpumask_of_cpu(new_cpei_cpu);
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set_cpei_target_cpu(new_cpei_cpu);
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desc = irq_descp(ia64_cpe_irq);
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/*
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* Switch for now, immediatly, we need to do fake intr
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* as other interrupts, but need to study CPEI behaviour with
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* polling before making changes.
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*/
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if (desc) {
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desc->handler->disable(ia64_cpe_irq);
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desc->handler->set_affinity(ia64_cpe_irq, mask);
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desc->handler->enable(ia64_cpe_irq);
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printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu);
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}
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}
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if (!desc) {
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printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu);
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retval = -EBUSY;
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}
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}
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return retval;
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}
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/* must be called with cpucontrol mutex held */
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int __cpu_disable(void)
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{
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@ -646,8 +739,17 @@ int __cpu_disable(void)
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/*
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* dont permit boot processor for now
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*/
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if (cpu == 0)
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return -EBUSY;
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if (cpu == 0 && !bsp_remove_ok) {
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printk ("Your platform does not support removal of BSP\n");
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return (-EBUSY);
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}
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cpu_clear(cpu, cpu_online_map);
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if (migrate_platform_irqs(cpu)) {
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cpu_set(cpu, cpu_online_map);
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return (-EBUSY);
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}
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remove_siblinginfo(cpu);
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cpu_clear(cpu, cpu_online_map);
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@ -32,7 +32,7 @@
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extern unsigned long wall_jiffies;
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#define TIME_KEEPER_ID 0 /* smp_processor_id() of time-keeper */
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volatile int time_keeper_id = 0; /* smp_processor_id() of time-keeper */
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#ifdef CONFIG_IA64_DEBUG_IRQ
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@ -71,7 +71,7 @@ timer_interrupt (int irq, void *dev_id, struct pt_regs *regs)
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new_itm += local_cpu_data->itm_delta;
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if (smp_processor_id() == TIME_KEEPER_ID) {
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if (smp_processor_id() == time_keeper_id) {
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/*
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* Here we are in the timer irq handler. We have irqs locally
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* disabled, but we don't know if the timer_bh is running on
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@ -236,6 +236,11 @@ static struct irqaction timer_irqaction = {
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.name = "timer"
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};
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void __devinit ia64_disable_timer(void)
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{
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ia64_set_itv(1 << 16);
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}
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void __init
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time_init (void)
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{
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@ -181,13 +181,15 @@ per_cpu_init (void)
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{
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void *cpu_data;
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int cpu;
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static int first_time=1;
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/*
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* get_free_pages() cannot be used before cpu_init() done. BSP
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* allocates "NR_CPUS" pages for all CPUs to avoid that AP calls
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* get_zeroed_page().
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*/
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if (smp_processor_id() == 0) {
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if (first_time) {
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first_time=0;
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cpu_data = __alloc_bootmem(PERCPU_PAGE_SIZE * NR_CPUS,
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PERCPU_PAGE_SIZE, __pa(MAX_DMA_ADDRESS));
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for (cpu = 0; cpu < NR_CPUS; cpu++) {
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@ -528,12 +528,17 @@ void __init find_memory(void)
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void *per_cpu_init(void)
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{
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int cpu;
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static int first_time = 1;
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if (smp_processor_id() != 0)
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return __per_cpu_start + __per_cpu_offset[smp_processor_id()];
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for (cpu = 0; cpu < NR_CPUS; cpu++)
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per_cpu(local_per_cpu_offset, cpu) = __per_cpu_offset[cpu];
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if (first_time) {
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first_time = 0;
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for (cpu = 0; cpu < NR_CPUS; cpu++)
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per_cpu(local_per_cpu_offset, cpu) = __per_cpu_offset[cpu];
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}
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return __per_cpu_start + __per_cpu_offset[smp_processor_id()];
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}
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@ -131,6 +131,8 @@ struct ia64_mca_cpu {
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/* Array of physical addresses of each CPU's MCA area. */
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extern unsigned long __per_cpu_mca[NR_CPUS];
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extern int cpe_vector;
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extern int ia64_cpe_irq;
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extern void ia64_mca_init(void);
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extern void ia64_mca_cpu_init(void *);
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extern void ia64_os_mca_dispatch(void);
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