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[BNX2]: Add 5708S parallel detection.
Add code to parallel detect 1Gbps and 2.5Gbps link speeds. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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f8dd064ee1
2 changed files with 57 additions and 21 deletions
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@ -1067,7 +1067,6 @@ bnx2_setup_serdes_phy(struct bnx2 *bp)
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bnx2_write_phy(bp, MII_ADVERTISE, new_adv);
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bnx2_write_phy(bp, MII_BMCR, bmcr | BMCR_ANRESTART |
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BMCR_ANENABLE);
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if (CHIP_NUM(bp) == CHIP_NUM_5706) {
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/* Speed up link-up time when the link partner
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* does not autonegotiate which is very common
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* in blade servers. Some blade servers use
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@ -1080,7 +1079,6 @@ bnx2_setup_serdes_phy(struct bnx2 *bp)
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bp->serdes_an_pending = 1;
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mod_timer(&bp->timer, jiffies + bp->current_interval);
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}
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}
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return 0;
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}
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@ -4227,6 +4225,41 @@ bnx2_5706_serdes_timer(struct bnx2 *bp)
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spin_unlock(&bp->phy_lock);
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}
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static void
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bnx2_5708_serdes_timer(struct bnx2 *bp)
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{
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if ((bp->phy_flags & PHY_2_5G_CAPABLE_FLAG) == 0) {
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bp->serdes_an_pending = 0;
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return;
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}
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spin_lock(&bp->phy_lock);
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if (bp->serdes_an_pending)
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bp->serdes_an_pending--;
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else if ((bp->link_up == 0) && (bp->autoneg & AUTONEG_SPEED)) {
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u32 bmcr;
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bnx2_read_phy(bp, MII_BMCR, &bmcr);
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if (bmcr & BMCR_ANENABLE) {
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bmcr &= ~BMCR_ANENABLE;
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bmcr |= BMCR_FULLDPLX | BCM5708S_BMCR_FORCE_2500;
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bnx2_write_phy(bp, MII_BMCR, bmcr);
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bp->current_interval = SERDES_FORCED_TIMEOUT;
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} else {
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bmcr &= ~(BMCR_FULLDPLX | BCM5708S_BMCR_FORCE_2500);
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bmcr |= BMCR_ANENABLE;
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bnx2_write_phy(bp, MII_BMCR, bmcr);
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bp->serdes_an_pending = 2;
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bp->current_interval = bp->timer_interval;
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}
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} else
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bp->current_interval = bp->timer_interval;
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spin_unlock(&bp->phy_lock);
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}
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static void
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bnx2_timer(unsigned long data)
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{
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@ -4244,9 +4277,12 @@ bnx2_timer(unsigned long data)
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bp->stats_blk->stat_FwRxDrop = REG_RD_IND(bp, BNX2_FW_RX_DROP_COUNT);
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if ((bp->phy_flags & PHY_SERDES_FLAG) &&
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(CHIP_NUM(bp) == CHIP_NUM_5706))
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if (bp->phy_flags & PHY_SERDES_FLAG) {
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if (CHIP_NUM(bp) == CHIP_NUM_5706)
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bnx2_5706_serdes_timer(bp);
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else if (CHIP_NUM(bp) == CHIP_NUM_5708)
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bnx2_5708_serdes_timer(bp);
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}
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bnx2_restart_timer:
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mod_timer(&bp->timer, jiffies + bp->current_interval);
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@ -4917,12 +4953,11 @@ bnx2_nway_reset(struct net_device *dev)
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msleep(20);
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spin_lock_bh(&bp->phy_lock);
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if (CHIP_NUM(bp) == CHIP_NUM_5706) {
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bp->current_interval = SERDES_AN_TIMEOUT;
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bp->serdes_an_pending = 1;
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mod_timer(&bp->timer, jiffies + bp->current_interval);
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}
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}
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bnx2_read_phy(bp, MII_BMCR, &bmcr);
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bmcr &= ~BMCR_LOOPBACK;
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@ -4040,6 +4040,7 @@ struct bnx2 {
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u8 serdes_an_pending;
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#define SERDES_AN_TIMEOUT (HZ / 3)
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#define SERDES_FORCED_TIMEOUT (HZ / 10)
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u8 mac_addr[8];
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