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[PATCH] genirq: x86_64 irq: Kill gsi_irq_sharing

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After raising the number of irqs the system supports this function is no
longer necessary.

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Rajesh Shah <rajesh.shah@intel.com>
Cc: Andi Kleen <ak@muc.de>
Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com>
Cc: "Luck, Tony" <tony.luck@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Eric W. Biederman 2006-10-04 02:16:52 -07:00 committed by Linus Torvalds
parent 550f2299ac
commit f023d764cc
2 changed files with 1 additions and 65 deletions
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4
arch/i386/kernel/acpi/boot.c
View file

@ -62,8 +62,6 @@ static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id) { return
#include <mach_mpparse.h>
#endif /* CONFIG_X86_LOCAL_APIC */
static inline int gsi_irq_sharing(int gsi) { return gsi; }
#endif /* X86 */
#define BAD_MADT_ENTRY(entry, end) ( \
@ -468,7 +466,7 @@ void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
{
*irq = gsi_irq_sharing(gsi);
*irq = gsi;
return 0;
}

62
arch/x86_64/kernel/io_apic.c
View file

@ -191,8 +191,6 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
}
#endif
static u8 gsi_2_irq[NR_IRQ_VECTORS] = { [0 ... NR_IRQ_VECTORS-1] = 0xFF };
/*
* The common case is 1:1 IRQ<->pin mappings. Sometimes there are
* shared ISA-space IRQs, so we have to support them. We are super
@ -518,64 +516,6 @@ static inline int irq_trigger(int idx)
return MPBIOS_trigger(idx);
}
static int next_irq = 16;
/*
* gsi_irq_sharing -- Name overload! "irq" can be either a legacy IRQ
* in the range 0-15, a linux IRQ in the range 0-223, or a GSI number
* from ACPI, which can reach 800 in large boxen.
*
* Compact the sparse GSI space into a sequential IRQ series and reuse
* vectors if possible.
*/
int gsi_irq_sharing(int gsi)
{
int i, tries, vector;
BUG_ON(gsi >= NR_IRQ_VECTORS);
if (platform_legacy_irq(gsi))
return gsi;
if (gsi_2_irq[gsi] != 0xFF)
return (int)gsi_2_irq[gsi];
tries = NR_IRQS;
try_again:
vector = assign_irq_vector(gsi, TARGET_CPUS);
/*
* Sharing vectors means sharing IRQs, so scan irq_vectors for previous
* use of vector and if found, return that IRQ. However, we never want
* to share legacy IRQs, which usually have a different trigger mode
* than PCI.
*/
for (i = 0; i < NR_IRQS; i++)
if (IO_APIC_VECTOR(i) == vector)
break;
if (platform_legacy_irq(i)) {
if (--tries >= 0) {
IO_APIC_VECTOR(i) = 0;
goto try_again;
}
panic("gsi_irq_sharing: didn't find an IRQ using vector 0x%02X for GSI %d", vector, gsi);
}
if (i < NR_IRQS) {
gsi_2_irq[gsi] = i;
printk(KERN_INFO "GSI %d sharing vector 0x%02X and IRQ %d\n",
gsi, vector, i);
return i;
}
i = next_irq++;
BUG_ON(i >= NR_IRQS);
gsi_2_irq[gsi] = i;
IO_APIC_VECTOR(i) = vector;
printk(KERN_INFO "GSI %d assigned vector 0x%02X and IRQ %d\n",
gsi, vector, i);
return i;
}
static int pin_2_irq(int idx, int apic, int pin)
{
int irq, i;
@ -597,7 +537,6 @@ static int pin_2_irq(int idx, int apic, int pin)
while (i < apic)
irq += nr_ioapic_registers[i++];
irq += pin;
irq = gsi_irq_sharing(irq);
}
BUG_ON(irq >= NR_IRQS);
return irq;
@ -1872,7 +1811,6 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int triggering, int p
return -EINVAL;
}
irq = gsi_irq_sharing(irq);
/*
* IRQs < 16 are already in the irq_2_pin[] map
*/