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https://github.com/adulau/aha.git
synced 2024-12-28 11:46:19 +00:00
pasemi_mac: add support for setting MTU
Currently keeping it at 1500 bytes or below since jumbo frames need special checksum offload on TX. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Olof Johansson
David S. Miller
parent
5cea73b0f7
commit
ef1ea0b424
2 changed files with 172 additions and 72 deletions
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@ -62,6 +62,10 @@
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#define LRO_MAX_AGGR 64
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#define PE_MIN_MTU 64
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#define PE_MAX_MTU 1500
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#define PE_DEF_MTU ETH_DATA_LEN
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#define DEFAULT_MSG_ENABLE \
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(NETIF_MSG_DRV | \
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NETIF_MSG_PROBE | \
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@ -82,8 +86,6 @@
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& ((ring)->size - 1))
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#define RING_AVAIL(ring) ((ring->size) - RING_USED(ring))
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#define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
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MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
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@ -175,6 +177,24 @@ static int mac_to_intf(struct pasemi_mac *mac)
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return -1;
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}
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static void pasemi_mac_intf_disable(struct pasemi_mac *mac)
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{
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unsigned int flags;
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flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
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flags &= ~PAS_MAC_CFG_PCFG_PE;
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write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
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}
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static void pasemi_mac_intf_enable(struct pasemi_mac *mac)
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{
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unsigned int flags;
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flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
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flags |= PAS_MAC_CFG_PCFG_PE;
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write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
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}
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static int pasemi_get_mac_addr(struct pasemi_mac *mac)
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{
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struct pci_dev *pdev = mac->pdev;
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@ -480,7 +500,7 @@ static void pasemi_mac_free_tx_resources(struct pasemi_mac *mac)
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}
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static void pasemi_mac_free_rx_resources(struct pasemi_mac *mac)
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static void pasemi_mac_free_rx_buffers(struct pasemi_mac *mac)
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{
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struct pasemi_mac_rxring *rx = rx_ring(mac);
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unsigned int i;
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@ -500,7 +520,12 @@ static void pasemi_mac_free_rx_resources(struct pasemi_mac *mac)
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}
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for (i = 0; i < RX_RING_SIZE; i++)
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RX_DESC(rx, i) = 0;
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RX_BUFF(rx, i) = 0;
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}
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static void pasemi_mac_free_rx_resources(struct pasemi_mac *mac)
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{
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pasemi_mac_free_rx_buffers(mac);
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dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
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rx_ring(mac)->buffers, rx_ring(mac)->buf_dma);
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@ -530,14 +555,14 @@ static void pasemi_mac_replenish_rx_ring(const struct net_device *dev,
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/* Entry in use? */
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WARN_ON(*buff);
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skb = dev_alloc_skb(BUF_SIZE);
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skb = dev_alloc_skb(mac->bufsz);
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skb_reserve(skb, LOCAL_SKB_ALIGN);
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if (unlikely(!skb))
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break;
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dma = pci_map_single(mac->dma_pdev, skb->data,
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BUF_SIZE - LOCAL_SKB_ALIGN,
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mac->bufsz - LOCAL_SKB_ALIGN,
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PCI_DMA_FROMDEVICE);
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if (unlikely(dma_mapping_error(dma))) {
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@ -547,7 +572,7 @@ static void pasemi_mac_replenish_rx_ring(const struct net_device *dev,
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info->skb = skb;
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info->dma = dma;
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*buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
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*buff = XCT_RXB_LEN(mac->bufsz) | XCT_RXB_ADDR(dma);
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fill++;
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}
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@ -677,7 +702,7 @@ static int pasemi_mac_clean_rx(struct pasemi_mac_rxring *rx,
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len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
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pci_unmap_single(pdev, dma, BUF_SIZE-LOCAL_SKB_ALIGN,
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pci_unmap_single(pdev, dma, mac->bufsz - LOCAL_SKB_ALIGN,
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PCI_DMA_FROMDEVICE);
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if (macrx & XCT_MACRX_CRC) {
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@ -901,24 +926,6 @@ static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
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return IRQ_HANDLED;
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}
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static void pasemi_mac_intf_disable(struct pasemi_mac *mac)
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{
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unsigned int flags;
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flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
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flags &= ~PAS_MAC_CFG_PCFG_PE;
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write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
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}
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static void pasemi_mac_intf_enable(struct pasemi_mac *mac)
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{
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unsigned int flags;
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flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
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flags |= PAS_MAC_CFG_PCFG_PE;
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write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
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}
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static void pasemi_adjust_link(struct net_device *dev)
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{
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struct pasemi_mac *mac = netdev_priv(dev);
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@ -1175,11 +1182,71 @@ out_rx_resources:
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#define MAX_RETRIES 5000
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static void pasemi_mac_pause_txchan(struct pasemi_mac *mac)
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{
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unsigned int sta, retries;
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int txch = tx_ring(mac)->chan.chno;
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write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch),
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PAS_DMA_TXCHAN_TCMDSTA_ST);
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for (retries = 0; retries < MAX_RETRIES; retries++) {
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sta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch));
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if (!(sta & PAS_DMA_TXCHAN_TCMDSTA_ACT))
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break;
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cond_resched();
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}
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if (sta & PAS_DMA_TXCHAN_TCMDSTA_ACT)
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dev_err(&mac->dma_pdev->dev,
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"Failed to stop tx channel, tcmdsta %08x\n", sta);
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write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch), 0);
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}
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static void pasemi_mac_pause_rxchan(struct pasemi_mac *mac)
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{
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unsigned int sta, retries;
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int rxch = rx_ring(mac)->chan.chno;
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write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch),
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PAS_DMA_RXCHAN_CCMDSTA_ST);
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for (retries = 0; retries < MAX_RETRIES; retries++) {
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sta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch));
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if (!(sta & PAS_DMA_RXCHAN_CCMDSTA_ACT))
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break;
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cond_resched();
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}
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if (sta & PAS_DMA_RXCHAN_CCMDSTA_ACT)
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dev_err(&mac->dma_pdev->dev,
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"Failed to stop rx channel, ccmdsta 08%x\n", sta);
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write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch), 0);
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}
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static void pasemi_mac_pause_rxint(struct pasemi_mac *mac)
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{
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unsigned int sta, retries;
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write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
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PAS_DMA_RXINT_RCMDSTA_ST);
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for (retries = 0; retries < MAX_RETRIES; retries++) {
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sta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
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if (!(sta & PAS_DMA_RXINT_RCMDSTA_ACT))
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break;
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cond_resched();
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}
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if (sta & PAS_DMA_RXINT_RCMDSTA_ACT)
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dev_err(&mac->dma_pdev->dev,
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"Failed to stop rx interface, rcmdsta %08x\n", sta);
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write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
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}
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static int pasemi_mac_close(struct net_device *dev)
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{
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struct pasemi_mac *mac = netdev_priv(dev);
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unsigned int sta;
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int retries;
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int rxch, txch;
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rxch = rx_ring(mac)->chan.chno;
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@ -1217,51 +1284,9 @@ static int pasemi_mac_close(struct net_device *dev)
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pasemi_mac_clean_tx(tx_ring(mac));
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pasemi_mac_clean_rx(rx_ring(mac), RX_RING_SIZE);
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/* Disable interface */
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write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch),
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PAS_DMA_TXCHAN_TCMDSTA_ST);
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write_dma_reg( PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
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PAS_DMA_RXINT_RCMDSTA_ST);
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write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch),
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PAS_DMA_RXCHAN_CCMDSTA_ST);
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for (retries = 0; retries < MAX_RETRIES; retries++) {
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sta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(rxch));
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if (!(sta & PAS_DMA_TXCHAN_TCMDSTA_ACT))
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break;
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cond_resched();
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}
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if (sta & PAS_DMA_TXCHAN_TCMDSTA_ACT)
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dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
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for (retries = 0; retries < MAX_RETRIES; retries++) {
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sta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch));
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if (!(sta & PAS_DMA_RXCHAN_CCMDSTA_ACT))
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break;
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cond_resched();
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}
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if (sta & PAS_DMA_RXCHAN_CCMDSTA_ACT)
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dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
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for (retries = 0; retries < MAX_RETRIES; retries++) {
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sta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
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if (!(sta & PAS_DMA_RXINT_RCMDSTA_ACT))
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break;
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cond_resched();
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}
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if (sta & PAS_DMA_RXINT_RCMDSTA_ACT)
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dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
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/* Then, disable the channel. This must be done separately from
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* stopping, since you can't disable when active.
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*/
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write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch), 0);
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write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch), 0);
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write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
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pasemi_mac_pause_txchan(mac);
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pasemi_mac_pause_rxint(mac);
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pasemi_mac_pause_rxchan(mac);
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free_irq(mac->tx->chan.irq, mac->tx);
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free_irq(mac->rx->chan.irq, mac->rx);
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@ -1415,6 +1440,62 @@ static int pasemi_mac_poll(struct napi_struct *napi, int budget)
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return pkts;
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}
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static int pasemi_mac_change_mtu(struct net_device *dev, int new_mtu)
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{
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struct pasemi_mac *mac = netdev_priv(dev);
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unsigned int reg;
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unsigned int rcmdsta;
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int running;
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if (new_mtu < PE_MIN_MTU || new_mtu > PE_MAX_MTU)
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return -EINVAL;
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running = netif_running(dev);
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if (running) {
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/* Need to stop the interface, clean out all already
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* received buffers, free all unused buffers on the RX
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* interface ring, then finally re-fill the rx ring with
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* the new-size buffers and restart.
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*/
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napi_disable(&mac->napi);
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netif_tx_disable(dev);
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pasemi_mac_intf_disable(mac);
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rcmdsta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
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pasemi_mac_pause_rxint(mac);
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pasemi_mac_clean_rx(rx_ring(mac), RX_RING_SIZE);
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pasemi_mac_free_rx_buffers(mac);
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}
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/* Change maxf, i.e. what size frames are accepted.
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* Need room for ethernet header and CRC word
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*/
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reg = read_mac_reg(mac, PAS_MAC_CFG_MACCFG);
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reg &= ~PAS_MAC_CFG_MACCFG_MAXF_M;
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reg |= PAS_MAC_CFG_MACCFG_MAXF(new_mtu + ETH_HLEN + 4);
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write_mac_reg(mac, PAS_MAC_CFG_MACCFG, reg);
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dev->mtu = new_mtu;
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/* MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
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mac->bufsz = new_mtu + ETH_HLEN + ETH_FCS_LEN + LOCAL_SKB_ALIGN + 128;
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if (running) {
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write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
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rcmdsta | PAS_DMA_RXINT_RCMDSTA_EN);
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rx_ring(mac)->next_to_fill = 0;
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pasemi_mac_replenish_rx_ring(dev, RX_RING_SIZE-1);
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napi_enable(&mac->napi);
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netif_start_queue(dev);
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pasemi_mac_intf_enable(mac);
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}
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return 0;
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}
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static int __devinit
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pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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@ -1503,6 +1584,11 @@ pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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dev->hard_start_xmit = pasemi_mac_start_tx;
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dev->set_multicast_list = pasemi_mac_set_rx_mode;
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dev->set_mac_address = pasemi_mac_set_mac_addr;
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dev->mtu = PE_DEF_MTU;
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/* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
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mac->bufsz = dev->mtu + ETH_HLEN + ETH_FCS_LEN + LOCAL_SKB_ALIGN + 128;
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dev->change_mtu = pasemi_mac_change_mtu;
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if (err)
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goto out;
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@ -59,6 +59,7 @@ struct pasemi_mac {
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struct phy_device *phydev;
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struct napi_struct napi;
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int bufsz; /* RX ring buffer size */
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u8 type;
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#define MAC_TYPE_GMAC 1
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#define MAC_TYPE_XAUI 2
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@ -96,6 +97,7 @@ struct pasemi_mac_buffer {
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/* MAC CFG register offsets */
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enum {
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PAS_MAC_CFG_PCFG = 0x80,
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PAS_MAC_CFG_MACCFG = 0x84,
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PAS_MAC_CFG_ADR0 = 0x8c,
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PAS_MAC_CFG_ADR1 = 0x90,
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PAS_MAC_CFG_TXP = 0x98,
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@ -132,6 +134,18 @@ enum {
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#define PAS_MAC_CFG_PCFG_SPD_100M 0x00000001
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#define PAS_MAC_CFG_PCFG_SPD_1G 0x00000002
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#define PAS_MAC_CFG_PCFG_SPD_10G 0x00000003
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#define PAS_MAC_CFG_MACCFG_TXT_M 0x70000000
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#define PAS_MAC_CFG_MACCFG_TXT_S 28
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#define PAS_MAC_CFG_MACCFG_PRES_M 0x0f000000
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#define PAS_MAC_CFG_MACCFG_PRES_S 24
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#define PAS_MAC_CFG_MACCFG_MAXF_M 0x00ffff00
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#define PAS_MAC_CFG_MACCFG_MAXF_S 8
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#define PAS_MAC_CFG_MACCFG_MAXF(x) (((x) << PAS_MAC_CFG_MACCFG_MAXF_S) & \
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PAS_MAC_CFG_MACCFG_MAXF_M)
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#define PAS_MAC_CFG_MACCFG_MINF_M 0x000000ff
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#define PAS_MAC_CFG_MACCFG_MINF_S 0
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#define PAS_MAC_CFG_TXP_FCF 0x01000000
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#define PAS_MAC_CFG_TXP_FCE 0x00800000
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#define PAS_MAC_CFG_TXP_FC 0x00400000
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