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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: edac, pci: remove pesky debug printk amd64_edac: restrict PCI config space access amd64_edac: fix forcing module load/unload amd64_edac: make driver loading more robust amd64_edac: fix driver instance freeing amd64_edac: fix K8 chip select reporting
This commit is contained in:
commit
eec74a410f
2 changed files with 28 additions and 19 deletions
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@ -1700,11 +1700,14 @@ static void f10_map_sysaddr_to_csrow(struct mem_ctl_info *mci,
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*/
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static void amd64_debug_display_dimm_sizes(int ctrl, struct amd64_pvt *pvt)
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{
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int dimm, size0, size1;
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int dimm, size0, size1, factor = 0;
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u32 dbam;
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u32 *dcsb;
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if (boot_cpu_data.x86 == 0xf) {
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if (pvt->dclr0 & F10_WIDTH_128)
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factor = 1;
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/* K8 families < revF not supported yet */
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if (pvt->ext_model < K8_REV_F)
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return;
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@ -1732,7 +1735,8 @@ static void amd64_debug_display_dimm_sizes(int ctrl, struct amd64_pvt *pvt)
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size1 = pvt->ops->dbam_to_cs(pvt, DBAM_DIMM(dimm, dbam));
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edac_printk(KERN_DEBUG, EDAC_MC, " %d: %5dMB %d: %5dMB\n",
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dimm * 2, size0, dimm * 2 + 1, size1);
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dimm * 2, size0 << factor,
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dimm * 2 + 1, size1 << factor);
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}
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}
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@ -2345,7 +2349,7 @@ static void amd64_read_mc_registers(struct amd64_pvt *pvt)
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amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_0, &pvt->dclr0);
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amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_0, &pvt->dchr0);
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if (!dct_ganging_enabled(pvt)) {
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if (!dct_ganging_enabled(pvt) && boot_cpu_data.x86 >= 0x10) {
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amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_1, &pvt->dclr1);
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amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_1, &pvt->dchr1);
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}
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@ -2686,9 +2690,8 @@ static int amd64_check_ecc_enabled(struct amd64_pvt *pvt)
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amd64_printk(KERN_WARNING, "%s", ecc_warning);
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return -ENODEV;
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}
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} else
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/* CLEAR the override, since BIOS controlled it */
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ecc_enable_override = 0;
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}
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return 0;
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}
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@ -2925,16 +2928,15 @@ static void __devexit amd64_remove_one_instance(struct pci_dev *pdev)
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amd64_free_mc_sibling_devices(pvt);
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kfree(pvt);
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mci->pvt_info = NULL;
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mci_lookup[pvt->mc_node_id] = NULL;
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/* unregister from EDAC MCE */
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amd_report_gart_errors(false);
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amd_unregister_ecc_decoder(amd64_decode_bus_error);
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/* Free the EDAC CORE resources */
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mci->pvt_info = NULL;
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mci_lookup[pvt->mc_node_id] = NULL;
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kfree(pvt);
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edac_mc_free(mci);
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}
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@ -3011,25 +3013,29 @@ static void amd64_setup_pci_device(void)
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static int __init amd64_edac_init(void)
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{
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int nb, err = -ENODEV;
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bool load_ok = false;
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edac_printk(KERN_INFO, EDAC_MOD_STR, EDAC_AMD64_VERSION "\n");
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opstate_init();
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if (cache_k8_northbridges() < 0)
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return err;
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goto err_ret;
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msrs = msrs_alloc();
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if (!msrs)
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goto err_ret;
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err = pci_register_driver(&amd64_pci_driver);
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if (err)
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return err;
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goto err_pci;
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/*
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* At this point, the array 'pvt_lookup[]' contains pointers to alloc'd
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* amd64_pvt structs. These will be used in the 2nd stage init function
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* to finish initialization of the MC instances.
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*/
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err = -ENODEV;
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for (nb = 0; nb < num_k8_northbridges; nb++) {
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if (!pvt_lookup[nb])
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continue;
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@ -3037,16 +3043,21 @@ static int __init amd64_edac_init(void)
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err = amd64_init_2nd_stage(pvt_lookup[nb]);
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if (err)
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goto err_2nd_stage;
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load_ok = true;
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}
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if (load_ok) {
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amd64_setup_pci_device();
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return 0;
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}
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err_2nd_stage:
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debugf0("2nd stage failed\n");
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pci_unregister_driver(&amd64_pci_driver);
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err_pci:
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msrs_free(msrs);
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msrs = NULL;
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err_ret:
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return err;
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}
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@ -534,8 +534,6 @@ static void edac_pci_dev_parity_clear(struct pci_dev *dev)
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{
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u8 header_type;
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debugf0("%s()\n", __func__);
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get_pci_parity_status(dev, 0);
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/* read the device TYPE, looking for bridges */
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