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Intel IOMMU: Iommu Gfx workaround
When we fix all the opensource gfx drivers to use the DMA api's, at that time we can yank this config options out. [jengelh@computergmbh.de: Kconfig fixes] Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Cc: Andi Kleen <ak@suse.de> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Muli Ben-Yehuda <muli@il.ibm.com> Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com> Cc: Arjan van de Ven <arjan@infradead.org> Cc: Ashok Raj <ashok.raj@intel.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Christoph Lameter <clameter@sgi.com> Cc: Greg KH <greg@kroah.com> Signed-off-by: Jan Engelhardt <jengelh@gmx.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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5 changed files with 79 additions and 4 deletions
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@ -57,6 +57,11 @@ Graphics Problems?
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If you encounter issues with graphics devices, you can try adding
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If you encounter issues with graphics devices, you can try adding
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option intel_iommu=igfx_off to turn off the integrated graphics engine.
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option intel_iommu=igfx_off to turn off the integrated graphics engine.
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If it happens to be a PCI device included in the INCLUDE_ALL Engine,
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then try enabling CONFIG_DMAR_GFX_WA to setup a 1-1 map. We hear
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graphics drivers may be in process of using DMA api's in the near
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future and at that time this option can be yanked out.
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Some exceptions to IOVA
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Some exceptions to IOVA
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-----------------------
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-----------------------
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Interrupt ranges are not address translated, (0xfee00000 - 0xfeefffff).
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Interrupt ranges are not address translated, (0xfee00000 - 0xfeefffff).
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@ -729,3 +729,22 @@ __init void e820_setup_gap(void)
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printk(KERN_INFO "Allocating PCI resources starting at %lx (gap: %lx:%lx)\n",
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printk(KERN_INFO "Allocating PCI resources starting at %lx (gap: %lx:%lx)\n",
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pci_mem_start, gapstart, gapsize);
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pci_mem_start, gapstart, gapsize);
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}
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}
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int __init arch_get_ram_range(int slot, u64 *addr, u64 *size)
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{
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int i;
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if (slot < 0 || slot >= e820.nr_map)
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return -1;
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for (i = slot; i < e820.nr_map; i++) {
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if (e820.map[i].type != E820_RAM)
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continue;
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break;
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}
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if (i == e820.nr_map || e820.map[i].addr > (max_pfn << PAGE_SHIFT))
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return -1;
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*addr = e820.map[i].addr;
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*size = min_t(u64, e820.map[i].size + e820.map[i].addr,
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max_pfn << PAGE_SHIFT) - *addr;
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return i + 1;
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}
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@ -755,11 +755,22 @@ config DMAR
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depends on PCI_MSI && ACPI && EXPERIMENTAL
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depends on PCI_MSI && ACPI && EXPERIMENTAL
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default y
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default y
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help
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help
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DMA remapping(DMAR) devices support enables independent address
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DMA remapping (DMAR) devices support enables independent address
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translations for Direct Memory Access(DMA) from Devices.
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translations for Direct Memory Access (DMA) from devices.
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These DMA remapping devices are reported via ACPI tables
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These DMA remapping devices are reported via ACPI tables
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and includes pci device scope covered by these DMA
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and include PCI device scope covered by these DMA
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remapping device.
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remapping devices.
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config DMAR_GFX_WA
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bool "Support for Graphics workaround"
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depends on DMAR
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default y
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help
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Current Graphics drivers tend to use physical address
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for DMA and avoid using DMA APIs. Setting this config
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option permits the IOMMU driver to set a unity map for
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all the OS-visible memory. Hence the driver can continue
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to use physical addresses for DMA.
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source "drivers/pci/pcie/Kconfig"
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source "drivers/pci/pcie/Kconfig"
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@ -1602,6 +1602,36 @@ static inline int iommu_prepare_rmrr_dev(struct dmar_rmrr_unit *rmrr,
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rmrr->end_address + 1);
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rmrr->end_address + 1);
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}
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}
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#ifdef CONFIG_DMAR_GFX_WA
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extern int arch_get_ram_range(int slot, u64 *addr, u64 *size);
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static void __init iommu_prepare_gfx_mapping(void)
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{
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struct pci_dev *pdev = NULL;
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u64 base, size;
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int slot;
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int ret;
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for_each_pci_dev(pdev) {
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if (pdev->sysdata == DUMMY_DEVICE_DOMAIN_INFO ||
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!IS_GFX_DEVICE(pdev))
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continue;
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printk(KERN_INFO "IOMMU: gfx device %s 1-1 mapping\n",
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pci_name(pdev));
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slot = arch_get_ram_range(0, &base, &size);
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while (slot >= 0) {
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ret = iommu_prepare_identity_map(pdev,
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base, base + size);
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if (ret)
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goto error;
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slot = arch_get_ram_range(slot, &base, &size);
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}
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continue;
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error:
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printk(KERN_ERR "IOMMU: mapping reserved region failed\n");
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}
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}
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#endif
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int __init init_dmars(void)
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int __init init_dmars(void)
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{
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{
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struct dmar_drhd_unit *drhd;
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struct dmar_drhd_unit *drhd;
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@ -1665,6 +1695,8 @@ int __init init_dmars(void)
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}
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}
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}
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}
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iommu_prepare_gfx_mapping();
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/*
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/*
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* for each drhd
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* for each drhd
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* enable fault log
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* enable fault log
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@ -2176,3 +2208,4 @@ int __init intel_iommu_init(void)
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dma_ops = &intel_dma_ops;
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dma_ops = &intel_dma_ops;
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return 0;
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return 0;
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}
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}
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@ -315,4 +315,11 @@ struct intel_iommu {
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struct sys_device sysdev;
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struct sys_device sysdev;
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};
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};
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#ifndef CONFIG_DMAR_GFX_WA
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static inline void iommu_prepare_gfx_mapping(void)
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{
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return;
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}
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#endif /* !CONFIG_DMAR_GFX_WA */
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#endif
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#endif
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