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[ARM] 3326/1: H1940 - Control latches
Patch from Ben Dooks Define the bits for the two board control latches that control various items on the H1940 iPAQ. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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2 changed files with 91 additions and 2 deletions
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@ -46,10 +46,11 @@
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#include <asm/irq.h>
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#include <asm/mach-types.h>
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//#include <asm/debug-ll.h>
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#include <asm/arch/regs-serial.h>
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#include <asm/arch/regs-lcd.h>
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#include <asm/arch/h1940-latch.h>
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#include <asm/arch/fb.h>
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#include <linux/serial_core.h>
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@ -59,7 +60,12 @@
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#include "cpu.h"
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static struct map_desc h1940_iodesc[] __initdata = {
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/* nothing here yet */
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[0] = {
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.virtual = (unsigned long)H1940_LATCH,
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.pfn = __phys_to_pfn(H1940_PA_LATCH),
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.length = SZ_16K,
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.type = MT_DEVICE
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},
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};
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#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
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@ -92,6 +98,25 @@ static struct s3c2410_uartcfg h1940_uartcfgs[] = {
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}
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};
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/* Board control latch control */
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static unsigned int latch_state = H1940_LATCH_DEFAULT;
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void h1940_latch_control(unsigned int clear, unsigned int set)
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{
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unsigned long flags;
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local_irq_save(flags);
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latch_state &= ~clear;
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latch_state |= set;
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__raw_writel(latch_state, H1940_LATCH);
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local_irq_restore(flags);
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}
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EXPORT_SYMBOL_GPL(h1940_latch_control);
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/**
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64
include/asm-arm/arch-s3c2410/h1940-latch.h
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64
include/asm-arm/arch-s3c2410/h1940-latch.h
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/* linux/include/asm-arm/arch-s3c2410/h1940-latch.h
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*
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* (c) 2005 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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*
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* iPAQ H1940 series - latch definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_H1940_LATCH_H
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#define __ASM_ARCH_H1940_LATCH_H
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#ifndef __ASSEMBLY__
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#define H1940_LATCH ((void __iomem *)0xF8000000)
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#else
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#define H1940_LATCH 0xF8000000
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#endif
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#define H1940_PA_LATCH (S3C2410_CS2)
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/* SD layer latch */
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#define H1940_LATCH_SDQ1 (1<<16)
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#define H1940_LATCH_LCD_P1 (1<<17)
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#define H1940_LATCH_LCD_P2 (1<<18)
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#define H1940_LATCH_LCD_P3 (1<<19)
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#define H1940_LATCH_MAX1698_nSHUTDOWN (1<<20) /* LCD backlight */
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#define H1940_LATCH_LED_RED (1<<21)
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#define H1940_LATCH_SDQ7 (1<<22)
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#define H1940_LATCH_USB_DP (1<<23)
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/* CPU layer latch */
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#define H1940_LATCH_UDA_POWER (1<<24)
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#define H1940_LATCH_AUDIO_POWER (1<<25)
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#define H1940_LATCH_SM803_ENABLE (1<<26)
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#define H1940_LATCH_LCD_P4 (1<<27)
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#define H1940_LATCH_CPUQ5 (1<<28) /* untraced */
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#define H1940_LATCH_BLUETOOTH_POWER (1<<29) /* active high */
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#define H1940_LATCH_LED_GREEN (1<<30)
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#define H1940_LATCH_LED_FLASH (1<<31)
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/* default settings */
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#define H1940_LATCH_DEFAULT \
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H1940_LATCH_LCD_P4 | \
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H1940_LATCH_SM803_ENABLE | \
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H1940_LATCH_SDQ1 | \
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H1940_LATCH_LCD_P1 | \
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H1940_LATCH_LCD_P2 | \
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H1940_LATCH_LCD_P3 | \
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H1940_LATCH_MAX1698_nSHUTDOWN | \
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H1940_LATCH_CPUQ5
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/* control functions */
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extern void h1940_latch_control(unsigned int clear, unsigned int set);
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#endif /* __ASM_ARCH_H1940_LATCH_H */
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