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[CPUFREQ] p4-clockmod: fix support for Core

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Support for Core CPUs was broken in two ways in speedstep-lib: for x86_64,
we missed a MSR definition; for both x86_64 and i386, the FSB calculation
was wrong by four (it's a quad-pumped bus). Also increase the accuracy
of the calculation.

Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Dave Jones <davej@redhat.com>
This commit is contained in:
Dominik Brodowski 2006-12-04 20:39:16 -05:00 committed by Dave Jones
parent 7531a0b56f
commit e11952b971
2 changed files with 8 additions and 10 deletions
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17
arch/i386/kernel/cpu/cpufreq/speedstep-lib.c
View file

@ -123,23 +123,22 @@ static unsigned int pentiumM_get_frequency(void)
return (msr_tmp * 100 * 1000);
}
#ifdef CONFIG_X86_32
static unsigned int pentium_core_get_frequency(void)
{
u32 fsb = 0;
u32 msr_lo, msr_tmp;
rdmsr(MSR_FSB_FREQ, msr_lo, msr_tmp);
/* see table B-2 of 24547212.pdf */
/* see table B-2 of 25366920.pdf */
switch (msr_lo & 0x07) {
case 5:
fsb = 400;
fsb = 100000;
break;
case 1:
fsb = 533;
fsb = 133333;
break;
case 3:
fsb = 667;
fsb = 166667;
break;
default:
printk(KERN_ERR "PCORE - MSR_FSB_FREQ undefined value");
@ -149,11 +148,11 @@ static unsigned int pentium_core_get_frequency(void)
dprintk("PCORE - MSR_IA32_EBL_CR_POWERON: 0x%x 0x%x\n", msr_lo, msr_tmp);
msr_tmp = (msr_lo >> 22) & 0x1f;
dprintk("bits 22-26 are 0x%x, speed is %u\n", msr_tmp, (msr_tmp * fsb * 1000));
dprintk("bits 22-26 are 0x%x, speed is %u\n", msr_tmp, (msr_tmp * fsb));
return (msr_tmp * fsb * 1000);
return (msr_tmp * fsb);
}
#endif
static unsigned int pentium4_get_frequency(void)
{
@ -205,10 +204,8 @@ static unsigned int pentium4_get_frequency(void)
unsigned int speedstep_get_processor_frequency(unsigned int processor)
{
switch (processor) {
#ifdef CONFIG_X86_32
case SPEEDSTEP_PROCESSOR_PCORE:
return pentium_core_get_frequency();
#endif
case SPEEDSTEP_PROCESSOR_PM:
return pentiumM_get_frequency();
case SPEEDSTEP_PROCESSOR_P4D:

1
include/asm-x86_64/msr.h
View file

@ -189,6 +189,7 @@ static inline unsigned int cpuid_edx(unsigned int op)
#define MSR_IA32_PERFCTR0 0xc1
#define MSR_IA32_PERFCTR1 0xc2
#define MSR_FSB_FREQ 0xcd
#define MSR_MTRRcap 0x0fe
#define MSR_IA32_BBL_CR_CTL 0x119