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mtd: jedec_probe: add PSD4256G6V id
Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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1 changed files with 19 additions and 0 deletions
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@ -155,6 +155,7 @@
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#define M50LPW080 0x002F
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#define M50LPW080 0x002F
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#define M50FLW080A 0x0080
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#define M50FLW080A 0x0080
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#define M50FLW080B 0x0081
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#define M50FLW080B 0x0081
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#define PSD4256G6V 0x00e9
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/* SST */
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/* SST */
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#define SST29EE020 0x0010
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#define SST29EE020 0x0010
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@ -206,6 +207,7 @@ enum uaddr {
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MTD_UADDR_0x0555_0x02AA,
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MTD_UADDR_0x0555_0x02AA,
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MTD_UADDR_0x0555_0x0AAA,
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MTD_UADDR_0x0555_0x0AAA,
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MTD_UADDR_0x5555_0x2AAA,
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MTD_UADDR_0x5555_0x2AAA,
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MTD_UADDR_0x0AAA_0x0554,
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MTD_UADDR_0x0AAA_0x0555,
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MTD_UADDR_0x0AAA_0x0555,
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MTD_UADDR_0xAAAA_0x5555,
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MTD_UADDR_0xAAAA_0x5555,
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MTD_UADDR_DONT_CARE, /* Requires an arbitrary address */
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MTD_UADDR_DONT_CARE, /* Requires an arbitrary address */
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@ -250,6 +252,11 @@ static const struct unlock_addr unlock_addrs[] = {
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.addr2 = 0x2aaa
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.addr2 = 0x2aaa
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},
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},
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[MTD_UADDR_0x0AAA_0x0554] = {
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.addr1 = 0x0AAA,
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.addr2 = 0x0554
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},
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[MTD_UADDR_0x0AAA_0x0555] = {
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[MTD_UADDR_0x0AAA_0x0555] = {
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.addr1 = 0x0AAA,
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.addr1 = 0x0AAA,
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.addr2 = 0x0555
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.addr2 = 0x0555
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@ -1743,6 +1750,18 @@ static const struct amd_flash_info jedec_table[] = {
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ERASEINFO(0x10000,13),
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ERASEINFO(0x10000,13),
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ERASEINFO(0x1000,16),
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ERASEINFO(0x1000,16),
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}
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}
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}, {
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.mfr_id = 0xff00 | MANUFACTURER_ST,
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.dev_id = 0xff00 | PSD4256G6V,
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.name = "ST PSD4256G6V",
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.devtypes = CFI_DEVICETYPE_X16,
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.uaddr = MTD_UADDR_0x0AAA_0x0554,
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.dev_size = SIZE_1MiB,
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.cmd_set = P_ID_AMD_STD,
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.nr_regions = 1,
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.regions = {
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ERASEINFO(0x10000,16),
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}
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}, {
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}, {
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.mfr_id = MANUFACTURER_TOSHIBA,
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.mfr_id = MANUFACTURER_TOSHIBA,
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.dev_id = TC58FVT160,
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.dev_id = TC58FVT160,
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