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powerpc/8xx: Fix regression introduced by cache coherency rewrite
After upgrading to the latest kernel on my mpc875 userspace started
running incredibly slow (hours to get to a shell, even!).
I tracked it down to commit 8d30c14cab
,
that patch removed a work-around for the 8xx. Adding it
back makes my problem go away.
Signed-off-by: Rex Feany <rfeany@mrv.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
parent
daf8f40391
commit
e0908085fc
1 changed files with 16 additions and 3 deletions
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@ -30,6 +30,8 @@
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#include <asm/tlbflush.h>
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#include <asm/tlb.h>
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#include "mmu_decl.h"
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DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
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#ifdef CONFIG_SMP
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@ -166,7 +168,7 @@ struct page * maybe_pte_to_page(pte_t pte)
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* support falls into the same category.
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*/
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static pte_t set_pte_filter(pte_t pte)
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static pte_t set_pte_filter(pte_t pte, unsigned long addr)
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{
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pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
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if (pte_looks_normal(pte) && !(cpu_has_feature(CPU_FTR_COHERENT_ICACHE) ||
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@ -175,6 +177,17 @@ static pte_t set_pte_filter(pte_t pte)
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if (!pg)
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return pte;
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if (!test_bit(PG_arch_1, &pg->flags)) {
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#ifdef CONFIG_8xx
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/* On 8xx, cache control instructions (particularly
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* "dcbst" from flush_dcache_icache) fault as write
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* operation if there is an unpopulated TLB entry
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* for the address in question. To workaround that,
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* we invalidate the TLB here, thus avoiding dcbst
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* misbehaviour.
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*/
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/* 8xx doesn't care about PID, size or ind args */
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_tlbil_va(addr, 0, 0, 0);
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#endif /* CONFIG_8xx */
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flush_dcache_icache_page(pg);
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set_bit(PG_arch_1, &pg->flags);
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}
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@ -194,7 +207,7 @@ static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
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* as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so
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* instead we "filter out" the exec permission for non clean pages.
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*/
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static pte_t set_pte_filter(pte_t pte)
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static pte_t set_pte_filter(pte_t pte, unsigned long addr)
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{
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struct page *pg;
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@ -276,7 +289,7 @@ void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
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* this context might not have been activated yet when this
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* is called.
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*/
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pte = set_pte_filter(pte);
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pte = set_pte_filter(pte, addr);
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/* Perform the setting of the PTE */
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__set_pte_at(mm, addr, ptep, pte, 0);
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