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[PATCH] PNX8550 UART driver
Add UART support for PNX8330/8550/8950 Philips MIPS-based SoCs. Signed-off-by: Vitaly Wool <vitalywool@gmail.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Vitaly Wool
Linus Torvalds
parent
e6fa0ba304
commit
de8211b96b
3 changed files with 869 additions and 0 deletions
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@ -686,6 +686,22 @@ config SERIAL_SH_SCI_CONSOLE
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depends on SERIAL_SH_SCI=y
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select SERIAL_CORE_CONSOLE
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config SERIAL_PNX8XXX
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bool "Enable PNX8XXX SoCs' UART Support"
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depends on MIPS && SOC_PNX8550
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select SERIAL_CORE
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help
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If you have a MIPS-based Philips SoC such as PNX8550 or PNX8330
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and you want to use serial ports, say Y. Otherwise, say N.
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config SERIAL_PNX8XXX_CONSOLE
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bool "Enable PNX8XX0 serial console"
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depends on SERIAL_PNX8XXX
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select SERIAL_CORE_CONSOLE
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help
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If you have a MIPS-based Philips SoC such as PNX8550 or PNX8330
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and you want to use serial console, say Y. Otherwise, say N.
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config SERIAL_CORE
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tristate
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@ -25,6 +25,7 @@ obj-$(CONFIG_SERIAL_AMBA_PL010) += amba-pl010.o
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obj-$(CONFIG_SERIAL_AMBA_PL011) += amba-pl011.o
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obj-$(CONFIG_SERIAL_CLPS711X) += clps711x.o
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obj-$(CONFIG_SERIAL_PXA) += pxa.o
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obj-$(CONFIG_SERIAL_PNX8XXX) += pnx8xxx_uart.o
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obj-$(CONFIG_SERIAL_SA1100) += sa1100.o
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obj-$(CONFIG_SERIAL_S3C2410) += s3c2410.o
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obj-$(CONFIG_SERIAL_SUNCORE) += suncore.o
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852
drivers/serial/pnx8xxx_uart.c
Normal file
852
drivers/serial/pnx8xxx_uart.c
Normal file
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@ -0,0 +1,852 @@
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/*
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* UART driver for PNX8XXX SoCs
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*
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* Author: Per Hallsmark per.hallsmark@mvista.com
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* Ported to 2.6 kernel by EmbeddedAlley
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* Reworked by Vitaly Wool <vitalywool@gmail.com>
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*
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* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
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* Copyright (C) 2000 Deep Blue Solutions Ltd.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of
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* any kind, whether express or implied.
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*
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*/
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#if defined(CONFIG_SERIAL_PNX8XXX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/sysrq.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/serial_core.h>
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#include <linux/serial.h>
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#include <linux/serial_pnx8xxx.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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/* We'll be using StrongARM sa1100 serial port major/minor */
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#define SERIAL_PNX8XXX_MAJOR 204
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#define MINOR_START 5
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#define NR_PORTS 2
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#define PNX8XXX_ISR_PASS_LIMIT 256
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/*
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* Convert from ignore_status_mask or read_status_mask to FIFO
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* and interrupt status bits
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*/
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#define SM_TO_FIFO(x) ((x) >> 10)
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#define SM_TO_ISTAT(x) ((x) & 0x000001ff)
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#define FIFO_TO_SM(x) ((x) << 10)
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#define ISTAT_TO_SM(x) ((x) & 0x000001ff)
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/*
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* This is the size of our serial port register set.
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*/
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#define UART_PORT_SIZE 0x1000
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/*
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* This determines how often we check the modem status signals
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* for any change. They generally aren't connected to an IRQ
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* so we have to poll them. We also check immediately before
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* filling the TX fifo incase CTS has been dropped.
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*/
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#define MCTRL_TIMEOUT (250*HZ/1000)
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extern struct pnx8xxx_port pnx8xxx_ports[];
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static inline int serial_in(struct pnx8xxx_port *sport, int offset)
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{
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return (__raw_readl(sport->port.membase + offset));
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}
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static inline void serial_out(struct pnx8xxx_port *sport, int offset, int value)
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{
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__raw_writel(value, sport->port.membase + offset);
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}
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/*
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* Handle any change of modem status signal since we were last called.
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*/
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static void pnx8xxx_mctrl_check(struct pnx8xxx_port *sport)
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{
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unsigned int status, changed;
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status = sport->port.ops->get_mctrl(&sport->port);
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changed = status ^ sport->old_status;
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if (changed == 0)
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return;
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sport->old_status = status;
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if (changed & TIOCM_RI)
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sport->port.icount.rng++;
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if (changed & TIOCM_DSR)
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sport->port.icount.dsr++;
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if (changed & TIOCM_CAR)
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uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
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if (changed & TIOCM_CTS)
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uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
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wake_up_interruptible(&sport->port.info->delta_msr_wait);
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}
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/*
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* This is our per-port timeout handler, for checking the
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* modem status signals.
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*/
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static void pnx8xxx_timeout(unsigned long data)
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{
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struct pnx8xxx_port *sport = (struct pnx8xxx_port *)data;
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unsigned long flags;
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if (sport->port.info) {
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spin_lock_irqsave(&sport->port.lock, flags);
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pnx8xxx_mctrl_check(sport);
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spin_unlock_irqrestore(&sport->port.lock, flags);
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mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
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}
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}
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/*
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* interrupts disabled on entry
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*/
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static void pnx8xxx_stop_tx(struct uart_port *port)
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{
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struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
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u32 ien;
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/* Disable TX intr */
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ien = serial_in(sport, PNX8XXX_IEN);
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serial_out(sport, PNX8XXX_IEN, ien & ~PNX8XXX_UART_INT_ALLTX);
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/* Clear all pending TX intr */
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serial_out(sport, PNX8XXX_ICLR, PNX8XXX_UART_INT_ALLTX);
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}
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/*
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* interrupts may not be disabled on entry
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*/
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static void pnx8xxx_start_tx(struct uart_port *port)
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{
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struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
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u32 ien;
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/* Clear all pending TX intr */
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serial_out(sport, PNX8XXX_ICLR, PNX8XXX_UART_INT_ALLTX);
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/* Enable TX intr */
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ien = serial_in(sport, PNX8XXX_IEN);
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serial_out(sport, PNX8XXX_IEN, ien | PNX8XXX_UART_INT_ALLTX);
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}
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/*
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* Interrupts enabled
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*/
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static void pnx8xxx_stop_rx(struct uart_port *port)
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{
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struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
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u32 ien;
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/* Disable RX intr */
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ien = serial_in(sport, PNX8XXX_IEN);
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serial_out(sport, PNX8XXX_IEN, ien & ~PNX8XXX_UART_INT_ALLRX);
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/* Clear all pending RX intr */
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serial_out(sport, PNX8XXX_ICLR, PNX8XXX_UART_INT_ALLRX);
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}
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/*
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* Set the modem control timer to fire immediately.
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*/
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static void pnx8xxx_enable_ms(struct uart_port *port)
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{
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struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
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mod_timer(&sport->timer, jiffies);
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}
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static void pnx8xxx_rx_chars(struct pnx8xxx_port *sport)
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{
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struct tty_struct *tty = sport->port.info->tty;
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unsigned int status, ch, flg;
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status = FIFO_TO_SM(serial_in(sport, PNX8XXX_FIFO)) |
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ISTAT_TO_SM(serial_in(sport, PNX8XXX_ISTAT));
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while (status & FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFIFO)) {
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ch = serial_in(sport, PNX8XXX_FIFO);
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sport->port.icount.rx++;
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flg = TTY_NORMAL;
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/*
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* note that the error handling code is
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* out of the main execution path
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*/
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if (status & (FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFE |
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PNX8XXX_UART_FIFO_RXPAR) |
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ISTAT_TO_SM(PNX8XXX_UART_INT_RXOVRN))) {
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if (status & FIFO_TO_SM(PNX8XXX_UART_FIFO_RXPAR))
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sport->port.icount.parity++;
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else if (status & FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFE))
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sport->port.icount.frame++;
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if (status & ISTAT_TO_SM(PNX8XXX_UART_INT_RXOVRN))
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sport->port.icount.overrun++;
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status &= sport->port.read_status_mask;
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if (status & FIFO_TO_SM(PNX8XXX_UART_FIFO_RXPAR))
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flg = TTY_PARITY;
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else if (status & FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFE))
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flg = TTY_FRAME;
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#ifdef SUPPORT_SYSRQ
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sport->port.sysrq = 0;
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#endif
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}
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if (uart_handle_sysrq_char(&sport->port, ch))
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goto ignore_char;
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uart_insert_char(&sport->port, status,
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ISTAT_TO_SM(PNX8XXX_UART_INT_RXOVRN), ch, flg);
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ignore_char:
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serial_out(sport, PNX8XXX_LCR, serial_in(sport, PNX8XXX_LCR) |
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PNX8XXX_UART_LCR_RX_NEXT);
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status = FIFO_TO_SM(serial_in(sport, PNX8XXX_FIFO)) |
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ISTAT_TO_SM(serial_in(sport, PNX8XXX_ISTAT));
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}
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tty_flip_buffer_push(tty);
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}
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static void pnx8xxx_tx_chars(struct pnx8xxx_port *sport)
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{
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struct circ_buf *xmit = &sport->port.info->xmit;
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if (sport->port.x_char) {
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serial_out(sport, PNX8XXX_FIFO, sport->port.x_char);
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sport->port.icount.tx++;
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sport->port.x_char = 0;
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return;
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}
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/*
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* Check the modem control lines before
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* transmitting anything.
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*/
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pnx8xxx_mctrl_check(sport);
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if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
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pnx8xxx_stop_tx(&sport->port);
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return;
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}
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/*
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* TX while bytes available
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*/
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while (((serial_in(sport, PNX8XXX_FIFO) &
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PNX8XXX_UART_FIFO_TXFIFO) >> 16) < 16) {
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serial_out(sport, PNX8XXX_FIFO, xmit->buf[xmit->tail]);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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sport->port.icount.tx++;
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if (uart_circ_empty(xmit))
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break;
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}
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(&sport->port);
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if (uart_circ_empty(xmit))
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pnx8xxx_stop_tx(&sport->port);
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}
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static irqreturn_t pnx8xxx_int(int irq, void *dev_id)
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{
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struct pnx8xxx_port *sport = dev_id;
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unsigned int status;
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spin_lock(&sport->port.lock);
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/* Get the interrupts */
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status = serial_in(sport, PNX8XXX_ISTAT) & serial_in(sport, PNX8XXX_IEN);
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/* Break signal received */
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if (status & PNX8XXX_UART_INT_BREAK) {
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sport->port.icount.brk++;
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uart_handle_break(&sport->port);
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}
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/* Byte received */
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if (status & PNX8XXX_UART_INT_RX)
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pnx8xxx_rx_chars(sport);
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/* TX holding register empty - transmit a byte */
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if (status & PNX8XXX_UART_INT_TX)
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pnx8xxx_tx_chars(sport);
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/* Clear the ISTAT register */
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serial_out(sport, PNX8XXX_ICLR, status);
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spin_unlock(&sport->port.lock);
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return IRQ_HANDLED;
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}
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/*
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* Return TIOCSER_TEMT when transmitter is not busy.
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*/
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static unsigned int pnx8xxx_tx_empty(struct uart_port *port)
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{
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struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
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return serial_in(sport, PNX8XXX_FIFO) & PNX8XXX_UART_FIFO_TXFIFO_STA ? 0 : TIOCSER_TEMT;
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}
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static unsigned int pnx8xxx_get_mctrl(struct uart_port *port)
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{
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struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
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unsigned int mctrl = TIOCM_DSR;
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unsigned int msr;
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/* REVISIT */
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msr = serial_in(sport, PNX8XXX_MCR);
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mctrl |= msr & PNX8XXX_UART_MCR_CTS ? TIOCM_CTS : 0;
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mctrl |= msr & PNX8XXX_UART_MCR_DCD ? TIOCM_CAR : 0;
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return mctrl;
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}
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static void pnx8xxx_set_mctrl(struct uart_port *port, unsigned int mctrl)
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{
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#if 0 /* FIXME */
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struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
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unsigned int msr;
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#endif
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}
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/*
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* Interrupts always disabled.
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*/
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static void pnx8xxx_break_ctl(struct uart_port *port, int break_state)
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{
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struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
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unsigned long flags;
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unsigned int lcr;
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spin_lock_irqsave(&sport->port.lock, flags);
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lcr = serial_in(sport, PNX8XXX_LCR);
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if (break_state == -1)
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lcr |= PNX8XXX_UART_LCR_TXBREAK;
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else
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lcr &= ~PNX8XXX_UART_LCR_TXBREAK;
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serial_out(sport, PNX8XXX_LCR, lcr);
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spin_unlock_irqrestore(&sport->port.lock, flags);
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}
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static int pnx8xxx_startup(struct uart_port *port)
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{
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struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
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int retval;
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/*
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* Allocate the IRQ
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*/
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retval = request_irq(sport->port.irq, pnx8xxx_int, 0,
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"pnx8xxx-uart", sport);
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if (retval)
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return retval;
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/*
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* Finally, clear and enable interrupts
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*/
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serial_out(sport, PNX8XXX_ICLR, PNX8XXX_UART_INT_ALLRX |
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PNX8XXX_UART_INT_ALLTX);
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serial_out(sport, PNX8XXX_IEN, serial_in(sport, PNX8XXX_IEN) |
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PNX8XXX_UART_INT_ALLRX |
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PNX8XXX_UART_INT_ALLTX);
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/*
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* Enable modem status interrupts
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*/
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spin_lock_irq(&sport->port.lock);
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pnx8xxx_enable_ms(&sport->port);
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spin_unlock_irq(&sport->port.lock);
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return 0;
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}
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static void pnx8xxx_shutdown(struct uart_port *port)
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{
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struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
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int lcr;
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/*
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* Stop our timer.
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*/
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del_timer_sync(&sport->timer);
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/*
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* Disable all interrupts
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*/
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serial_out(sport, PNX8XXX_IEN, 0);
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/*
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* Reset the Tx and Rx FIFOS, disable the break condition
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*/
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lcr = serial_in(sport, PNX8XXX_LCR);
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lcr &= ~PNX8XXX_UART_LCR_TXBREAK;
|
||||
lcr |= PNX8XXX_UART_LCR_TX_RST | PNX8XXX_UART_LCR_RX_RST;
|
||||
serial_out(sport, PNX8XXX_LCR, lcr);
|
||||
|
||||
/*
|
||||
* Clear all interrupts
|
||||
*/
|
||||
serial_out(sport, PNX8XXX_ICLR, PNX8XXX_UART_INT_ALLRX |
|
||||
PNX8XXX_UART_INT_ALLTX);
|
||||
|
||||
/*
|
||||
* Free the interrupt
|
||||
*/
|
||||
free_irq(sport->port.irq, sport);
|
||||
}
|
||||
|
||||
static void
|
||||
pnx8xxx_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||
struct ktermios *old)
|
||||
{
|
||||
struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
|
||||
unsigned long flags;
|
||||
unsigned int lcr_fcr, old_ien, baud, quot;
|
||||
unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
|
||||
|
||||
/*
|
||||
* We only support CS7 and CS8.
|
||||
*/
|
||||
while ((termios->c_cflag & CSIZE) != CS7 &&
|
||||
(termios->c_cflag & CSIZE) != CS8) {
|
||||
termios->c_cflag &= ~CSIZE;
|
||||
termios->c_cflag |= old_csize;
|
||||
old_csize = CS8;
|
||||
}
|
||||
|
||||
if ((termios->c_cflag & CSIZE) == CS8)
|
||||
lcr_fcr = PNX8XXX_UART_LCR_8BIT;
|
||||
else
|
||||
lcr_fcr = 0;
|
||||
|
||||
if (termios->c_cflag & CSTOPB)
|
||||
lcr_fcr |= PNX8XXX_UART_LCR_2STOPB;
|
||||
if (termios->c_cflag & PARENB) {
|
||||
lcr_fcr |= PNX8XXX_UART_LCR_PAREN;
|
||||
if (!(termios->c_cflag & PARODD))
|
||||
lcr_fcr |= PNX8XXX_UART_LCR_PAREVN;
|
||||
}
|
||||
|
||||
/*
|
||||
* Ask the core to calculate the divisor for us.
|
||||
*/
|
||||
baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
|
||||
quot = uart_get_divisor(port, baud);
|
||||
|
||||
spin_lock_irqsave(&sport->port.lock, flags);
|
||||
|
||||
sport->port.read_status_mask = ISTAT_TO_SM(PNX8XXX_UART_INT_RXOVRN) |
|
||||
ISTAT_TO_SM(PNX8XXX_UART_INT_EMPTY) |
|
||||
ISTAT_TO_SM(PNX8XXX_UART_INT_RX);
|
||||
if (termios->c_iflag & INPCK)
|
||||
sport->port.read_status_mask |=
|
||||
FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFE) |
|
||||
FIFO_TO_SM(PNX8XXX_UART_FIFO_RXPAR);
|
||||
if (termios->c_iflag & (BRKINT | PARMRK))
|
||||
sport->port.read_status_mask |=
|
||||
ISTAT_TO_SM(PNX8XXX_UART_INT_BREAK);
|
||||
|
||||
/*
|
||||
* Characters to ignore
|
||||
*/
|
||||
sport->port.ignore_status_mask = 0;
|
||||
if (termios->c_iflag & IGNPAR)
|
||||
sport->port.ignore_status_mask |=
|
||||
FIFO_TO_SM(PNX8XXX_UART_FIFO_RXFE) |
|
||||
FIFO_TO_SM(PNX8XXX_UART_FIFO_RXPAR);
|
||||
if (termios->c_iflag & IGNBRK) {
|
||||
sport->port.ignore_status_mask |=
|
||||
ISTAT_TO_SM(PNX8XXX_UART_INT_BREAK);
|
||||
/*
|
||||
* If we're ignoring parity and break indicators,
|
||||
* ignore overruns too (for real raw support).
|
||||
*/
|
||||
if (termios->c_iflag & IGNPAR)
|
||||
sport->port.ignore_status_mask |=
|
||||
ISTAT_TO_SM(PNX8XXX_UART_INT_RXOVRN);
|
||||
}
|
||||
|
||||
/*
|
||||
* ignore all characters if CREAD is not set
|
||||
*/
|
||||
if ((termios->c_cflag & CREAD) == 0)
|
||||
sport->port.ignore_status_mask |=
|
||||
ISTAT_TO_SM(PNX8XXX_UART_INT_RX);
|
||||
|
||||
del_timer_sync(&sport->timer);
|
||||
|
||||
/*
|
||||
* Update the per-port timeout.
|
||||
*/
|
||||
uart_update_timeout(port, termios->c_cflag, baud);
|
||||
|
||||
/*
|
||||
* disable interrupts and drain transmitter
|
||||
*/
|
||||
old_ien = serial_in(sport, PNX8XXX_IEN);
|
||||
serial_out(sport, PNX8XXX_IEN, old_ien & ~(PNX8XXX_UART_INT_ALLTX |
|
||||
PNX8XXX_UART_INT_ALLRX));
|
||||
|
||||
while (serial_in(sport, PNX8XXX_FIFO) & PNX8XXX_UART_FIFO_TXFIFO_STA)
|
||||
barrier();
|
||||
|
||||
/* then, disable everything */
|
||||
serial_out(sport, PNX8XXX_IEN, 0);
|
||||
|
||||
/* Reset the Rx and Tx FIFOs too */
|
||||
lcr_fcr |= PNX8XXX_UART_LCR_TX_RST;
|
||||
lcr_fcr |= PNX8XXX_UART_LCR_RX_RST;
|
||||
|
||||
/* set the parity, stop bits and data size */
|
||||
serial_out(sport, PNX8XXX_LCR, lcr_fcr);
|
||||
|
||||
/* set the baud rate */
|
||||
quot -= 1;
|
||||
serial_out(sport, PNX8XXX_BAUD, quot);
|
||||
|
||||
serial_out(sport, PNX8XXX_ICLR, -1);
|
||||
|
||||
serial_out(sport, PNX8XXX_IEN, old_ien);
|
||||
|
||||
if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
|
||||
pnx8xxx_enable_ms(&sport->port);
|
||||
|
||||
spin_unlock_irqrestore(&sport->port.lock, flags);
|
||||
}
|
||||
|
||||
static const char *pnx8xxx_type(struct uart_port *port)
|
||||
{
|
||||
struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
|
||||
|
||||
return sport->port.type == PORT_PNX8XXX ? "PNX8XXX" : NULL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Release the memory region(s) being used by 'port'.
|
||||
*/
|
||||
static void pnx8xxx_release_port(struct uart_port *port)
|
||||
{
|
||||
struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
|
||||
|
||||
release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
|
||||
}
|
||||
|
||||
/*
|
||||
* Request the memory region(s) being used by 'port'.
|
||||
*/
|
||||
static int pnx8xxx_request_port(struct uart_port *port)
|
||||
{
|
||||
struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
|
||||
return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
|
||||
"pnx8xxx-uart") != NULL ? 0 : -EBUSY;
|
||||
}
|
||||
|
||||
/*
|
||||
* Configure/autoconfigure the port.
|
||||
*/
|
||||
static void pnx8xxx_config_port(struct uart_port *port, int flags)
|
||||
{
|
||||
struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
|
||||
|
||||
if (flags & UART_CONFIG_TYPE &&
|
||||
pnx8xxx_request_port(&sport->port) == 0)
|
||||
sport->port.type = PORT_PNX8XXX;
|
||||
}
|
||||
|
||||
/*
|
||||
* Verify the new serial_struct (for TIOCSSERIAL).
|
||||
* The only change we allow are to the flags and type, and
|
||||
* even then only between PORT_PNX8XXX and PORT_UNKNOWN
|
||||
*/
|
||||
static int
|
||||
pnx8xxx_verify_port(struct uart_port *port, struct serial_struct *ser)
|
||||
{
|
||||
struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
|
||||
int ret = 0;
|
||||
|
||||
if (ser->type != PORT_UNKNOWN && ser->type != PORT_PNX8XXX)
|
||||
ret = -EINVAL;
|
||||
if (sport->port.irq != ser->irq)
|
||||
ret = -EINVAL;
|
||||
if (ser->io_type != SERIAL_IO_MEM)
|
||||
ret = -EINVAL;
|
||||
if (sport->port.uartclk / 16 != ser->baud_base)
|
||||
ret = -EINVAL;
|
||||
if ((void *)sport->port.mapbase != ser->iomem_base)
|
||||
ret = -EINVAL;
|
||||
if (sport->port.iobase != ser->port)
|
||||
ret = -EINVAL;
|
||||
if (ser->hub6 != 0)
|
||||
ret = -EINVAL;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static struct uart_ops pnx8xxx_pops = {
|
||||
.tx_empty = pnx8xxx_tx_empty,
|
||||
.set_mctrl = pnx8xxx_set_mctrl,
|
||||
.get_mctrl = pnx8xxx_get_mctrl,
|
||||
.stop_tx = pnx8xxx_stop_tx,
|
||||
.start_tx = pnx8xxx_start_tx,
|
||||
.stop_rx = pnx8xxx_stop_rx,
|
||||
.enable_ms = pnx8xxx_enable_ms,
|
||||
.break_ctl = pnx8xxx_break_ctl,
|
||||
.startup = pnx8xxx_startup,
|
||||
.shutdown = pnx8xxx_shutdown,
|
||||
.set_termios = pnx8xxx_set_termios,
|
||||
.type = pnx8xxx_type,
|
||||
.release_port = pnx8xxx_release_port,
|
||||
.request_port = pnx8xxx_request_port,
|
||||
.config_port = pnx8xxx_config_port,
|
||||
.verify_port = pnx8xxx_verify_port,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* Setup the PNX8XXX serial ports.
|
||||
*
|
||||
* Note also that we support "console=ttySx" where "x" is either 0 or 1.
|
||||
*/
|
||||
static void __init pnx8xxx_init_ports(void)
|
||||
{
|
||||
static int first = 1;
|
||||
int i;
|
||||
|
||||
if (!first)
|
||||
return;
|
||||
first = 0;
|
||||
|
||||
for (i = 0; i < NR_PORTS; i++) {
|
||||
init_timer(&pnx8xxx_ports[i].timer);
|
||||
pnx8xxx_ports[i].timer.function = pnx8xxx_timeout;
|
||||
pnx8xxx_ports[i].timer.data = (unsigned long)&pnx8xxx_ports[i];
|
||||
pnx8xxx_ports[i].port.ops = &pnx8xxx_pops;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SERIAL_PNX8XXX_CONSOLE
|
||||
|
||||
static void pnx8xxx_console_putchar(struct uart_port *port, int ch)
|
||||
{
|
||||
struct pnx8xxx_port *sport = (struct pnx8xxx_port *)port;
|
||||
int status;
|
||||
|
||||
do {
|
||||
/* Wait for UART_TX register to empty */
|
||||
status = serial_in(sport, PNX8XXX_FIFO);
|
||||
} while (status & PNX8XXX_UART_FIFO_TXFIFO);
|
||||
serial_out(sport, PNX8XXX_FIFO, ch);
|
||||
}
|
||||
|
||||
/*
|
||||
* Interrupts are disabled on entering
|
||||
*/static void
|
||||
pnx8xxx_console_write(struct console *co, const char *s, unsigned int count)
|
||||
{
|
||||
struct pnx8xxx_port *sport = &pnx8xxx_ports[co->index];
|
||||
unsigned int old_ien, status;
|
||||
|
||||
/*
|
||||
* First, save IEN and then disable interrupts
|
||||
*/
|
||||
old_ien = serial_in(sport, PNX8XXX_IEN);
|
||||
serial_out(sport, PNX8XXX_IEN, old_ien & ~(PNX8XXX_UART_INT_ALLTX |
|
||||
PNX8XXX_UART_INT_ALLRX));
|
||||
|
||||
uart_console_write(&sport->port, s, count, pnx8xxx_console_putchar);
|
||||
|
||||
/*
|
||||
* Finally, wait for transmitter to become empty
|
||||
* and restore IEN
|
||||
*/
|
||||
do {
|
||||
/* Wait for UART_TX register to empty */
|
||||
status = serial_in(sport, PNX8XXX_FIFO);
|
||||
} while (status & PNX8XXX_UART_FIFO_TXFIFO);
|
||||
|
||||
/* Clear TX and EMPTY interrupt */
|
||||
serial_out(sport, PNX8XXX_ICLR, PNX8XXX_UART_INT_TX |
|
||||
PNX8XXX_UART_INT_EMPTY);
|
||||
|
||||
serial_out(sport, PNX8XXX_IEN, old_ien);
|
||||
}
|
||||
|
||||
static int __init
|
||||
pnx8xxx_console_setup(struct console *co, char *options)
|
||||
{
|
||||
struct pnx8xxx_port *sport;
|
||||
int baud = 38400;
|
||||
int bits = 8;
|
||||
int parity = 'n';
|
||||
int flow = 'n';
|
||||
|
||||
/*
|
||||
* Check whether an invalid uart number has been specified, and
|
||||
* if so, search for the first available port that does have
|
||||
* console support.
|
||||
*/
|
||||
if (co->index == -1 || co->index >= NR_PORTS)
|
||||
co->index = 0;
|
||||
sport = &pnx8xxx_ports[co->index];
|
||||
|
||||
if (options)
|
||||
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
||||
|
||||
return uart_set_options(&sport->port, co, baud, parity, bits, flow);
|
||||
}
|
||||
|
||||
static struct uart_driver pnx8xxx_reg;
|
||||
static struct console pnx8xxx_console = {
|
||||
.name = "ttyS",
|
||||
.write = pnx8xxx_console_write,
|
||||
.device = uart_console_device,
|
||||
.setup = pnx8xxx_console_setup,
|
||||
.flags = CON_PRINTBUFFER,
|
||||
.index = -1,
|
||||
.data = &pnx8xxx_reg,
|
||||
};
|
||||
|
||||
static int __init pnx8xxx_rs_console_init(void)
|
||||
{
|
||||
pnx8xxx_init_ports();
|
||||
register_console(&pnx8xxx_console);
|
||||
return 0;
|
||||
}
|
||||
console_initcall(pnx8xxx_rs_console_init);
|
||||
|
||||
#define PNX8XXX_CONSOLE &pnx8xxx_console
|
||||
#else
|
||||
#define PNX8XXX_CONSOLE NULL
|
||||
#endif
|
||||
|
||||
static struct uart_driver pnx8xxx_reg = {
|
||||
.owner = THIS_MODULE,
|
||||
.driver_name = "ttyS",
|
||||
.dev_name = "ttyS",
|
||||
.major = SERIAL_PNX8XXX_MAJOR,
|
||||
.minor = MINOR_START,
|
||||
.nr = NR_PORTS,
|
||||
.cons = PNX8XXX_CONSOLE,
|
||||
};
|
||||
|
||||
static int pnx8xxx_serial_suspend(struct platform_device *pdev, pm_message_t state)
|
||||
{
|
||||
struct pnx8xxx_port *sport = platform_get_drvdata(pdev);
|
||||
|
||||
return uart_suspend_port(&pnx8xxx_reg, &sport->port);
|
||||
}
|
||||
|
||||
static int pnx8xxx_serial_resume(struct platform_device *pdev)
|
||||
{
|
||||
struct pnx8xxx_port *sport = platform_get_drvdata(pdev);
|
||||
|
||||
return uart_resume_port(&pnx8xxx_reg, &sport->port);
|
||||
}
|
||||
|
||||
static int pnx8xxx_serial_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *res = pdev->resource;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < pdev->num_resources; i++, res++) {
|
||||
if (!(res->flags & IORESOURCE_MEM))
|
||||
continue;
|
||||
|
||||
for (i = 0; i < NR_PORTS; i++) {
|
||||
if (pnx8xxx_ports[i].port.mapbase != res->start)
|
||||
continue;
|
||||
|
||||
pnx8xxx_ports[i].port.dev = &pdev->dev;
|
||||
uart_add_one_port(&pnx8xxx_reg, &pnx8xxx_ports[i].port);
|
||||
platform_set_drvdata(pdev, &pnx8xxx_ports[i]);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pnx8xxx_serial_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct pnx8xxx_port *sport = platform_get_drvdata(pdev);
|
||||
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
|
||||
if (sport)
|
||||
uart_remove_one_port(&pnx8xxx_reg, &sport->port);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver pnx8xxx_serial_driver = {
|
||||
.driver = {
|
||||
.name = "pnx8xxx-uart",
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
.probe = pnx8xxx_serial_probe,
|
||||
.remove = pnx8xxx_serial_remove,
|
||||
.suspend = pnx8xxx_serial_suspend,
|
||||
.resume = pnx8xxx_serial_resume,
|
||||
};
|
||||
|
||||
static int __init pnx8xxx_serial_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
printk(KERN_INFO "Serial: PNX8XXX driver $Revision: 1.2 $\n");
|
||||
|
||||
pnx8xxx_init_ports();
|
||||
|
||||
ret = uart_register_driver(&pnx8xxx_reg);
|
||||
if (ret == 0) {
|
||||
ret = platform_driver_register(&pnx8xxx_serial_driver);
|
||||
if (ret)
|
||||
uart_unregister_driver(&pnx8xxx_reg);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __exit pnx8xxx_serial_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&pnx8xxx_serial_driver);
|
||||
uart_unregister_driver(&pnx8xxx_reg);
|
||||
}
|
||||
|
||||
module_init(pnx8xxx_serial_init);
|
||||
module_exit(pnx8xxx_serial_exit);
|
||||
|
||||
MODULE_AUTHOR("Embedded Alley Solutions, Inc.");
|
||||
MODULE_DESCRIPTION("PNX8XXX SoCs serial port driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_PNX8XXX_MAJOR);
|
||||
Loading…
Reference in a new issue