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[ARM] 4830/1: Add support for the CLK_POUT pin on PXA3xx CPUs

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Expose control of the PXA3xx 13MHz CLK_POUT pin via the clock API

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Mark Brown 2008-02-13 16:39:21 +01:00 committed by Russell King
parent 184dd48102
commit dcc88a170c
2 changed files with 31 additions and 0 deletions
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22
arch/arm/mach-pxa/pxa3xx.c
View file

@ -156,6 +156,21 @@ static const struct clkops clk_pxa3xx_hsio_ops = {
.getrate = clk_pxa3xx_hsio_getrate, .getrate = clk_pxa3xx_hsio_getrate,
}; };
static void clk_pout_enable(struct clk *clk)
{
OSCC |= OSCC_PEN;
}
static void clk_pout_disable(struct clk *clk)
{
OSCC &= ~OSCC_PEN;
}
static const struct clkops clk_pout_ops = {
.enable = clk_pout_enable,
.disable = clk_pout_disable,
};
#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev) \ #define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev) \
{ \ { \
.name = _name, \ .name = _name, \
@ -175,6 +190,13 @@ static const struct clkops clk_pxa3xx_hsio_ops = {
} }
static struct clk pxa3xx_clks[] = { static struct clk pxa3xx_clks[] = {
{
.name = "CLK_POUT",
.ops = &clk_pout_ops,
.rate = 13000000,
.delay = 70,
},
PXA3xx_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev), PXA3xx_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev),
PXA3xx_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops, NULL), PXA3xx_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops, NULL),

9
include/asm-arm/arch-pxa/pxa3xx-regs.h
View file

@ -12,6 +12,15 @@
#ifndef __ASM_ARCH_PXA3XX_REGS_H #ifndef __ASM_ARCH_PXA3XX_REGS_H
#define __ASM_ARCH_PXA3XX_REGS_H #define __ASM_ARCH_PXA3XX_REGS_H
/*
* Oscillator Configuration Register (OSCC)
*/
#define OSCC __REG(0x41350000) /* Oscillator Configuration Register */
#define OSCC_PEN (1 << 11) /* 13MHz POUT */
/* /*
* Service Power Management Unit (MPMU) * Service Power Management Unit (MPMU)
*/ */