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Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, mce: Don't initialize MCEs on unknown CPUs x86, mce: don't log boot MCEs on Pentium M (model == 13) CPUs x86: Annotate section mismatch warnings in kernel/apic/x2apic_uv_x.c x86, mce: therm_throt: Don't log redundant normality x86: Fix UV BAU destination subnode id
This commit is contained in:
commit
dc8ed71eeb
5 changed files with 25 additions and 8 deletions
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@ -133,7 +133,7 @@ struct bau_msg_payload {
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* see table 4.2.3.0.1 in broacast_assist spec.
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*/
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struct bau_msg_header {
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unsigned int dest_subnodeid:6; /* must be zero */
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unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */
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/* bits 5:0 */
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unsigned int base_dest_nodeid:15; /* nasid>>1 (pnode) of */
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/* bits 20:6 */ /* first bit in node_map */
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@ -46,7 +46,7 @@ static int early_get_nodeid(void)
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return node_id.s.node_id;
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}
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static int uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
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static int __init uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
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{
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if (!strcmp(oem_id, "SGI")) {
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if (!strcmp(oem_table_id, "UVL"))
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@ -253,7 +253,7 @@ static void uv_send_IPI_self(int vector)
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apic_write(APIC_SELF_IPI, vector);
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}
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struct apic apic_x2apic_uv_x = {
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struct apic __refdata apic_x2apic_uv_x = {
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.name = "UV large system",
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.probe = NULL,
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@ -1226,8 +1226,13 @@ static void mce_init(void)
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}
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/* Add per CPU specific workarounds here */
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static void mce_cpu_quirks(struct cpuinfo_x86 *c)
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static int mce_cpu_quirks(struct cpuinfo_x86 *c)
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{
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if (c->x86_vendor == X86_VENDOR_UNKNOWN) {
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pr_info("MCE: unknown CPU type - not enabling MCE support.\n");
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return -EOPNOTSUPP;
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}
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/* This should be disabled by the BIOS, but isn't always */
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if (c->x86_vendor == X86_VENDOR_AMD) {
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if (c->x86 == 15 && banks > 4) {
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@ -1273,11 +1278,20 @@ static void mce_cpu_quirks(struct cpuinfo_x86 *c)
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if ((c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xe)) &&
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monarch_timeout < 0)
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monarch_timeout = USEC_PER_SEC;
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/*
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* There are also broken BIOSes on some Pentium M and
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* earlier systems:
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*/
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if (c->x86 == 6 && c->x86_model <= 13 && mce_bootlog < 0)
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mce_bootlog = 0;
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}
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if (monarch_timeout < 0)
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monarch_timeout = 0;
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if (mce_bootlog != 0)
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mce_panic_timeout = 30;
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return 0;
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}
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static void __cpuinit mce_ancient_init(struct cpuinfo_x86 *c)
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@ -1338,11 +1352,10 @@ void __cpuinit mcheck_init(struct cpuinfo_x86 *c)
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if (!mce_available(c))
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return;
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if (mce_cap_init() < 0) {
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if (mce_cap_init() < 0 || mce_cpu_quirks(c) < 0) {
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mce_disabled = 1;
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return;
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}
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mce_cpu_quirks(c);
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machine_check_vector = do_machine_check;
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@ -116,11 +116,14 @@ static int therm_throt_process(int curr)
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cpu, __get_cpu_var(thermal_throttle_count));
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add_taint(TAINT_MACHINE_CHECK);
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} else if (was_throttled) {
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return 1;
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}
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if (was_throttled) {
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printk(KERN_INFO "CPU%d: Temperature/speed normal\n", cpu);
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return 1;
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}
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return 1;
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return 0;
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}
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#ifdef CONFIG_SYSFS
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@ -744,6 +744,7 @@ uv_activation_descriptor_init(int node, int pnode)
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* note that base_dest_nodeid is actually a nasid.
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*/
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ad2->header.base_dest_nodeid = uv_partition_base_pnode << 1;
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ad2->header.dest_subnodeid = 0x10; /* the LB */
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ad2->header.command = UV_NET_ENDPOINT_INTD;
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ad2->header.int_both = 1;
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/*
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