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[POWERPC] Merge ppc32 and ppc64 pcibios_alloc_controller() prototypes
Make the ppc32 pcibios_alloc_controller take a device node to match the ppc64 prototypes and have it set arch_data. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
parent
5516b540e9
commit
dbf8471f52
13 changed files with 16 additions and 35 deletions
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@ -610,7 +610,7 @@ pcibios_enable_resources(struct pci_dev *dev, int mask)
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static int next_controller_index;
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struct pci_controller * __init
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pcibios_alloc_controller(void)
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pcibios_alloc_controller(struct device_node *dev)
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{
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struct pci_controller *hose;
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@ -621,6 +621,7 @@ pcibios_alloc_controller(void)
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hose_tail = &hose->next;
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hose->global_number = next_controller_index++;
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hose->arch_data = dev;
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return hose;
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}
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@ -128,7 +128,7 @@ void __init efika_pcisetup(void)
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printk(" controlled by %s\n", pcictrl->full_name);
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printk("\n");
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hose = pcibios_alloc_controller();
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hose = pcibios_alloc_controller(of_node_get(pcictrl));
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if (!hose) {
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printk(KERN_WARNING EFIKA_PLATFORM_NAME
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": Can't allocate PCI controller structure for %s\n",
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@ -136,7 +136,6 @@ void __init efika_pcisetup(void)
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return;
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}
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hose->arch_data = of_node_get(pcictrl);
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hose->first_busno = bus_range[0];
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hose->last_busno = bus_range[1];
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hose->ops = &rtas_pci_ops;
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@ -385,12 +385,10 @@ mpc52xx_add_bridge(struct device_node *node)
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* tree are needed to configure the 52xx PCI controller. Rather
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* than parse the tree here, let pci_process_bridge_OF_ranges()
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* do it for us and extract the values after the fact */
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hose = pcibios_alloc_controller();
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hose = pcibios_alloc_controller(node);
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if (!hose)
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return -ENOMEM;
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hose->arch_data = node;
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hose->first_busno = bus_range ? bus_range[0] : 0;
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hose->last_busno = bus_range ? bus_range[1] : 0xff;
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@ -543,13 +543,11 @@ static void __init mpc82xx_add_bridge(struct device_node *np)
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pci_assign_all_buses = 1;
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hose = pcibios_alloc_controller();
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hose = pcibios_alloc_controller(np);
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if (!hose)
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return;
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hose->arch_data = np;
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hose->first_busno = bus_range ? bus_range[0] : 0;
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hose->last_busno = bus_range ? bus_range[1] : 0xff;
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@ -62,10 +62,9 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
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}
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pci_assign_all_buses = 1;
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hose = pcibios_alloc_controller();
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hose = pcibios_alloc_controller(dev);
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if (!hose)
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return -ENOMEM;
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hose->arch_data = dev;
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hose->first_busno = bus_range ? bus_range[0] : 0;
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hose->last_busno = bus_range ? bus_range[1] : 0xff;
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@ -56,10 +56,9 @@ int __init mpc85xx_add_bridge(struct device_node *dev)
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}
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pci_assign_all_buses = 1;
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hose = pcibios_alloc_controller();
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hose = pcibios_alloc_controller(dev);
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if (!hose)
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return -ENOMEM;
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hose->arch_data = dev;
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hose->first_busno = bus_range ? bus_range[0] : 0;
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hose->last_busno = bus_range ? bus_range[1] : 0xff;
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@ -196,10 +196,10 @@ int __init mpc86xx_add_bridge(struct device_node *dev)
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" bus 0\n", dev->full_name);
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pci_assign_all_buses = 1;
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hose = pcibios_alloc_controller();
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hose = pcibios_alloc_controller(dev);
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if (!hose)
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return -ENOMEM;
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hose->arch_data = dev;
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hose->indirect_type = PPC_INDIRECT_TYPE_EXT_REG |
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PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS;
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@ -254,13 +254,12 @@ chrp_find_bridges(void)
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printk(" at %llx", (unsigned long long)r.start);
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printk("\n");
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hose = pcibios_alloc_controller();
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hose = pcibios_alloc_controller(dev);
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if (!hose) {
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printk("Can't allocate PCI controller structure for %s\n",
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dev->full_name);
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continue;
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}
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hose->arch_data = dev;
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hose->first_busno = bus_range[0];
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hose->last_busno = bus_range[1];
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@ -68,12 +68,11 @@ static int __init linkstation_add_bridge(struct device_node *dev)
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printk(KERN_WARNING "Can't get bus-range for %s, assume"
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" bus 0\n", dev->full_name);
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hose = pcibios_alloc_controller();
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hose = pcibios_alloc_controller(dev);
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if (hose == NULL)
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return -ENOMEM;
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hose->first_busno = bus_range ? bus_range[0] : 0;
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hose->last_busno = bus_range ? bus_range[1] : 0xff;
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hose->arch_data = dev;
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setup_indirect_pci(hose, 0xfec00000, 0xfee00000);
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/* Interpret the "ranges" property */
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@ -916,15 +916,9 @@ static int __init pmac_add_bridge(struct device_node *dev)
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" bus 0\n", dev->full_name);
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}
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/* XXX Different prototypes, to be merged */
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#ifdef CONFIG_PPC64
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hose = pcibios_alloc_controller(dev);
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#else
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hose = pcibios_alloc_controller();
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#endif
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if (!hose)
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return -ENOMEM;
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hose->arch_data = dev;
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hose->first_busno = bus_range ? bus_range[0] : 0;
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hose->last_busno = bus_range ? bus_range[1] : 0xff;
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@ -137,12 +137,10 @@ static int __init mv64x60_add_bridge(struct device_node *dev)
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printk(KERN_WARNING "Can't get bus-range for %s, assume"
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" bus 0\n", dev->full_name);
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hose = pcibios_alloc_controller();
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hose = pcibios_alloc_controller(dev);
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if (!hose)
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return -ENOMEM;
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hose->arch_data = dev;
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hose->first_busno = bus_range ? bus_range[0] : 0;
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hose->last_busno = bus_range ? bus_range[1] : 0xff;
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@ -221,13 +221,12 @@ int __init tsi108_setup_pci(struct device_node *dev, u32 cfg_phys, int primary)
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" bus 0\n", dev->full_name);
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}
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hose = pcibios_alloc_controller();
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hose = pcibios_alloc_controller(dev);
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if (!hose) {
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printk("PCI Host bridge init failed\n");
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return -ENOMEM;
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}
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hose->arch_data = dev;
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hose->first_busno = bus_range ? bus_range[0] : 0;
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hose->last_busno = bus_range ? bus_range[1] : 0xff;
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@ -9,9 +9,6 @@
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struct device_node;
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struct pci_controller;
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/* Allocate a new PCI host bridge structure */
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extern struct pci_controller* pcibios_alloc_controller(void);
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/* Get the PCI host controller for a bus */
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extern struct pci_controller* pci_bus_to_hose(int bus);
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@ -232,8 +229,6 @@ static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
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return PCI_DN(busdn)->phb;
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}
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extern struct pci_controller *
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pcibios_alloc_controller(struct device_node *dev);
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extern void pcibios_free_controller(struct pci_controller *phb);
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extern void isa_bridge_find_early(struct pci_controller *hose);
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@ -263,6 +258,9 @@ extern void
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pci_process_bridge_OF_ranges(struct pci_controller *hose,
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struct device_node *dev, int primary);
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/* Allocate a new PCI host bridge structure */
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extern struct pci_controller *
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pcibios_alloc_controller(struct device_node *dev);
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#ifdef CONFIG_PCI
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extern unsigned long pci_address_to_pio(phys_addr_t address);
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#else
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