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Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm

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* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (103 commits)
  ARM: 5719/1: [AT91] Fix AC97 breakage
  ARM: 5721/1: MMCI enable the use of a regulator
  ARM: 5720/1: Move MMCI header to amba include dir
  ARM: 5718/1: Sane busids for RealView board components
  ARM: 5715/1: Make kprobes unregistration SMP safe
  ARM: 5711/1: locomo.c: CodingStyle cleanups
  ARM: 5710/1: at91: add AC97 support to at91sam9rl and at91sam9rlek board
  ARM: 5709/1: at91: add AC97 support to at91sam9g45 series and at91sam9m10g45ek board
  ARM: 5621/1: at91/dmaengine: integration of at_hdmac driver in at91sam9g45 series
  ARM: 5620/1: at91/dmaengine: integration of at_hdmac driver in at91sam9rl
  ARM: Add support for checking access permissions on prefetch aborts
  ARM: Separate out access error checking
  ARM: Ensure correct might_sleep() check in pagefault path
  ARM: Update page fault handling for new OOM techniques
  ARM: Provide definitions and helpers for decoding the FSR register
  ARM: 5712/1: SA1100: initialise spinlock in DMA code
  ARM: s3c: fix check of index into s3c_gpios[]
  ARM: spitz: fix touchscreen max presure
  ARM: STMP3xxx: deallocation with negative index of descriptors[]
  Thumb-2: Correctly handle undefined instructions in the kernel
  ...
This commit is contained in:
Linus Torvalds 2009-09-24 17:06:51 -07:00
commit d9fbd9a2cd
153 changed files with 7847 additions and 3759 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

145
Documentation/arm/tcm.txt Normal file
View file

@ -0,0 +1,145 @@
ARM TCM (Tightly-Coupled Memory) handling in Linux
----
Written by Linus Walleij <linus.walleij@stericsson.com>
Some ARM SoC:s have a so-called TCM (Tightly-Coupled Memory).
This is usually just a few (4-64) KiB of RAM inside the ARM
processor.
Due to being embedded inside the CPU The TCM has a
Harvard-architecture, so there is an ITCM (instruction TCM)
and a DTCM (data TCM). The DTCM can not contain any
instructions, but the ITCM can actually contain data.
The size of DTCM or ITCM is minimum 4KiB so the typical
minimum configuration is 4KiB ITCM and 4KiB DTCM.
ARM CPU:s have special registers to read out status, physical
location and size of TCM memories. arch/arm/include/asm/cputype.h
defines a CPUID_TCM register that you can read out from the
system control coprocessor. Documentation from ARM can be found
at http://infocenter.arm.com, search for "TCM Status Register"
to see documents for all CPUs. Reading this register you can
determine if ITCM (bit 0) and/or DTCM (bit 16) is present in the
machine.
There is further a TCM region register (search for "TCM Region
Registers" at the ARM site) that can report and modify the location
size of TCM memories at runtime. This is used to read out and modify
TCM location and size. Notice that this is not a MMU table: you
actually move the physical location of the TCM around. At the
place you put it, it will mask any underlying RAM from the
CPU so it is usually wise not to overlap any physical RAM with
the TCM. The TCM memory exists totally outside the MMU and will
override any MMU mappings.
Code executing inside the ITCM does not "see" any MMU mappings
and e.g. register accesses must be made to physical addresses.
TCM is used for a few things:
- FIQ and other interrupt handlers that need deterministic
timing and cannot wait for cache misses.
- Idle loops where all external RAM is set to self-refresh
retention mode, so only on-chip RAM is accessible by
the CPU and then we hang inside ITCM waiting for an
interrupt.
- Other operations which implies shutting off or reconfiguring
the external RAM controller.
There is an interface for using TCM on the ARM architecture
in <asm/tcm.h>. Using this interface it is possible to:
- Define the physical address and size of ITCM and DTCM.
- Tag functions to be compiled into ITCM.
- Tag data and constants to be allocated to DTCM and ITCM.
- Have the remaining TCM RAM added to a special
allocation pool with gen_pool_create() and gen_pool_add()
and provice tcm_alloc() and tcm_free() for this
memory. Such a heap is great for things like saving
device state when shutting off device power domains.
A machine that has TCM memory shall select HAVE_TCM in
arch/arm/Kconfig for itself, and then the
rest of the functionality will depend on the physical
location and size of ITCM and DTCM to be defined in
mach/memory.h for the machine. Code that needs to use
TCM shall #include <asm/tcm.h> If the TCM is not located
at the place given in memory.h it will be moved using
the TCM Region registers.
Functions to go into itcm can be tagged like this:
int __tcmfunc foo(int bar);
Variables to go into dtcm can be tagged like this:
int __tcmdata foo;
Constants can be tagged like this:
int __tcmconst foo;
To put assembler into TCM just use
.section ".tcm.text" or .section ".tcm.data"
respectively.
Example code:
#include <asm/tcm.h>
/* Uninitialized data */
static u32 __tcmdata tcmvar;
/* Initialized data */
static u32 __tcmdata tcmassigned = 0x2BADBABEU;
/* Constant */
static const u32 __tcmconst tcmconst = 0xCAFEBABEU;
static void __tcmlocalfunc tcm_to_tcm(void)
{
int i;
for (i = 0; i < 100; i++)
tcmvar ++;
}
static void __tcmfunc hello_tcm(void)
{
/* Some abstract code that runs in ITCM */
int i;
for (i = 0; i < 100; i++) {
tcmvar ++;
}
tcm_to_tcm();
}
static void __init test_tcm(void)
{
u32 *tcmem;
int i;
hello_tcm();
printk("Hello TCM executed from ITCM RAM\n");
printk("TCM variable from testrun: %u @ %p\n", tcmvar, &tcmvar);
tcmvar = 0xDEADBEEFU;
printk("TCM variable: 0x%x @ %p\n", tcmvar, &tcmvar);
printk("TCM assigned variable: 0x%x @ %p\n", tcmassigned, &tcmassigned);
printk("TCM constant: 0x%x @ %p\n", tcmconst, &tcmconst);
/* Allocate some TCM memory from the pool */
tcmem = tcm_alloc(20);
if (tcmem) {
printk("TCM Allocated 20 bytes of TCM @ %p\n", tcmem);
tcmem[0] = 0xDEADBEEFU;
tcmem[1] = 0x2BADBABEU;
tcmem[2] = 0xCAFEBABEU;
tcmem[3] = 0xDEADBEEFU;
tcmem[4] = 0x2BADBABEU;
for (i = 0; i < 5; i++)
printk("TCM tcmem[%d] = %08x\n", i, tcmem[i]);
tcm_free(tcmem, 20);
}
}

10
MAINTAINERS
View file

@ -683,7 +683,7 @@ S: Maintained
ARM/INTEL IXP4XX ARM ARCHITECTURE
M: Imre Kaloz <kaloz@openwrt.org>
M: Krzysztof Halasa <khc@pm.waw.pl>
L: linux-arm-kernel@lists.infradead.org
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-ixp4xx/
@ -740,18 +740,22 @@ M: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
M: Dirk Opfer <dirk@opfer-online.de>
S: Maintained
ARM/PALMTX,PALMT5,PALMLD,PALMTE2 SUPPORT
M: Marek Vasut <marek.vasut@gmail.com>
ARM/PALMTX,PALMT5,PALMLD,PALMTE2,PALMTC SUPPORT
P: Marek Vasut
M: marek.vasut@gmail.com
L: linux-arm-kernel@lists.infradead.org
W: http://hackndev.com
S: Maintained
ARM/PALM TREO 680 SUPPORT
M: Tomas Cech <sleep_walker@suse.cz>
L: linux-arm-kernel@lists.infradead.org
W: http://hackndev.com
S: Maintained
ARM/PALMZ72 SUPPORT
M: Sergey Lapin <slapin@ossfans.org>
L: linux-arm-kernel@lists.infradead.org
W: http://hackndev.com
S: Maintained

5
arch/arm/Kconfig
View file

@ -46,6 +46,10 @@ config GENERIC_CLOCKEVENTS_BROADCAST
depends on GENERIC_CLOCKEVENTS
default y if SMP && !LOCAL_TIMERS
config HAVE_TCM
bool
select GENERIC_ALLOCATOR
config NO_IOPORT
bool
@ -649,6 +653,7 @@ config ARCH_U300
bool "ST-Ericsson U300 Series"
depends on MMU
select CPU_ARM926T
select HAVE_TCM
select ARM_AMBA
select ARM_VIC
select GENERIC_TIME

17
arch/arm/common/locomo.c
View file

@ -865,6 +865,7 @@ void locomo_gpio_set_dir(struct device *dev, unsigned int bits, unsigned int dir
spin_unlock_irqrestore(&lchip->lock, flags);
}
EXPORT_SYMBOL(locomo_gpio_set_dir);
int locomo_gpio_read_level(struct device *dev, unsigned int bits)
{
@ -882,6 +883,7 @@ int locomo_gpio_read_level(struct device *dev, unsigned int bits)
ret &= bits;
return ret;
}
EXPORT_SYMBOL(locomo_gpio_read_level);
int locomo_gpio_read_output(struct device *dev, unsigned int bits)
{
@ -899,6 +901,7 @@ int locomo_gpio_read_output(struct device *dev, unsigned int bits)
ret &= bits;
return ret;
}
EXPORT_SYMBOL(locomo_gpio_read_output);
void locomo_gpio_write(struct device *dev, unsigned int bits, unsigned int set)
{
@ -920,6 +923,7 @@ void locomo_gpio_write(struct device *dev, unsigned int bits, unsigned int set)
spin_unlock_irqrestore(&lchip->lock, flags);
}
EXPORT_SYMBOL(locomo_gpio_write);
static void locomo_m62332_sendbit(void *mapbase, int bit)
{
@ -1084,13 +1088,12 @@ void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int
spin_unlock_irqrestore(&lchip->lock, flags);
}
EXPORT_SYMBOL(locomo_m62332_senddata);
/*
* Frontlight control
*/
static struct locomo *locomo_chip_driver(struct locomo_dev *ldev);
void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf)
{
unsigned long flags;
@ -1182,11 +1185,13 @@ int locomo_driver_register(struct locomo_driver *driver)
driver->drv.bus = &locomo_bus_type;
return driver_register(&driver->drv);
}
EXPORT_SYMBOL(locomo_driver_register);
void locomo_driver_unregister(struct locomo_driver *driver)
{
driver_unregister(&driver->drv);
}
EXPORT_SYMBOL(locomo_driver_unregister);
static int __init locomo_init(void)
{
@ -1208,11 +1213,3 @@ module_exit(locomo_exit);
MODULE_DESCRIPTION("Sharp LoCoMo core driver");
MODULE_LICENSE("GPL");
MODULE_AUTHOR("John Lenz <lenz@cs.wisc.edu>");
EXPORT_SYMBOL(locomo_driver_register);
EXPORT_SYMBOL(locomo_driver_unregister);
EXPORT_SYMBOL(locomo_gpio_set_dir);
EXPORT_SYMBOL(locomo_gpio_read_level);
EXPORT_SYMBOL(locomo_gpio_read_output);
EXPORT_SYMBOL(locomo_gpio_write);
EXPORT_SYMBOL(locomo_m62332_senddata);

1
arch/arm/common/vic.c
View file

@ -22,6 +22,7 @@
#include <linux/list.h>
#include <linux/io.h>
#include <linux/sysdev.h>
#include <linux/device.h>
#include <linux/amba/bus.h>
#include <asm/mach/irq.h>

783
arch/arm/configs/littleton_defconfig
View file

@ -1,783 +0,0 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.24-rc5
# Fri Dec 21 11:06:19 2007
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_MMU=y
# CONFIG_NO_IOPORT is not set
CONFIG_GENERIC_HARDIRQS=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_ZONE_DMA=y
CONFIG_ARCH_MTD_XIP=y
CONFIG_VECTORS_BASE=0xffff0000
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
#
# General setup
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_LOCK_KERNEL=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CGROUPS is not set
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_FAIR_USER_SCHED=y
# CONFIG_FAIR_CGROUP_SCHED is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
# CONFIG_EMBEDDED is not set
CONFIG_UID16=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_KMOD is not set
CONFIG_BLOCK=y
# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set
# CONFIG_BLK_DEV_BSG is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_DEFAULT_AS is not set
# CONFIG_DEFAULT_DEADLINE is not set
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="cfq"
#
# System Type
#
# CONFIG_ARCH_AAEC2000 is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_AT91 is not set
# CONFIG_ARCH_CLPS7500 is not set
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_EP93XX is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_NETX is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_IOP13XX is not set
# CONFIG_ARCH_IOP32X is not set
# CONFIG_ARCH_IOP33X is not set
# CONFIG_ARCH_IXP23XX is not set
# CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_L7200 is not set
# CONFIG_ARCH_KS8695 is not set
# CONFIG_ARCH_NS9XXX is not set
# CONFIG_ARCH_MXC is not set
# CONFIG_ARCH_PNX4008 is not set
CONFIG_ARCH_PXA=y
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_LH7A40X is not set
# CONFIG_ARCH_DAVINCI is not set
# CONFIG_ARCH_OMAP is not set
#
# Intel PXA2xx/PXA3xx Implementations
#
#
# Supported PXA3xx Processor Variants
#
CONFIG_CPU_PXA300=y
CONFIG_CPU_PXA310=y
# CONFIG_CPU_PXA320 is not set
# CONFIG_ARCH_LUBBOCK is not set
# CONFIG_MACH_LOGICPD_PXA270 is not set
# CONFIG_MACH_MAINSTONE is not set
# CONFIG_ARCH_PXA_IDP is not set
# CONFIG_PXA_SHARPSL is not set
# CONFIG_MACH_TRIZEPS4 is not set
# CONFIG_MACH_EM_X270 is not set
# CONFIG_MACH_ZYLONITE is not set
CONFIG_MACH_LITTLETON=y
# CONFIG_MACH_ARMCORE is not set
CONFIG_PXA3xx=y
CONFIG_PXA_SSP=y
#
# Boot options
#
#
# Power management
#
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSC3=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_TLB_V4WBI=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
CONFIG_IO_36=y
#
# Processor Features
#
# CONFIG_ARM_THUMB is not set
# CONFIG_CPU_DCACHE_DISABLE is not set
# CONFIG_CPU_BPREDICT_DISABLE is not set
# CONFIG_OUTER_CACHE is not set
CONFIG_IWMMXT=y
#
# Bus support
#
# CONFIG_PCI_SYSCALL is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
# CONFIG_PCCARD is not set
#
# Kernel Features
#
CONFIG_TICK_ONESHOT=y
# CONFIG_NO_HZ is not set
# CONFIG_HIGH_RES_TIMERS is not set
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_PREEMPT=y
CONFIG_HZ=100
CONFIG_AEABI=y
CONFIG_OABI_COMPAT=y
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
CONFIG_SPLIT_PTLOCK_CPUS=4096
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_BOUNCE=y
CONFIG_VIRT_TO_BUS=y
CONFIG_ALIGNMENT_TRAP=y
#
# Boot options
#
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on console=ttyS2,38400 mem=64M"
# CONFIG_XIP_KERNEL is not set
# CONFIG_KEXEC is not set
#
# CPU Frequency scaling
#
# CONFIG_CPU_FREQ is not set
#
# Floating point emulation
#
#
# At least one emulation must be selected
#
CONFIG_FPE_NWFPE=y
# CONFIG_FPE_NWFPE_XP is not set
# CONFIG_FPE_FASTFPE is not set
#
# Userspace binary formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_AOUT is not set
# CONFIG_BINFMT_MISC is not set
#
# Power management options
#
# CONFIG_PM is not set
CONFIG_SUSPEND_UP_POSSIBLE=y
#
# Networking
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_UNIX=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y
CONFIG_INET_XFRM_MODE_BEET=y
# CONFIG_INET_LRO is not set
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
# CONFIG_IP_SCTP is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
#
# Wireless
#
# CONFIG_CFG80211 is not set
# CONFIG_WIRELESS_EXT is not set
# CONFIG_MAC80211 is not set
# CONFIG_IEEE80211 is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
CONFIG_FW_LOADER=y
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_CONNECTOR is not set
# CONFIG_MTD is not set
# CONFIG_PARPORT is not set
# CONFIG_BLK_DEV is not set
# CONFIG_MISC_DEVICES is not set
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
# CONFIG_SCSI_DMA is not set
# CONFIG_SCSI_NETLINK is not set
# CONFIG_ATA is not set
# CONFIG_MD is not set
CONFIG_NETDEVICES=y
# CONFIG_NETDEVICES_MULTIQUEUE is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_VETH is not set
# CONFIG_PHYLIB is not set
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_AX88796 is not set
CONFIG_SMC91X=y
# CONFIG_DM9000 is not set
# CONFIG_SMC911X is not set
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_B44 is not set
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
#
# Wireless LAN
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_ISDN is not set
#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
# CONFIG_INPUT_POLLDEV is not set
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_NVRAM is not set
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
# CONFIG_I2C is not set
#
# SPI support
#
# CONFIG_SPI is not set
# CONFIG_SPI_MASTER is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
# CONFIG_WATCHDOG is not set
#
# Sonics Silicon Backplane
#
CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
# CONFIG_DAB is not set
#
# Graphics support
#
# CONFIG_VGASTATE is not set
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
CONFIG_FB=y
# CONFIG_FIRMWARE_EDID is not set
# CONFIG_FB_DDC is not set
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
# CONFIG_FB_SYS_FILLRECT is not set
# CONFIG_FB_SYS_COPYAREA is not set
# CONFIG_FB_SYS_IMAGEBLIT is not set
# CONFIG_FB_SYS_FOPS is not set
CONFIG_FB_DEFERRED_IO=y
# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
#
# Frame buffer hardware drivers
#
# CONFIG_FB_S1D13XXX is not set
CONFIG_FB_PXA=y
# CONFIG_FB_PXA_PARAMETERS is not set
# CONFIG_FB_MBX is not set
# CONFIG_FB_VIRTUAL is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Display device support
#
# CONFIG_DISPLAY_SUPPORT is not set
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
CONFIG_FONTS=y
# CONFIG_FONT_8x8 is not set
CONFIG_FONT_8x16=y
# CONFIG_FONT_6x11 is not set
# CONFIG_FONT_7x14 is not set
# CONFIG_FONT_PEARL_8x8 is not set
# CONFIG_FONT_ACORN_8x8 is not set
# CONFIG_FONT_MINI_4x6 is not set
# CONFIG_FONT_SUN8x16 is not set
# CONFIG_FONT_SUN12x22 is not set
# CONFIG_FONT_10x18 is not set
CONFIG_LOGO=y
CONFIG_LOGO_LINUX_MONO=y
CONFIG_LOGO_LINUX_VGA16=y
CONFIG_LOGO_LINUX_CLUT224=y
#
# Sound
#
# CONFIG_SOUND is not set
# CONFIG_HID_SUPPORT is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_MMC is not set
# CONFIG_NEW_LEDS is not set
CONFIG_RTC_LIB=y
# CONFIG_RTC_CLASS is not set
#
# File systems
#
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_INOTIFY is not set
# CONFIG_QUOTA is not set
# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_SYSCTL=y
CONFIG_SYSFS=y
# CONFIG_TMPFS is not set
# CONFIG_HUGETLB_PAGE is not set
# CONFIG_CONFIGFS_FS is not set
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_NFS_DIRECTIO=y
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_NFS_ACL_SUPPORT=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
# CONFIG_SUNRPC_BIND34 is not set
CONFIG_RPCSEC_GSS_KRB5=y
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_NLS is not set
# CONFIG_DLM is not set
# CONFIG_INSTRUMENTATION is not set
#
# Kernel hacking
#
CONFIG_PRINTK_TIME=y
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_SHIRQ is not set
CONFIG_DETECT_SOFTLOCKUP=y
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_PREEMPT is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_LOCK_ALLOC is not set
# CONFIG_PROVE_LOCKING is not set
# CONFIG_LOCK_STAT is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
CONFIG_FRAME_POINTER=y
CONFIG_FORCED_INLINING=y
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_SAMPLES is not set
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_CRYPTO=y
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_MANAGER=y
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_XCBC is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=y
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_GF128MUL is not set
# CONFIG_CRYPTO_ECB is not set
CONFIG_CRYPTO_CBC=y
# CONFIG_CRYPTO_PCBC is not set
# CONFIG_CRYPTO_LRW is not set
# CONFIG_CRYPTO_XTS is not set
# CONFIG_CRYPTO_CRYPTD is not set
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_TEST is not set
# CONFIG_CRYPTO_AUTHENC is not set
CONFIG_CRYPTO_HW=y
#
# Library routines
#
CONFIG_BITREVERSE=y
CONFIG_CRC_CCITT=y
# CONFIG_CRC16 is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y

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arch/arm/configs/zylonite_defconfig
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@ -1,736 +0,0 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.23
# Tue Oct 23 13:33:20 2007
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_MMU=y
# CONFIG_NO_IOPORT is not set
CONFIG_GENERIC_HARDIRQS=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_ZONE_DMA=y
CONFIG_ARCH_MTD_XIP=y
CONFIG_VECTORS_BASE=0xffff0000
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
#
# General setup
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_USER_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=18
# CONFIG_CGROUPS is not set
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_FAIR_USER_SCHED=y
# CONFIG_FAIR_CGROUP_SCHED is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
# CONFIG_EMBEDDED is not set
CONFIG_UID16=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLUB_DEBUG=y
# CONFIG_SLAB is not set
CONFIG_SLUB=y
# CONFIG_SLOB is not set
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_KMOD is not set
CONFIG_BLOCK=y
# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set
# CONFIG_BLK_DEV_BSG is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_DEFAULT_AS is not set
# CONFIG_DEFAULT_DEADLINE is not set
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="cfq"
#
# System Type
#
# CONFIG_ARCH_AAEC2000 is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_AT91 is not set
# CONFIG_ARCH_CLPS7500 is not set
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_EP93XX is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_NETX is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_IOP13XX is not set
# CONFIG_ARCH_IOP32X is not set
# CONFIG_ARCH_IOP33X is not set
# CONFIG_ARCH_IXP23XX is not set
# CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_L7200 is not set
# CONFIG_ARCH_KS8695 is not set
# CONFIG_ARCH_NS9XXX is not set
# CONFIG_ARCH_MXC is not set
# CONFIG_ARCH_PNX4008 is not set
CONFIG_ARCH_PXA=y
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_LH7A40X is not set
# CONFIG_ARCH_DAVINCI is not set
# CONFIG_ARCH_OMAP is not set
#
# Intel PXA2xx/PXA3xx Implementations
#
#
# Supported PXA3xx Processor Variants
#
CONFIG_CPU_PXA300=y
CONFIG_CPU_PXA310=y
CONFIG_CPU_PXA320=y
# CONFIG_ARCH_LUBBOCK is not set
# CONFIG_MACH_LOGICPD_PXA270 is not set
# CONFIG_MACH_MAINSTONE is not set
# CONFIG_ARCH_PXA_IDP is not set
# CONFIG_PXA_SHARPSL is not set
# CONFIG_MACH_TRIZEPS4 is not set
# CONFIG_MACH_EM_X270 is not set
CONFIG_MACH_ZYLONITE=y
# CONFIG_MACH_ARMCORE is not set
CONFIG_PXA3xx=y
#
# Boot options
#
#
# Power management
#
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSC3=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_TLB_V4WBI=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
CONFIG_IO_36=y
#
# Processor Features
#
# CONFIG_ARM_THUMB is not set
# CONFIG_CPU_DCACHE_DISABLE is not set
# CONFIG_CPU_BPREDICT_DISABLE is not set
# CONFIG_OUTER_CACHE is not set
CONFIG_IWMMXT=y
#
# Bus support
#
# CONFIG_PCI_SYSCALL is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
# CONFIG_PCCARD is not set
#
# Kernel Features
#
# CONFIG_TICK_ONESHOT is not set
# CONFIG_NO_HZ is not set
# CONFIG_HIGH_RES_TIMERS is not set
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
# CONFIG_PREEMPT is not set
CONFIG_HZ=100
CONFIG_AEABI=y
CONFIG_OABI_COMPAT=y
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
CONFIG_SPLIT_PTLOCK_CPUS=4096
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_BOUNCE=y
CONFIG_VIRT_TO_BUS=y
CONFIG_ALIGNMENT_TRAP=y
#
# Boot options
#
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.1.100:/nfs/rootfs/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on console=ttyS0,38400 mem=64M debug"
# CONFIG_XIP_KERNEL is not set
# CONFIG_KEXEC is not set
#
# Floating point emulation
#
#
# At least one emulation must be selected
#
CONFIG_FPE_NWFPE=y
# CONFIG_FPE_NWFPE_XP is not set
# CONFIG_FPE_FASTFPE is not set
#
# Userspace binary formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_AOUT is not set
# CONFIG_BINFMT_MISC is not set
#
# Power management options
#
# CONFIG_PM is not set
CONFIG_SUSPEND_UP_POSSIBLE=y
#
# Networking
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
# CONFIG_IP_SCTP is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
#
# Wireless
#
# CONFIG_CFG80211 is not set
# CONFIG_WIRELESS_EXT is not set
# CONFIG_MAC80211 is not set
# CONFIG_IEEE80211 is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_CONNECTOR is not set
# CONFIG_MTD is not set
# CONFIG_PARPORT is not set
# CONFIG_BLK_DEV is not set
# CONFIG_MISC_DEVICES is not set
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
# CONFIG_SCSI_DMA is not set
# CONFIG_SCSI_NETLINK is not set
# CONFIG_ATA is not set
# CONFIG_MD is not set
CONFIG_NETDEVICES=y
# CONFIG_NETDEVICES_MULTIQUEUE is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_VETH is not set
# CONFIG_PHYLIB is not set
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_AX88796 is not set
CONFIG_SMC91X=y
# CONFIG_DM9000 is not set
# CONFIG_SMC911X is not set
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_B44 is not set
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
#
# Wireless LAN
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_ISDN is not set
#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
# CONFIG_INPUT_POLLDEV is not set
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_NVRAM is not set
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
# CONFIG_I2C is not set
#
# SPI support
#
# CONFIG_SPI is not set
# CONFIG_SPI_MASTER is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
#
# Sonics Silicon Backplane
#
CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
# CONFIG_DAB is not set
#
# Graphics support
#
# CONFIG_VGASTATE is not set
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
CONFIG_FB=y
# CONFIG_FIRMWARE_EDID is not set
# CONFIG_FB_DDC is not set
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
# CONFIG_FB_SYS_FILLRECT is not set
# CONFIG_FB_SYS_COPYAREA is not set
# CONFIG_FB_SYS_IMAGEBLIT is not set
# CONFIG_FB_SYS_FOPS is not set
CONFIG_FB_DEFERRED_IO=y
# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
#
# Frame buffer hardware drivers
#
# CONFIG_FB_S1D13XXX is not set
CONFIG_FB_PXA=y
# CONFIG_FB_PXA_PARAMETERS is not set
# CONFIG_FB_MBX is not set
# CONFIG_FB_VIRTUAL is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Display device support
#
# CONFIG_DISPLAY_SUPPORT is not set
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
CONFIG_FONTS=y
# CONFIG_FONT_8x8 is not set
# CONFIG_FONT_8x16 is not set
CONFIG_FONT_6x11=y
# CONFIG_FONT_7x14 is not set
# CONFIG_FONT_PEARL_8x8 is not set
# CONFIG_FONT_ACORN_8x8 is not set
# CONFIG_FONT_MINI_4x6 is not set
# CONFIG_FONT_SUN8x16 is not set
# CONFIG_FONT_SUN12x22 is not set
# CONFIG_FONT_10x18 is not set
CONFIG_LOGO=y
CONFIG_LOGO_LINUX_MONO=y
CONFIG_LOGO_LINUX_VGA16=y
CONFIG_LOGO_LINUX_CLUT224=y
#
# Sound
#
# CONFIG_SOUND is not set
# CONFIG_HID_SUPPORT is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_MMC is not set
# CONFIG_NEW_LEDS is not set
CONFIG_RTC_LIB=y
# CONFIG_RTC_CLASS is not set
#
# File systems
#
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_INOTIFY is not set
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_SYSCTL=y
CONFIG_SYSFS=y
# CONFIG_TMPFS is not set
# CONFIG_HUGETLB_PAGE is not set
# CONFIG_CONFIGFS_FS is not set
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_NFS_DIRECTIO=y
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_NFS_ACL_SUPPORT=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
# CONFIG_SUNRPC_BIND34 is not set
CONFIG_RPCSEC_GSS_KRB5=y
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_NLS is not set
# CONFIG_DLM is not set
# CONFIG_INSTRUMENTATION is not set
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
# CONFIG_SLUB_DEBUG_ON is not set
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_FRAME_POINTER=y
# CONFIG_SAMPLES is not set
CONFIG_DEBUG_USER=y
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_CRYPTO=y
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_MANAGER=y
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_XCBC is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=y
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_GF128MUL is not set
# CONFIG_CRYPTO_ECB is not set
CONFIG_CRYPTO_CBC=y
# CONFIG_CRYPTO_PCBC is not set
# CONFIG_CRYPTO_LRW is not set
# CONFIG_CRYPTO_XTS is not set
# CONFIG_CRYPTO_CRYPTD is not set
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_TEST is not set
# CONFIG_CRYPTO_AUTHENC is not set
# CONFIG_CRYPTO_HW is not set
#
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y

26
arch/arm/include/asm/atomic.h
View file

@ -19,31 +19,21 @@
#ifdef __KERNEL__
/*
* On ARM, ordinary assignment (str instruction) doesn't clear the local
* strex/ldrex monitor on some implementations. The reason we can use it for
* atomic_set() is the clrex or dummy strex done on every exception return.
*/
#define atomic_read(v) ((v)->counter)
#define atomic_set(v,i) (((v)->counter) = (i))
#if __LINUX_ARM_ARCH__ >= 6
/*
* ARMv6 UP and SMP safe atomic ops. We use load exclusive and
* store exclusive to ensure that these are atomic. We may loop
* to ensure that the update happens. Writing to 'v->counter'
* without using the following operations WILL break the atomic
* nature of these ops.
* to ensure that the update happens.
*/
static inline void atomic_set(atomic_t *v, int i)
{
unsigned long tmp;
__asm__ __volatile__("@ atomic_set\n"
"1: ldrex %0, [%1]\n"
" strex %0, %2, [%1]\n"
" teq %0, #0\n"
" bne 1b"
: "=&r" (tmp)
: "r" (&v->counter), "r" (i)
: "cc");
}
static inline void atomic_add(int i, atomic_t *v)
{
unsigned long tmp;
@ -163,8 +153,6 @@ static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
#error SMP not supported on pre-ARMv6 CPUs
#endif
#define atomic_set(v,i) (((v)->counter) = (i))
static inline int atomic_add_return(int i, atomic_t *v)
{
unsigned long flags;

2
arch/arm/include/asm/cache.h
View file

@ -4,7 +4,7 @@
#ifndef __ASMARM_CACHE_H
#define __ASMARM_CACHE_H
#define L1_CACHE_SHIFT 5
#define L1_CACHE_SHIFT CONFIG_ARM_L1_CACHE_SHIFT
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
/*

10
arch/arm/include/asm/cputype.h
View file

@ -63,6 +63,11 @@ static inline unsigned int __attribute_const__ read_cpuid_cachetype(void)
return read_cpuid(CPUID_CACHETYPE);
}
static inline unsigned int __attribute_const__ read_cpuid_tcmstatus(void)
{
return read_cpuid(CPUID_TCM);
}
/*
* Intel's XScale3 core supports some v6 features (supersections, L2)
* but advertises itself as v5 as it does not support the v6 ISA. For
@ -73,7 +78,10 @@ static inline unsigned int __attribute_const__ read_cpuid_cachetype(void)
#else
static inline int cpu_is_xsc3(void)
{
if ((read_cpuid_id() & 0xffffe000) == 0x69056000)
unsigned int id;
id = read_cpuid_id() & 0xffffe000;
/* It covers both Intel ID and Marvell ID */
if ((id == 0x69056000) || (id == 0x56056000))
return 1;
return 0;

31
arch/arm/include/asm/tcm.h Normal file
View file

@ -0,0 +1,31 @@
/*
*
* Copyright (C) 2008-2009 ST-Ericsson AB
* License terms: GNU General Public License (GPL) version 2
*
* Author: Rickard Andersson <rickard.andersson@stericsson.com>
* Author: Linus Walleij <linus.walleij@stericsson.com>
*
*/
#ifndef __ASMARM_TCM_H
#define __ASMARM_TCM_H
#ifndef CONFIG_HAVE_TCM
#error "You should not be including tcm.h unless you have a TCM!"
#endif
#include <linux/compiler.h>
/* Tag variables with this */
#define __tcmdata __section(.tcm.data)
/* Tag constants with this */
#define __tcmconst __section(.tcm.rodata)
/* Tag functions inside TCM called from outside TCM with this */
#define __tcmfunc __attribute__((long_call)) __section(.tcm.text) noinline
/* Tag function inside TCM called from inside TCM with this */
#define __tcmlocalfunc __section(.tcm.text)
void *tcm_alloc(size_t len);
void tcm_free(void *addr, size_t len);
#endif

4
arch/arm/include/asm/unified.h
View file

@ -35,7 +35,9 @@
#define ARM(x...)
#define THUMB(x...) x
#ifdef __ASSEMBLY__
#define W(instr) instr.w
#endif
#define BSYM(sym) sym + 1
#else /* !CONFIG_THUMB2_KERNEL */
@ -45,7 +47,9 @@
#define ARM(x...) x
#define THUMB(x...)
#ifdef __ASSEMBLY__
#define W(instr) instr
#endif
#define BSYM(sym) sym
#endif /* CONFIG_THUMB2_KERNEL */

1
arch/arm/kernel/Makefile
View file

@ -35,6 +35,7 @@ obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o
obj-$(CONFIG_ARM_THUMBEE) += thumbee.o
obj-$(CONFIG_KGDB) += kgdb.o
obj-$(CONFIG_ARM_UNWIND) += unwind.o
obj-$(CONFIG_HAVE_TCM) += tcm.o
obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o
AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312

19
arch/arm/kernel/entry-armv.S
View file

@ -272,7 +272,15 @@ __und_svc:
@
@ r0 - instruction
@
#ifndef CONFIG_THUMB2_KERNEL
ldr r0, [r2, #-4]
#else
ldrh r0, [r2, #-2] @ Thumb instruction at LR - 2
and r9, r0, #0xf800
cmp r9, #0xe800 @ 32-bit instruction if xx >= 0
ldrhhs r9, [r2] @ bottom 16 bits
orrhs r0, r9, r0, lsl #16
#endif
adr r9, BSYM(1f)
bl call_fpe
@ -678,7 +686,9 @@ ENTRY(fp_enter)
.word no_fp
.previous
no_fp: mov pc, lr
ENTRY(no_fp)
mov pc, lr
ENDPROC(no_fp)
__und_usr_unknown:
enable_irq
@ -734,13 +744,6 @@ ENTRY(__switch_to)
#ifdef CONFIG_MMU
ldr r6, [r2, #TI_CPU_DOMAIN]
#endif
#if __LINUX_ARM_ARCH__ >= 6
#ifdef CONFIG_CPU_32v6K
clrex
#else
strex r5, r4, [ip] @ Clear exclusive monitor
#endif
#endif
#if defined(CONFIG_HAS_TLS_REG)
mcr p15, 0, r3, c13, c0, 3 @ set TLS register
#elif !defined(CONFIG_TLS_REG_EMUL)

14
arch/arm/kernel/entry-header.S
View file

@ -76,13 +76,25 @@
#ifndef CONFIG_THUMB2_KERNEL
.macro svc_exit, rpsr
msr spsr_cxsf, \rpsr
#if defined(CONFIG_CPU_32v6K)
clrex @ clear the exclusive monitor
ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
#elif defined (CONFIG_CPU_V6)
ldr r0, [sp]
strex r1, r2, [sp] @ clear the exclusive monitor
ldmib sp, {r1 - pc}^ @ load r1 - pc, cpsr
#endif
.endm
.macro restore_user_regs, fast = 0, offset = 0
ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
ldr lr, [sp, #\offset + S_PC]! @ get pc
msr spsr_cxsf, r1 @ save in spsr_svc
#if defined(CONFIG_CPU_32v6K)
clrex @ clear the exclusive monitor
#elif defined (CONFIG_CPU_V6)
strex r1, r2, [sp] @ clear the exclusive monitor
#endif
.if \fast
ldmdb sp, {r1 - lr}^ @ get calling r1 - lr
.else
@ -98,6 +110,7 @@
.endm
#else /* CONFIG_THUMB2_KERNEL */
.macro svc_exit, rpsr
clrex @ clear the exclusive monitor
ldr r0, [sp, #S_SP] @ top of the stack
ldr r1, [sp, #S_PC] @ return address
tst r0, #4 @ orig stack 8-byte aligned?
@ -110,6 +123,7 @@
.endm
.macro restore_user_regs, fast = 0, offset = 0
clrex @ clear the exclusive monitor
mov r2, sp
load_user_sp_lr r2, r3, \offset + S_SP @ calling sp, lr
ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr

19
arch/arm/kernel/kprobes.c
View file

@ -22,6 +22,7 @@
#include <linux/kernel.h>
#include <linux/kprobes.h>
#include <linux/module.h>
#include <linux/stop_machine.h>
#include <linux/stringify.h>
#include <asm/traps.h>
#include <asm/cacheflush.h>
@ -83,10 +84,24 @@ void __kprobes arch_arm_kprobe(struct kprobe *p)
flush_insns(p->addr, 1);
}
/*
* The actual disarming is done here on each CPU and synchronized using
* stop_machine. This synchronization is necessary on SMP to avoid removing
* a probe between the moment the 'Undefined Instruction' exception is raised
* and the moment the exception handler reads the faulting instruction from
* memory.
*/
int __kprobes __arch_disarm_kprobe(void *p)
{
struct kprobe *kp = p;
*kp->addr = kp->opcode;
flush_insns(kp->addr, 1);
return 0;
}
void __kprobes arch_disarm_kprobe(struct kprobe *p)
{
*p->addr = p->opcode;
flush_insns(p->addr, 1);
stop_machine(__arch_disarm_kprobe, p, &cpu_online_map);
}
void __kprobes arch_remove_kprobe(struct kprobe *p)

2
arch/arm/kernel/setup.c
View file

@ -45,6 +45,7 @@
#include "compat.h"
#include "atags.h"
#include "tcm.h"
#ifndef MEM_SIZE
#define MEM_SIZE (16*1024*1024)
@ -749,6 +750,7 @@ void __init setup_arch(char **cmdline_p)
#endif
cpu_init();
tcm_init();
/*
* Set up various architecture-specific pointers

246
arch/arm/kernel/tcm.c Normal file
View file

@ -0,0 +1,246 @@
/*
* Copyright (C) 2008-2009 ST-Ericsson AB
* License terms: GNU General Public License (GPL) version 2
* TCM memory handling for ARM systems
*
* Author: Linus Walleij <linus.walleij@stericsson.com>
* Author: Rickard Andersson <rickard.andersson@stericsson.com>
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/stddef.h>
#include <linux/ioport.h>
#include <linux/genalloc.h>
#include <linux/string.h> /* memcpy */
#include <asm/page.h> /* PAGE_SHIFT */
#include <asm/cputype.h>
#include <asm/mach/map.h>
#include <mach/memory.h>
#include "tcm.h"
/* Scream and warn about misuse */
#if !defined(ITCM_OFFSET) || !defined(ITCM_END) || \
!defined(DTCM_OFFSET) || !defined(DTCM_END)
#error "TCM support selected but offsets not defined!"
#endif
static struct gen_pool *tcm_pool;
/* TCM section definitions from the linker */
extern char __itcm_start, __sitcm_text, __eitcm_text;
extern char __dtcm_start, __sdtcm_data, __edtcm_data;
/*
* TCM memory resources
*/
static struct resource dtcm_res = {
.name = "DTCM RAM",
.start = DTCM_OFFSET,
.end = DTCM_END,
.flags = IORESOURCE_MEM
};
static struct resource itcm_res = {
.name = "ITCM RAM",
.start = ITCM_OFFSET,
.end = ITCM_END,
.flags = IORESOURCE_MEM
};
static struct map_desc dtcm_iomap[] __initdata = {
{
.virtual = DTCM_OFFSET,
.pfn = __phys_to_pfn(DTCM_OFFSET),
.length = (DTCM_END - DTCM_OFFSET + 1),
.type = MT_UNCACHED
}
};
static struct map_desc itcm_iomap[] __initdata = {
{
.virtual = ITCM_OFFSET,
.pfn = __phys_to_pfn(ITCM_OFFSET),
.length = (ITCM_END - ITCM_OFFSET + 1),
.type = MT_UNCACHED
}
};
/*
* Allocate a chunk of TCM memory
*/
void *tcm_alloc(size_t len)
{
unsigned long vaddr;
if (!tcm_pool)
return NULL;
vaddr = gen_pool_alloc(tcm_pool, len);
if (!vaddr)
return NULL;
return (void *) vaddr;
}
EXPORT_SYMBOL(tcm_alloc);
/*
* Free a chunk of TCM memory
*/
void tcm_free(void *addr, size_t len)
{
gen_pool_free(tcm_pool, (unsigned long) addr, len);
}
EXPORT_SYMBOL(tcm_free);
static void __init setup_tcm_bank(u8 type, u32 offset, u32 expected_size)
{
const int tcm_sizes[16] = { 0, -1, -1, 4, 8, 16, 32, 64, 128,
256, 512, 1024, -1, -1, -1, -1 };
u32 tcm_region;
int tcm_size;
/* Read the special TCM region register c9, 0 */
if (!type)
asm("mrc p15, 0, %0, c9, c1, 0"
: "=r" (tcm_region));
else
asm("mrc p15, 0, %0, c9, c1, 1"
: "=r" (tcm_region));
tcm_size = tcm_sizes[(tcm_region >> 2) & 0x0f];
if (tcm_size < 0) {
pr_err("CPU: %sTCM of unknown size!\n",
type ? "I" : "D");
} else {
pr_info("CPU: found %sTCM %dk @ %08x, %senabled\n",
type ? "I" : "D",
tcm_size,
(tcm_region & 0xfffff000U),
(tcm_region & 1) ? "" : "not ");
}
if (tcm_size != expected_size) {
pr_crit("CPU: %sTCM was detected %dk but expected %dk!\n",
type ? "I" : "D",
tcm_size,
expected_size);
/* Adjust to the expected size? what can we do... */
}
/* Force move the TCM bank to where we want it, enable */
tcm_region = offset | (tcm_region & 0x00000ffeU) | 1;
if (!type)
asm("mcr p15, 0, %0, c9, c1, 0"
: /* No output operands */
: "r" (tcm_region));
else
asm("mcr p15, 0, %0, c9, c1, 1"
: /* No output operands */
: "r" (tcm_region));
pr_debug("CPU: moved %sTCM %dk to %08x, enabled\n",
type ? "I" : "D",
tcm_size,
(tcm_region & 0xfffff000U));
}
/*
* This initializes the TCM memory
*/
void __init tcm_init(void)
{
u32 tcm_status = read_cpuid_tcmstatus();
char *start;
char *end;
char *ram;
/* Setup DTCM if present */
if (tcm_status & (1 << 16)) {
setup_tcm_bank(0, DTCM_OFFSET,
(DTCM_END - DTCM_OFFSET + 1) >> 10);
request_resource(&iomem_resource, &dtcm_res);
iotable_init(dtcm_iomap, 1);
/* Copy data from RAM to DTCM */
start = &__sdtcm_data;
end = &__edtcm_data;
ram = &__dtcm_start;
memcpy(start, ram, (end-start));
pr_debug("CPU DTCM: copied data from %p - %p\n", start, end);
}
/* Setup ITCM if present */
if (tcm_status & 1) {
setup_tcm_bank(1, ITCM_OFFSET,
(ITCM_END - ITCM_OFFSET + 1) >> 10);
request_resource(&iomem_resource, &itcm_res);
iotable_init(itcm_iomap, 1);
/* Copy code from RAM to ITCM */
start = &__sitcm_text;
end = &__eitcm_text;
ram = &__itcm_start;
memcpy(start, ram, (end-start));
pr_debug("CPU ITCM: copied code from %p - %p\n", start, end);
}
}
/*
* This creates the TCM memory pool and has to be done later,
* during the core_initicalls, since the allocator is not yet
* up and running when the first initialization runs.
*/
static int __init setup_tcm_pool(void)
{
u32 tcm_status = read_cpuid_tcmstatus();
u32 dtcm_pool_start = (u32) &__edtcm_data;
u32 itcm_pool_start = (u32) &__eitcm_text;
int ret;
/*
* Set up malloc pool, 2^2 = 4 bytes granularity since
* the TCM is sometimes just 4 KiB. NB: pages and cache
* line alignments does not matter in TCM!
*/
tcm_pool = gen_pool_create(2, -1);
pr_debug("Setting up TCM memory pool\n");
/* Add the rest of DTCM to the TCM pool */
if (tcm_status & (1 << 16)) {
if (dtcm_pool_start < DTCM_END) {
ret = gen_pool_add(tcm_pool, dtcm_pool_start,
DTCM_END - dtcm_pool_start + 1, -1);
if (ret) {
pr_err("CPU DTCM: could not add DTCM " \
"remainder to pool!\n");
return ret;
}
pr_debug("CPU DTCM: Added %08x bytes @ %08x to " \
"the TCM memory pool\n",
DTCM_END - dtcm_pool_start + 1,
dtcm_pool_start);
}
}
/* Add the rest of ITCM to the TCM pool */
if (tcm_status & 1) {
if (itcm_pool_start < ITCM_END) {
ret = gen_pool_add(tcm_pool, itcm_pool_start,
ITCM_END - itcm_pool_start + 1, -1);
if (ret) {
pr_err("CPU ITCM: could not add ITCM " \
"remainder to pool!\n");
return ret;
}
pr_debug("CPU ITCM: Added %08x bytes @ %08x to " \
"the TCM memory pool\n",
ITCM_END - itcm_pool_start + 1,
itcm_pool_start);
}
}
return 0;
}
core_initcall(setup_tcm_pool);

17
arch/arm/kernel/tcm.h Normal file
View file

@ -0,0 +1,17 @@
/*
* Copyright (C) 2008-2009 ST-Ericsson AB
* License terms: GNU General Public License (GPL) version 2
* TCM memory handling for ARM systems
*
* Author: Linus Walleij <linus.walleij@stericsson.com>
* Author: Rickard Andersson <rickard.andersson@stericsson.com>
*/
#ifdef CONFIG_HAVE_TCM
void __init tcm_init(void);
#else
/* No TCM support, just blank inlines to be optimized out */
inline void tcm_init(void)
{
}
#endif

57
arch/arm/kernel/vmlinux.lds.S
View file

@ -199,6 +199,63 @@ SECTIONS
}
_edata_loc = __data_loc + SIZEOF(.data);
#ifdef CONFIG_HAVE_TCM
/*
* We align everything to a page boundary so we can
* free it after init has commenced and TCM contents have
* been copied to its destination.
*/
.tcm_start : {
. = ALIGN(PAGE_SIZE);
__tcm_start = .;
__itcm_start = .;
}
/*
* Link these to the ITCM RAM
* Put VMA to the TCM address and LMA to the common RAM
* and we'll upload the contents from RAM to TCM and free
* the used RAM after that.
*/
.text_itcm ITCM_OFFSET : AT(__itcm_start)
{
__sitcm_text = .;
*(.tcm.text)
*(.tcm.rodata)
. = ALIGN(4);
__eitcm_text = .;
}
/*
* Reset the dot pointer, this is needed to create the
* relative __dtcm_start below (to be used as extern in code).
*/
. = ADDR(.tcm_start) + SIZEOF(.tcm_start) + SIZEOF(.text_itcm);
.dtcm_start : {
__dtcm_start = .;
}
/* TODO: add remainder of ITCM as well, that can be used for data! */
.data_dtcm DTCM_OFFSET : AT(__dtcm_start)
{
. = ALIGN(4);
__sdtcm_data = .;
*(.tcm.data)
. = ALIGN(4);
__edtcm_data = .;
}
/* Reset the dot pointer or the linker gets confused */
. = ADDR(.dtcm_start) + SIZEOF(.data_dtcm);
/* End marker for freeing TCM copy in linked object */
.tcm_end : AT(ADDR(.dtcm_start) + SIZEOF(.data_dtcm)){
. = ALIGN(PAGE_SIZE);
__tcm_end = .;
}
#endif
.bss : {
__bss_start = .; /* BSS */
*(.bss)

16
arch/arm/lib/copy_page.S
View file

@ -12,8 +12,9 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
#include <asm/cache.h>
#define COPY_COUNT (PAGE_SZ/64 PLD( -1 ))
#define COPY_COUNT (PAGE_SZ / (2 * L1_CACHE_BYTES) PLD( -1 ))
.text
.align 5
@ -26,17 +27,16 @@
ENTRY(copy_page)
stmfd sp!, {r4, lr} @ 2
PLD( pld [r1, #0] )
PLD( pld [r1, #32] )
PLD( pld [r1, #L1_CACHE_BYTES] )
mov r2, #COPY_COUNT @ 1
ldmia r1!, {r3, r4, ip, lr} @ 4+1
1: PLD( pld [r1, #64] )
PLD( pld [r1, #96] )
2: stmia r0!, {r3, r4, ip, lr} @ 4
ldmia r1!, {r3, r4, ip, lr} @ 4+1
stmia r0!, {r3, r4, ip, lr} @ 4
ldmia r1!, {r3, r4, ip, lr} @ 4+1
1: PLD( pld [r1, #2 * L1_CACHE_BYTES])
PLD( pld [r1, #3 * L1_CACHE_BYTES])
2:
.rept (2 * L1_CACHE_BYTES / 16 - 1)
stmia r0!, {r3, r4, ip, lr} @ 4
ldmia r1!, {r3, r4, ip, lr} @ 4
.endr
subs r2, r2, #1 @ 1
stmia r0!, {r3, r4, ip, lr} @ 4
ldmgtia r1!, {r3, r4, ip, lr} @ 4

10
arch/arm/mach-at91/at91cap9_devices.c
View file

@ -771,9 +771,9 @@ void __init at91_add_device_pwm(u32 mask) {}
* AC97
* -------------------------------------------------------------------- */
#if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE)
#if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
static u64 ac97_dmamask = DMA_BIT_MASK(32);
static struct atmel_ac97_data ac97_data;
static struct ac97c_platform_data ac97_data;
static struct resource ac97_resources[] = {
[0] = {
@ -789,7 +789,7 @@ static struct resource ac97_resources[] = {
};
static struct platform_device at91cap9_ac97_device = {
.name = "ac97c",
.name = "atmel_ac97c",
.id = 1,
.dev = {
.dma_mask = &ac97_dmamask,
@ -800,7 +800,7 @@ static struct platform_device at91cap9_ac97_device = {
.num_resources = ARRAY_SIZE(ac97_resources),
};
void __init at91_add_device_ac97(struct atmel_ac97_data *data)
void __init at91_add_device_ac97(struct ac97c_platform_data *data)
{
if (!data)
return;
@ -818,7 +818,7 @@ void __init at91_add_device_ac97(struct atmel_ac97_data *data)
platform_device_register(&at91cap9_ac97_device);
}
#else
void __init at91_add_device_ac97(struct atmel_ac97_data *data) {}
void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
#endif

104
arch/arm/mach-at91/at91sam9g45_devices.c
View file

@ -24,10 +24,58 @@
#include <mach/at91sam9g45.h>
#include <mach/at91sam9g45_matrix.h>
#include <mach/at91sam9_smc.h>
#include <mach/at_hdmac.h>
#include "generic.h"
/* --------------------------------------------------------------------
* HDMAC - AHB DMA Controller
* -------------------------------------------------------------------- */
#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
static u64 hdmac_dmamask = DMA_BIT_MASK(32);
static struct at_dma_platform_data atdma_pdata = {
.nr_channels = 8,
};
static struct resource hdmac_resources[] = {
[0] = {
.start = AT91_BASE_SYS + AT91_DMA,
.end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = AT91SAM9G45_ID_DMA,
.end = AT91SAM9G45_ID_DMA,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at_hdmac_device = {
.name = "at_hdmac",
.id = -1,
.dev = {
.dma_mask = &hdmac_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &atdma_pdata,
},
.resource = hdmac_resources,
.num_resources = ARRAY_SIZE(hdmac_resources),
};
void __init at91_add_device_hdmac(void)
{
dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
dma_cap_set(DMA_SLAVE, atdma_pdata.cap_mask);
platform_device_register(&at_hdmac_device);
}
#else
void __init at91_add_device_hdmac(void) {}
#endif
/* --------------------------------------------------------------------
* USB Host (OHCI)
* -------------------------------------------------------------------- */
@ -549,6 +597,61 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
#endif
/* --------------------------------------------------------------------
* AC97
* -------------------------------------------------------------------- */
#if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
static u64 ac97_dmamask = DMA_BIT_MASK(32);
static struct ac97c_platform_data ac97_data;
static struct resource ac97_resources[] = {
[0] = {
.start = AT91SAM9G45_BASE_AC97C,
.end = AT91SAM9G45_BASE_AC97C + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9G45_ID_AC97C,
.end = AT91SAM9G45_ID_AC97C,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91sam9g45_ac97_device = {
.name = "atmel_ac97c",
.id = 0,
.dev = {
.dma_mask = &ac97_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &ac97_data,
},
.resource = ac97_resources,
.num_resources = ARRAY_SIZE(ac97_resources),
};
void __init at91_add_device_ac97(struct ac97c_platform_data *data)
{
if (!data)
return;
at91_set_A_periph(AT91_PIN_PD8, 0); /* AC97FS */
at91_set_A_periph(AT91_PIN_PD9, 0); /* AC97CK */
at91_set_A_periph(AT91_PIN_PD7, 0); /* AC97TX */
at91_set_A_periph(AT91_PIN_PD6, 0); /* AC97RX */
/* reset */
if (data->reset_pin)
at91_set_gpio_output(data->reset_pin, 0);
ac97_data = *data;
platform_device_register(&at91sam9g45_ac97_device);
}
#else
void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
#endif
/* --------------------------------------------------------------------
* LCD Controller
* -------------------------------------------------------------------- */
@ -1220,6 +1323,7 @@ void __init at91_add_device_serial(void) {}
*/
static int __init at91_add_standard_devices(void)
{
at91_add_device_hdmac();
at91_add_device_rtc();
at91_add_device_rtt();
at91_add_device_watchdog();

102
arch/arm/mach-at91/at91sam9rl_devices.c
View file

@ -21,10 +21,56 @@
#include <mach/at91sam9rl.h>
#include <mach/at91sam9rl_matrix.h>
#include <mach/at91sam9_smc.h>
#include <mach/at_hdmac.h>
#include "generic.h"
/* --------------------------------------------------------------------
* HDMAC - AHB DMA Controller
* -------------------------------------------------------------------- */
#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
static u64 hdmac_dmamask = DMA_BIT_MASK(32);
static struct at_dma_platform_data atdma_pdata = {
.nr_channels = 2,
};
static struct resource hdmac_resources[] = {
[0] = {
.start = AT91_BASE_SYS + AT91_DMA,
.end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = AT91SAM9RL_ID_DMA,
.end = AT91SAM9RL_ID_DMA,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at_hdmac_device = {
.name = "at_hdmac",
.id = -1,
.dev = {
.dma_mask = &hdmac_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &atdma_pdata,
},
.resource = hdmac_resources,
.num_resources = ARRAY_SIZE(hdmac_resources),
};
void __init at91_add_device_hdmac(void)
{
dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
platform_device_register(&at_hdmac_device);
}
#else
void __init at91_add_device_hdmac(void) {}
#endif
/* --------------------------------------------------------------------
* USB HS Device (Gadget)
* -------------------------------------------------------------------- */
@ -397,6 +443,61 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
#endif
/* --------------------------------------------------------------------
* AC97
* -------------------------------------------------------------------- */
#if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
static u64 ac97_dmamask = DMA_BIT_MASK(32);
static struct ac97c_platform_data ac97_data;
static struct resource ac97_resources[] = {
[0] = {
.start = AT91SAM9RL_BASE_AC97C,
.end = AT91SAM9RL_BASE_AC97C + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = AT91SAM9RL_ID_AC97C,
.end = AT91SAM9RL_ID_AC97C,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device at91sam9rl_ac97_device = {
.name = "atmel_ac97c",
.id = 0,
.dev = {
.dma_mask = &ac97_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &ac97_data,
},
.resource = ac97_resources,
.num_resources = ARRAY_SIZE(ac97_resources),
};
void __init at91_add_device_ac97(struct ac97c_platform_data *data)
{
if (!data)
return;
at91_set_A_periph(AT91_PIN_PD1, 0); /* AC97FS */
at91_set_A_periph(AT91_PIN_PD2, 0); /* AC97CK */
at91_set_A_periph(AT91_PIN_PD3, 0); /* AC97TX */
at91_set_A_periph(AT91_PIN_PD4, 0); /* AC97RX */
/* reset */
if (data->reset_pin)
at91_set_gpio_output(data->reset_pin, 0);
ac97_data = *data;
platform_device_register(&at91sam9rl_ac97_device);
}
#else
void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
#endif
/* --------------------------------------------------------------------
* LCD Controller
* -------------------------------------------------------------------- */
@ -1103,6 +1204,7 @@ void __init at91_add_device_serial(void) {}
*/
static int __init at91_add_standard_devices(void)
{
at91_add_device_hdmac();
at91_add_device_rtc();
at91_add_device_rtt();
at91_add_device_watchdog();

2
arch/arm/mach-at91/board-cap9adk.c
View file

@ -364,7 +364,7 @@ static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data;
/*
* AC97
*/
static struct atmel_ac97_data cap9adk_ac97_data = {
static struct ac97c_platform_data cap9adk_ac97_data = {
// .reset_pin = ... not connected
};

2
arch/arm/mach-at91/board-neocore926.c
View file

@ -340,7 +340,7 @@ static void __init neocore926_add_device_buttons(void) {}
/*
* AC97
*/
static struct atmel_ac97_data neocore926_ac97_data = {
static struct ac97c_platform_data neocore926_ac97_data = {
.reset_pin = AT91_PIN_PA13,
};

10
arch/arm/mach-at91/board-sam9m10g45ek.c
View file

@ -310,6 +310,14 @@ static void __init ek_add_device_buttons(void) {}
#endif
/*
* AC97
* reset_pin is not connected: NRST
*/
static struct ac97c_platform_data ek_ac97_data = {
};
/*
* LEDs ... these could all be PWM-driven, for variable brightness
*/
@ -372,6 +380,8 @@ static void __init ek_board_init(void)
at91_add_device_lcdc(&ek_lcdc_data);
/* Push Buttons */
ek_add_device_buttons();
/* AC97 */
at91_add_device_ac97(&ek_ac97_data);
/* LEDs */
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
at91_pwm_leds(ek_pwm_led, ARRAY_SIZE(ek_pwm_led));

10
arch/arm/mach-at91/board-sam9rlek.c
View file

@ -210,6 +210,14 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data;
#endif
/*
* AC97
* reset_pin is not connected: NRST
*/
static struct ac97c_platform_data ek_ac97_data = {
};
/*
* LEDs
*/
@ -299,6 +307,8 @@ static void __init ek_board_init(void)
at91_add_device_mmc(0, &ek_mmc_data);
/* LCD Controller */
at91_add_device_lcdc(&ek_lcdc_data);
/* AC97 */
at91_add_device_ac97(&ek_ac97_data);
/* Touch Screen Controller */
at91_add_device_tsadcc();
/* LEDs */

4
arch/arm/mach-integrator/integrator_cp.c
View file

@ -19,6 +19,7 @@
#include <linux/amba/bus.h>
#include <linux/amba/kmi.h>
#include <linux/amba/clcd.h>
#include <linux/amba/mmci.h>
#include <linux/io.h>
#include <asm/clkdev.h>
@ -35,7 +36,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/irq.h>
#include <asm/mach/mmc.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
@ -400,7 +400,7 @@ static unsigned int mmc_status(struct device *dev)
return status & 8;
}
static struct mmc_platform_data mmc_data = {
static struct mmci_platform_data mmc_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.status = mmc_status,
.gpio_wp = -1,

36
arch/arm/mach-pxa/Kconfig
View file

@ -21,6 +21,11 @@ config CPU_PXA930
config CPU_PXA935
bool "PXA935 (codename Tavor-P65)"
select CPU_PXA930
config CPU_PXA950
bool "PXA950 (codename Tavor-PV2)"
select CPU_PXA930
endmenu
@ -79,6 +84,12 @@ config MACH_MP900C
bool "Nec Mobilepro 900/c"
select PXA25x
config MACH_BALLOON3
bool "Balloon 3 board"
select PXA27x
select IWMMXT
select PXA_HAVE_BOARD_IRQS
config ARCH_PXA_IDP
bool "Accelent Xscale IDP"
select PXA25x
@ -371,6 +382,15 @@ config MACH_PALMTE2
Say Y here if you intend to run this kernel on a Palm Tungsten|E2
handheld computer.
config MACH_PALMTC
bool "Palm Tungsten|C"
default y
depends on ARCH_PXA_PALM
select PXA25x
help
Say Y here if you intend to run this kernel on a Palm Tungsten|C
handheld computer.
config MACH_PALMT5
bool "Palm Tungsten|T5"
default y
@ -458,6 +478,7 @@ config PXA_EZX
select PXA27x
select IWMMXT
select HAVE_PWM
select PXA_HAVE_BOARD_IRQS
config MACH_EZX_A780
bool "Motorola EZX A780"
@ -489,6 +510,21 @@ config MACH_EZX_E2
default y
depends on PXA_EZX
config MACH_XCEP
bool "Iskratel Electronics XCEP"
select PXA25x
select MTD
select MTD_PARTITIONS
select MTD_PHYSMAP
select MTD_CFI_INTELEXT
select MTD_CFI
select MTD_CHAR
select SMC91X
select PXA_SSP
help
PXA255 based Single Board Computer with SMC 91C111 ethernet chip and 64 MB of flash.
Tuned for usage in Libera instruments for particle accelerators.
endmenu
config PXA25x

4
arch/arm/mach-pxa/Makefile
View file

@ -31,6 +31,7 @@ obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o
obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o
obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o
obj-$(CONFIG_MACH_BALLOON3) += balloon3.o
obj-$(CONFIG_MACH_MP900C) += mp900.o
obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o
@ -58,6 +59,7 @@ obj-$(CONFIG_MACH_E750) += e750.o
obj-$(CONFIG_MACH_E400) += e400.o
obj-$(CONFIG_MACH_E800) += e800.o
obj-$(CONFIG_MACH_PALMTE2) += palmte2.o
obj-$(CONFIG_MACH_PALMTC) += palmtc.o
obj-$(CONFIG_MACH_PALMT5) += palmt5.o
obj-$(CONFIG_MACH_PALMTX) += palmtx.o
obj-$(CONFIG_MACH_PALMLD) += palmld.o
@ -78,6 +80,8 @@ obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx.o cm-x255.o cm-x270.o
obj-$(CONFIG_MACH_CM_X300) += cm-x300.o
obj-$(CONFIG_PXA_EZX) += ezx.o
obj-$(CONFIG_MACH_XCEP) += xcep.o
obj-$(CONFIG_MACH_INTELMOTE2) += imote2.o
obj-$(CONFIG_MACH_STARGATE2) += stargate2.o
obj-$(CONFIG_MACH_CSB726) += csb726.o

361
arch/arm/mach-pxa/balloon3.c Normal file
View file

@ -0,0 +1,361 @@
/*
* linux/arch/arm/mach-pxa/balloon3.c
*
* Support for Balloonboard.org Balloon3 board.
*
* Author: Nick Bane, Wookey, Jonathan McDowell
* Created: June, 2006
* Copyright: Toby Churchill Ltd
* Derived from mainstone.c, by Nico Pitre
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/sysdev.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
#include <linux/bitops.h>
#include <linux/fb.h>
#include <linux/gpio.h>
#include <linux/ioport.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/types.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/sizes.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/mach/flash.h>
#include <mach/pxa27x.h>
#include <mach/balloon3.h>
#include <mach/audio.h>
#include <mach/pxafb.h>
#include <mach/mmc.h>
#include <mach/udc.h>
#include <mach/pxa27x-udc.h>
#include <mach/irda.h>
#include <mach/ohci.h>
#include <plat/i2c.h>
#include "generic.h"
#include "devices.h"
static unsigned long balloon3_irq_enabled;
static unsigned long balloon3_features_present =
(1 << BALLOON3_FEATURE_OHCI) | (1 << BALLOON3_FEATURE_CF) |
(1 << BALLOON3_FEATURE_AUDIO) |
(1 << BALLOON3_FEATURE_TOPPOLY);
int balloon3_has(enum balloon3_features feature)
{
return (balloon3_features_present & (1 << feature)) ? 1 : 0;
}
EXPORT_SYMBOL_GPL(balloon3_has);
int __init parse_balloon3_features(char *arg)
{
if (!arg)
return 0;
return strict_strtoul(arg, 0, &balloon3_features_present);
}
early_param("balloon3_features", parse_balloon3_features);
static void balloon3_mask_irq(unsigned int irq)
{
int balloon3_irq = (irq - BALLOON3_IRQ(0));
balloon3_irq_enabled &= ~(1 << balloon3_irq);
__raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
}
static void balloon3_unmask_irq(unsigned int irq)
{
int balloon3_irq = (irq - BALLOON3_IRQ(0));
balloon3_irq_enabled |= (1 << balloon3_irq);
__raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
}
static struct irq_chip balloon3_irq_chip = {
.name = "FPGA",
.ack = balloon3_mask_irq,
.mask = balloon3_mask_irq,
.unmask = balloon3_unmask_irq,
};
static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc)
{
unsigned long pending = __raw_readl(BALLOON3_INT_CONTROL_REG) &
balloon3_irq_enabled;
do {
/* clear useless edge notification */
if (desc->chip->ack)
desc->chip->ack(BALLOON3_AUX_NIRQ);
while (pending) {
irq = BALLOON3_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
pending &= pending - 1;
}
pending = __raw_readl(BALLOON3_INT_CONTROL_REG) &
balloon3_irq_enabled;
} while (pending);
}
static void __init balloon3_init_irq(void)
{
int irq;
pxa27x_init_irq();
/* setup extra Balloon3 irqs */
for (irq = BALLOON3_IRQ(0); irq <= BALLOON3_IRQ(7); irq++) {
set_irq_chip(irq, &balloon3_irq_chip);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}
set_irq_chained_handler(BALLOON3_AUX_NIRQ, balloon3_irq_handler);
set_irq_type(BALLOON3_AUX_NIRQ, IRQ_TYPE_EDGE_FALLING);
pr_debug("%s: chained handler installed - irq %d automatically "
"enabled\n", __func__, BALLOON3_AUX_NIRQ);
}
static void balloon3_backlight_power(int on)
{
pr_debug("%s: power is %s\n", __func__, on ? "on" : "off");
gpio_set_value(BALLOON3_GPIO_RUN_BACKLIGHT, on);
}
static unsigned long balloon3_lcd_pin_config[] = {
/* LCD - 16bpp Active TFT */
GPIO58_LCD_LDD_0,
GPIO59_LCD_LDD_1,
GPIO60_LCD_LDD_2,
GPIO61_LCD_LDD_3,
GPIO62_LCD_LDD_4,
GPIO63_LCD_LDD_5,
GPIO64_LCD_LDD_6,
GPIO65_LCD_LDD_7,
GPIO66_LCD_LDD_8,
GPIO67_LCD_LDD_9,
GPIO68_LCD_LDD_10,
GPIO69_LCD_LDD_11,
GPIO70_LCD_LDD_12,
GPIO71_LCD_LDD_13,
GPIO72_LCD_LDD_14,
GPIO73_LCD_LDD_15,
GPIO74_LCD_FCLK,
GPIO75_LCD_LCLK,
GPIO76_LCD_PCLK,
GPIO77_LCD_BIAS,
GPIO99_GPIO, /* Backlight */
};
static struct pxafb_mode_info balloon3_lcd_modes[] = {
{
.pixclock = 38000,
.xres = 480,
.yres = 640,
.bpp = 16,
.hsync_len = 8,
.left_margin = 8,
.right_margin = 8,
.vsync_len = 2,
.upper_margin = 4,
.lower_margin = 5,
.sync = 0,
},
};
static struct pxafb_mach_info balloon3_pxafb_info = {
.modes = balloon3_lcd_modes,
.num_modes = ARRAY_SIZE(balloon3_lcd_modes),
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
.pxafb_backlight_power = balloon3_backlight_power,
};
static unsigned long balloon3_mmc_pin_config[] = {
GPIO32_MMC_CLK,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
GPIO112_MMC_CMD,
};
static void balloon3_mci_setpower(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data *p_d = dev->platform_data;
if ((1 << vdd) & p_d->ocr_mask) {
pr_debug("%s: on\n", __func__);
/* FIXME something to prod here? */
} else {
pr_debug("%s: off\n", __func__);
/* FIXME something to prod here? */
}
}
static struct pxamci_platform_data balloon3_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.setpower = balloon3_mci_setpower,
};
static int balloon3_udc_is_connected(void)
{
pr_debug("%s: udc connected\n", __func__);
return 1;
}
static void balloon3_udc_command(int cmd)
{
switch (cmd) {
case PXA2XX_UDC_CMD_CONNECT:
UP2OCR |= (UP2OCR_DPPUE + UP2OCR_DPPUBE);
pr_debug("%s: connect\n", __func__);
break;
case PXA2XX_UDC_CMD_DISCONNECT:
UP2OCR &= ~UP2OCR_DPPUE;
pr_debug("%s: disconnect\n", __func__);
break;
}
}
static struct pxa2xx_udc_mach_info balloon3_udc_info = {
.udc_is_connected = balloon3_udc_is_connected,
.udc_command = balloon3_udc_command,
};
static struct pxaficp_platform_data balloon3_ficp_platform_data = {
.transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
};
static unsigned long balloon3_ohci_pin_config[] = {
GPIO88_USBH1_PWR,
GPIO89_USBH1_PEN,
};
static struct pxaohci_platform_data balloon3_ohci_platform_data = {
.port_mode = PMM_PERPORT_MODE,
.flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
};
static unsigned long balloon3_pin_config[] __initdata = {
/* Select BTUART 'COM1/ttyS0' as IO option for pins 42/43/44/45 */
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO44_BTUART_CTS,
GPIO45_BTUART_RTS,
/* Wakeup GPIO */
GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
/* NAND & IDLE LED GPIOs */
GPIO9_GPIO,
GPIO10_GPIO,
};
static struct gpio_led balloon3_gpio_leds[] = {
{
.name = "balloon3:green:idle",
.default_trigger = "heartbeat",
.gpio = BALLOON3_GPIO_LED_IDLE,
.active_low = 1,
},
{
.name = "balloon3:green:nand",
.default_trigger = "nand-disk",
.gpio = BALLOON3_GPIO_LED_NAND,
.active_low = 1,
},
};
static struct gpio_led_platform_data balloon3_gpio_leds_platform_data = {
.leds = balloon3_gpio_leds,
.num_leds = ARRAY_SIZE(balloon3_gpio_leds),
};
static struct platform_device balloon3led_device = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &balloon3_gpio_leds_platform_data,
},
};
static void __init balloon3_init(void)
{
pr_info("Initialising Balloon3\n");
/* system bus arbiter setting
* - Core_Park
* - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
*/
ARB_CNTRL = ARB_CORE_PARK | 0x234;
pxa_set_i2c_info(NULL);
if (balloon3_has(BALLOON3_FEATURE_AUDIO))
pxa_set_ac97_info(NULL);
if (balloon3_has(BALLOON3_FEATURE_TOPPOLY)) {
pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_lcd_pin_config));
gpio_request(BALLOON3_GPIO_RUN_BACKLIGHT,
"LCD Backlight Power");
gpio_direction_output(BALLOON3_GPIO_RUN_BACKLIGHT, 1);
set_pxa_fb_info(&balloon3_pxafb_info);
}
if (balloon3_has(BALLOON3_FEATURE_MMC)) {
pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_mmc_pin_config));
pxa_set_mci_info(&balloon3_mci_platform_data);
}
pxa_set_ficp_info(&balloon3_ficp_platform_data);
if (balloon3_has(BALLOON3_FEATURE_OHCI)) {
pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_ohci_pin_config));
pxa_set_ohci_info(&balloon3_ohci_platform_data);
}
pxa_set_udc_info(&balloon3_udc_info);
pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_pin_config));
platform_device_register(&balloon3led_device);
}
static struct map_desc balloon3_io_desc[] __initdata = {
{ /* CPLD/FPGA */
.virtual = BALLOON3_FPGA_VIRT,
.pfn = __phys_to_pfn(BALLOON3_FPGA_PHYS),
.length = BALLOON3_FPGA_LENGTH,
.type = MT_DEVICE,
},
};
static void __init balloon3_map_io(void)
{
pxa_map_io();
iotable_init(balloon3_io_desc, ARRAY_SIZE(balloon3_io_desc));
}
MACHINE_START(BALLOON3, "Balloon3")
/* Maintainer: Nick Bane. */
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.map_io = balloon3_map_io,
.init_irq = balloon3_init_irq,
.timer = &pxa_timer,
.init_machine = balloon3_init,
.boot_params = PHYS_OFFSET + 0x100,
MACHINE_END

1
arch/arm/mach-pxa/clock.h
View file

@ -12,7 +12,6 @@ struct clk {
unsigned int cken;
unsigned int delay;
unsigned int enabled;
struct clk *other;
};
#define INIT_CLKREG(_clk,_devname,_conname) \

164
arch/arm/mach-pxa/cm-x270.c
View file

@ -13,13 +13,18 @@
#include <linux/sysdev.h>
#include <linux/irq.h>
#include <linux/gpio.h>
#include <linux/delay.h>
#include <linux/rtc-v3020.h>
#include <video/mbxfb.h>
#include <linux/spi/spi.h>
#include <linux/spi/libertas_spi.h>
#include <mach/pxa27x.h>
#include <mach/ohci.h>
#include <mach/mmc.h>
#include <mach/pxa2xx_spi.h>
#include "generic.h"
@ -34,6 +39,10 @@
/* MMC power enable */
#define GPIO105_MMC_POWER (105)
/* WLAN GPIOS */
#define GPIO19_WLAN_STRAP (19)
#define GPIO102_WLAN_RST (102)
static unsigned long cmx270_pin_config[] = {
/* AC'97 */
GPIO28_AC97_BITCLK,
@ -94,8 +103,8 @@ static unsigned long cmx270_pin_config[] = {
GPIO26_SSP1_RXD,
/* SSP2 */
GPIO19_SSP2_SCLK,
GPIO14_SSP2_SFRM,
GPIO19_GPIO, /* SSP2 clock is used as GPIO for Libertas pin-strap */
GPIO14_GPIO,
GPIO87_SSP2_TXD,
GPIO88_SSP2_RXD,
@ -123,6 +132,7 @@ static unsigned long cmx270_pin_config[] = {
GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH,
GPIO105_GPIO | MFP_LPM_DRIVE_HIGH, /* MMC/SD power */
GPIO53_GPIO, /* PC card reset */
GPIO102_GPIO, /* WLAN reset */
/* NAND controls */
GPIO11_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */
@ -131,6 +141,7 @@ static unsigned long cmx270_pin_config[] = {
/* interrupts */
GPIO10_GPIO, /* DM9000 interrupt */
GPIO83_GPIO, /* MMC card detect */
GPIO95_GPIO, /* WLAN interrupt */
};
/* V3020 RTC */
@ -271,56 +282,12 @@ static inline void cmx270_init_ohci(void) {}
#endif
#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
static int cmx270_mci_init(struct device *dev,
irq_handler_t cmx270_detect_int,
void *data)
{
int err;
err = gpio_request(GPIO105_MMC_POWER, "MMC/SD power");
if (err) {
dev_warn(dev, "power gpio unavailable\n");
return err;
}
gpio_direction_output(GPIO105_MMC_POWER, 0);
err = request_irq(CMX270_MMC_IRQ, cmx270_detect_int,
IRQF_DISABLED | IRQF_TRIGGER_FALLING,
"MMC card detect", data);
if (err) {
gpio_free(GPIO105_MMC_POWER);
dev_err(dev, "cmx270_mci_init: MMC/SD: can't"
" request MMC card detect IRQ\n");
}
return err;
}
static void cmx270_mci_setpower(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data *p_d = dev->platform_data;
if ((1 << vdd) & p_d->ocr_mask) {
dev_dbg(dev, "power on\n");
gpio_set_value(GPIO105_MMC_POWER, 0);
} else {
gpio_set_value(GPIO105_MMC_POWER, 1);
dev_dbg(dev, "power off\n");
}
}
static void cmx270_mci_exit(struct device *dev, void *data)
{
free_irq(CMX270_MMC_IRQ, data);
gpio_free(GPIO105_MMC_POWER);
}
static struct pxamci_platform_data cmx270_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = cmx270_mci_init,
.setpower = cmx270_mci_setpower,
.exit = cmx270_mci_exit,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.gpio_card_detect = GPIO83_MMC_IRQ,
.gpio_card_ro = -1,
.gpio_power = GPIO105_MMC_POWER,
.gpio_power_invert = 1,
};
static void __init cmx270_init_mmc(void)
@ -331,6 +298,100 @@ static void __init cmx270_init_mmc(void)
static inline void cmx270_init_mmc(void) {}
#endif
#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
static struct pxa2xx_spi_master cm_x270_spi_info = {
.num_chipselect = 1,
.enable_dma = 1,
};
static struct pxa2xx_spi_chip cm_x270_libertas_chip = {
.rx_threshold = 1,
.tx_threshold = 1,
.timeout = 1000,
.gpio_cs = 14,
};
static unsigned long cm_x270_libertas_pin_config[] = {
/* SSP2 */
GPIO19_SSP2_SCLK,
GPIO14_GPIO,
GPIO87_SSP2_TXD,
GPIO88_SSP2_RXD,
};
static int cm_x270_libertas_setup(struct spi_device *spi)
{
int err = gpio_request(GPIO19_WLAN_STRAP, "WLAN STRAP");
if (err)
return err;
err = gpio_request(GPIO102_WLAN_RST, "WLAN RST");
if (err)
goto err_free_strap;
err = gpio_direction_output(GPIO102_WLAN_RST, 0);
if (err)
goto err_free_strap;
msleep(100);
err = gpio_direction_output(GPIO19_WLAN_STRAP, 1);
if (err)
goto err_free_strap;
msleep(100);
pxa2xx_mfp_config(ARRAY_AND_SIZE(cm_x270_libertas_pin_config));
gpio_set_value(GPIO102_WLAN_RST, 1);
msleep(100);
spi->bits_per_word = 16;
spi_setup(spi);
return 0;
err_free_strap:
gpio_free(GPIO19_WLAN_STRAP);
return err;
}
static int cm_x270_libertas_teardown(struct spi_device *spi)
{
gpio_set_value(GPIO102_WLAN_RST, 0);
gpio_free(GPIO102_WLAN_RST);
gpio_free(GPIO19_WLAN_STRAP);
return 0;
}
struct libertas_spi_platform_data cm_x270_libertas_pdata = {
.use_dummy_writes = 1,
.setup = cm_x270_libertas_setup,
.teardown = cm_x270_libertas_teardown,
};
static struct spi_board_info cm_x270_spi_devices[] __initdata = {
{
.modalias = "libertas_spi",
.max_speed_hz = 13000000,
.bus_num = 2,
.irq = gpio_to_irq(95),
.chip_select = 0,
.controller_data = &cm_x270_libertas_chip,
.platform_data = &cm_x270_libertas_pdata,
},
};
static void __init cmx270_init_spi(void)
{
pxa2xx_set_spi_info(2, &cm_x270_spi_info);
spi_register_board_info(ARRAY_AND_SIZE(cm_x270_spi_devices));
}
#else
static inline void cmx270_init_spi(void) {}
#endif
void __init cmx270_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_pin_config));
@ -343,4 +404,5 @@ void __init cmx270_init(void)
cmx270_init_mmc();
cmx270_init_ohci();
cmx270_init_2700G();
cmx270_init_spi();
}

71
arch/arm/mach-pxa/cm-x300.c
View file

@ -306,68 +306,21 @@ static void cm_x300_mci_exit(struct device *dev, void *data)
}
static struct pxamci_platform_data cm_x300_mci_platform_data = {
.detect_delay = 20,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = cm_x300_mci_init,
.exit = cm_x300_mci_exit,
.detect_delay = 20,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = cm_x300_mci_init,
.exit = cm_x300_mci_exit,
.gpio_card_detect = -1,
.gpio_card_ro = -1,
.gpio_power = -1,
};
static int cm_x300_mci2_ro(struct device *dev)
{
return gpio_get_value(GPIO85_MMC2_WP);
}
static int cm_x300_mci2_init(struct device *dev,
irq_handler_t cm_x300_detect_int,
void *data)
{
int err;
/*
* setup GPIO for CM-X300 MMC controller
*/
err = gpio_request(GPIO82_MMC2_IRQ, "mmc card detect");
if (err)
goto err_request_cd;
gpio_direction_input(GPIO82_MMC2_IRQ);
err = gpio_request(GPIO85_MMC2_WP, "mmc write protect");
if (err)
goto err_request_wp;
gpio_direction_input(GPIO85_MMC2_WP);
err = request_irq(CM_X300_MMC2_IRQ, cm_x300_detect_int,
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
"MMC card detect", data);
if (err) {
printk(KERN_ERR "%s: MMC/SD/SDIO: "
"can't request card detect IRQ\n", __func__);
goto err_request_irq;
}
return 0;
err_request_irq:
gpio_free(GPIO85_MMC2_WP);
err_request_wp:
gpio_free(GPIO82_MMC2_IRQ);
err_request_cd:
return err;
}
static void cm_x300_mci2_exit(struct device *dev, void *data)
{
free_irq(CM_X300_MMC2_IRQ, data);
gpio_free(GPIO82_MMC2_IRQ);
gpio_free(GPIO85_MMC2_WP);
}
static struct pxamci_platform_data cm_x300_mci2_platform_data = {
.detect_delay = 20,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = cm_x300_mci2_init,
.exit = cm_x300_mci2_exit,
.get_ro = cm_x300_mci2_ro,
.detect_delay = 20,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.gpio_card_detect = GPIO82_MMC2_IRQ,
.gpio_card_ro = GPIO85_MMC2_WP,
.gpio_power = -1,
};
static void __init cm_x300_init_mmc(void)

1
arch/arm/mach-pxa/colibri-pxa300.c
View file

@ -172,6 +172,7 @@ void __init colibri_pxa300_init(void)
{
colibri_pxa300_init_eth();
colibri_pxa300_init_ohci();
colibri_pxa3xx_init_nand();
colibri_pxa300_init_lcd();
colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO39_GPIO));
colibri_pxa310_init_ac97();

33
arch/arm/mach-pxa/colibri-pxa320.c
View file

@ -164,15 +164,48 @@ static inline void __init colibri_pxa320_init_ac97(void)
static inline void colibri_pxa320_init_ac97(void) {}
#endif
/*
* The following configuration is verified to work with the Toradex Orchid
* carrier board
*/
static mfp_cfg_t colibri_pxa320_uart_pin_config[] __initdata = {
/* UART 1 configuration (may be set by bootloader) */
GPIO99_UART1_CTS,
GPIO104_UART1_RTS,
GPIO97_UART1_RXD,
GPIO98_UART1_TXD,
GPIO101_UART1_DTR,
GPIO103_UART1_DSR,
GPIO100_UART1_DCD,
GPIO102_UART1_RI,
/* UART 2 configuration */
GPIO109_UART2_CTS,
GPIO112_UART2_RTS,
GPIO110_UART2_RXD,
GPIO111_UART2_TXD,
/* UART 3 configuration */
GPIO30_UART3_RXD,
GPIO31_UART3_TXD,
};
static void __init colibri_pxa320_init_uart(void)
{
pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_uart_pin_config));
}
void __init colibri_pxa320_init(void)
{
colibri_pxa320_init_eth();
colibri_pxa320_init_ohci();
colibri_pxa3xx_init_nand();
colibri_pxa320_init_lcd();
colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO49_GPIO));
colibri_pxa320_init_ac97();
colibri_pxa3xx_init_mmc(ARRAY_AND_SIZE(colibri_pxa320_mmc_pin_config),
mfp_to_gpio(MFP_PIN_GPIO28));
colibri_pxa320_init_uart();
}
MACHINE_START(COLIBRI320, "Toradex Colibri PXA320")

52
arch/arm/mach-pxa/colibri-pxa3xx.c
View file

@ -25,6 +25,7 @@
#include <mach/colibri.h>
#include <mach/mmc.h>
#include <mach/pxafb.h>
#include <mach/pxa3xx_nand.h>
#include "generic.h"
#include "devices.h"
@ -95,10 +96,13 @@ static void colibri_pxa3xx_mci_exit(struct device *dev, void *data)
}
static struct pxamci_platform_data colibri_pxa3xx_mci_platform_data = {
.detect_delay = 20,
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.init = colibri_pxa3xx_mci_init,
.exit = colibri_pxa3xx_mci_exit,
.detect_delay = 20,
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.init = colibri_pxa3xx_mci_init,
.exit = colibri_pxa3xx_mci_exit,
.gpio_card_detect = -1,
.gpio_card_ro = -1,
.gpio_power = -1,
};
void __init colibri_pxa3xx_init_mmc(mfp_cfg_t *pins, int len, int detect_pin)
@ -154,3 +158,43 @@ void __init colibri_pxa3xx_init_lcd(int bl_pin)
}
#endif
#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
static struct mtd_partition colibri_nand_partitions[] = {
{
.name = "bootloader",
.offset = 0,
.size = SZ_512K,
.mask_flags = MTD_WRITEABLE, /* force read-only */
},
{
.name = "kernel",
.offset = MTDPART_OFS_APPEND,
.size = SZ_4M,
.mask_flags = MTD_WRITEABLE, /* force read-only */
},
{
.name = "reserved",
.offset = MTDPART_OFS_APPEND,
.size = SZ_1M,
.mask_flags = MTD_WRITEABLE, /* force read-only */
},
{
.name = "fs",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
static struct pxa3xx_nand_platform_data colibri_nand_info = {
.enable_arbiter = 1,
.keep_config = 1,
.parts = colibri_nand_partitions,
.nr_parts = ARRAY_SIZE(colibri_nand_partitions),
};
void __init colibri_pxa3xx_init_nand(void)
{
pxa3xx_set_nand_info(&colibri_nand_info);
}
#endif

233
arch/arm/mach-pxa/corgi.c
View file

@ -29,6 +29,7 @@
#include <linux/spi/ads7846.h>
#include <linux/spi/corgi_lcd.h>
#include <linux/mtd/sharpsl.h>
#include <linux/input/matrix_keypad.h>
#include <video/w100fb.h>
#include <asm/setup.h>
@ -104,6 +105,28 @@ static unsigned long corgi_pin_config[] __initdata = {
GPIO6_MMC_CLK,
GPIO8_MMC_CS0,
/* GPIO Matrix Keypad */
GPIO66_GPIO, /* column 0 */
GPIO67_GPIO, /* column 1 */
GPIO68_GPIO, /* column 2 */
GPIO69_GPIO, /* column 3 */
GPIO70_GPIO, /* column 4 */
GPIO71_GPIO, /* column 5 */
GPIO72_GPIO, /* column 6 */
GPIO73_GPIO, /* column 7 */
GPIO74_GPIO, /* column 8 */
GPIO75_GPIO, /* column 9 */
GPIO76_GPIO, /* column 10 */
GPIO77_GPIO, /* column 11 */
GPIO58_GPIO, /* row 0 */
GPIO59_GPIO, /* row 1 */
GPIO60_GPIO, /* row 2 */
GPIO61_GPIO, /* row 3 */
GPIO62_GPIO, /* row 4 */
GPIO63_GPIO, /* row 5 */
GPIO64_GPIO, /* row 6 */
GPIO65_GPIO, /* row 7 */
/* GPIO */
GPIO9_GPIO, /* CORGI_GPIO_nSD_DETECT */
GPIO7_GPIO, /* CORGI_GPIO_nSD_WP */
@ -267,9 +290,115 @@ static struct platform_device corgifb_device = {
/*
* Corgi Keyboard Device
*/
#define CORGI_KEY_CALENDER KEY_F1
#define CORGI_KEY_ADDRESS KEY_F2
#define CORGI_KEY_FN KEY_F3
#define CORGI_KEY_CANCEL KEY_F4
#define CORGI_KEY_OFF KEY_SUSPEND
#define CORGI_KEY_EXOK KEY_F5
#define CORGI_KEY_EXCANCEL KEY_F6
#define CORGI_KEY_EXJOGDOWN KEY_F7
#define CORGI_KEY_EXJOGUP KEY_F8
#define CORGI_KEY_JAP1 KEY_LEFTCTRL
#define CORGI_KEY_JAP2 KEY_LEFTALT
#define CORGI_KEY_MAIL KEY_F10
#define CORGI_KEY_OK KEY_F11
#define CORGI_KEY_MENU KEY_F12
static const uint32_t corgikbd_keymap[] = {
KEY(0, 1, KEY_1),
KEY(0, 2, KEY_3),
KEY(0, 3, KEY_5),
KEY(0, 4, KEY_6),
KEY(0, 5, KEY_7),
KEY(0, 6, KEY_9),
KEY(0, 7, KEY_0),
KEY(0, 8, KEY_BACKSPACE),
KEY(1, 1, KEY_2),
KEY(1, 2, KEY_4),
KEY(1, 3, KEY_R),
KEY(1, 4, KEY_Y),
KEY(1, 5, KEY_8),
KEY(1, 6, KEY_I),
KEY(1, 7, KEY_O),
KEY(1, 8, KEY_P),
KEY(2, 0, KEY_TAB),
KEY(2, 1, KEY_Q),
KEY(2, 2, KEY_E),
KEY(2, 3, KEY_T),
KEY(2, 4, KEY_G),
KEY(2, 5, KEY_U),
KEY(2, 6, KEY_J),
KEY(2, 7, KEY_K),
KEY(3, 0, CORGI_KEY_CALENDER),
KEY(3, 1, KEY_W),
KEY(3, 2, KEY_S),
KEY(3, 3, KEY_F),
KEY(3, 4, KEY_V),
KEY(3, 5, KEY_H),
KEY(3, 6, KEY_M),
KEY(3, 7, KEY_L),
KEY(3, 9, KEY_RIGHTSHIFT),
KEY(4, 0, CORGI_KEY_ADDRESS),
KEY(4, 1, KEY_A),
KEY(4, 2, KEY_D),
KEY(4, 3, KEY_C),
KEY(4, 4, KEY_B),
KEY(4, 5, KEY_N),
KEY(4, 6, KEY_DOT),
KEY(4, 8, KEY_ENTER),
KEY(4, 10, KEY_LEFTSHIFT),
KEY(5, 0, CORGI_KEY_MAIL),
KEY(5, 1, KEY_Z),
KEY(5, 2, KEY_X),
KEY(5, 3, KEY_MINUS),
KEY(5, 4, KEY_SPACE),
KEY(5, 5, KEY_COMMA),
KEY(5, 7, KEY_UP),
KEY(5, 11, CORGI_KEY_FN),
KEY(6, 0, KEY_SYSRQ),
KEY(6, 1, CORGI_KEY_JAP1),
KEY(6, 2, CORGI_KEY_JAP2),
KEY(6, 3, CORGI_KEY_CANCEL),
KEY(6, 4, CORGI_KEY_OK),
KEY(6, 5, CORGI_KEY_MENU),
KEY(6, 6, KEY_LEFT),
KEY(6, 7, KEY_DOWN),
KEY(6, 8, KEY_RIGHT),
KEY(7, 0, CORGI_KEY_OFF),
KEY(7, 1, CORGI_KEY_EXOK),
KEY(7, 2, CORGI_KEY_EXCANCEL),
KEY(7, 3, CORGI_KEY_EXJOGDOWN),
KEY(7, 4, CORGI_KEY_EXJOGUP),
};
static struct matrix_keymap_data corgikbd_keymap_data = {
.keymap = corgikbd_keymap,
.keymap_size = ARRAY_SIZE(corgikbd_keymap),
};
static const int corgikbd_row_gpios[] =
{ 58, 59, 60, 61, 62, 63, 64, 65 };
static const int corgikbd_col_gpios[] =
{ 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77 };
static struct matrix_keypad_platform_data corgikbd_pdata = {
.keymap_data = &corgikbd_keymap_data,
.row_gpios = corgikbd_row_gpios,
.col_gpios = corgikbd_col_gpios,
.num_row_gpios = ARRAY_SIZE(corgikbd_row_gpios),
.num_col_gpios = ARRAY_SIZE(corgikbd_col_gpios),
.col_scan_delay_us = 10,
.debounce_ms = 10,
.wakeup = 1,
};
static struct platform_device corgikbd_device = {
.name = "corgi-keyboard",
.name = "matrix-keypad",
.id = -1,
.dev = {
.platform_data = &corgikbd_pdata,
},
};
/*
@ -307,111 +436,20 @@ static struct platform_device corgiled_device = {
* The card detect interrupt isn't debounced so we delay it by 250ms
* to give the card a chance to fully insert/eject.
*/
static struct pxamci_platform_data corgi_mci_platform_data;
static int corgi_mci_init(struct device *dev, irq_handler_t corgi_detect_int, void *data)
{
int err;
err = gpio_request(CORGI_GPIO_nSD_DETECT, "nSD_DETECT");
if (err)
goto err_out;
err = gpio_request(CORGI_GPIO_nSD_WP, "nSD_WP");
if (err)
goto err_free_1;
err = gpio_request(CORGI_GPIO_SD_PWR, "SD_PWR");
if (err)
goto err_free_2;
gpio_direction_input(CORGI_GPIO_nSD_DETECT);
gpio_direction_input(CORGI_GPIO_nSD_WP);
gpio_direction_output(CORGI_GPIO_SD_PWR, 0);
corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250);
err = request_irq(CORGI_IRQ_GPIO_nSD_DETECT, corgi_detect_int,
IRQF_DISABLED | IRQF_TRIGGER_RISING |
IRQF_TRIGGER_FALLING,
"MMC card detect", data);
if (err) {
pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n",
__func__);
goto err_free_3;
}
return 0;
err_free_3:
gpio_free(CORGI_GPIO_SD_PWR);
err_free_2:
gpio_free(CORGI_GPIO_nSD_WP);
err_free_1:
gpio_free(CORGI_GPIO_nSD_DETECT);
err_out:
return err;
}
static void corgi_mci_setpower(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data* p_d = dev->platform_data;
gpio_set_value(CORGI_GPIO_SD_PWR, ((1 << vdd) & p_d->ocr_mask));
}
static int corgi_mci_get_ro(struct device *dev)
{
return gpio_get_value(CORGI_GPIO_nSD_WP);
}
static void corgi_mci_exit(struct device *dev, void *data)
{
free_irq(CORGI_IRQ_GPIO_nSD_DETECT, data);
gpio_free(CORGI_GPIO_SD_PWR);
gpio_free(CORGI_GPIO_nSD_WP);
gpio_free(CORGI_GPIO_nSD_DETECT);
}
static struct pxamci_platform_data corgi_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = corgi_mci_init,
.get_ro = corgi_mci_get_ro,
.setpower = corgi_mci_setpower,
.exit = corgi_mci_exit,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.gpio_card_detect = -1,
.gpio_card_ro = CORGI_GPIO_nSD_WP,
.gpio_power = CORGI_GPIO_SD_PWR,
};
/*
* Irda
*/
static void corgi_irda_transceiver_mode(struct device *dev, int mode)
{
gpio_set_value(CORGI_GPIO_IR_ON, mode & IR_OFF);
pxa2xx_transceiver_mode(dev, mode);
}
static int corgi_irda_startup(struct device *dev)
{
int err;
err = gpio_request(CORGI_GPIO_IR_ON, "IR_ON");
if (err)
return err;
gpio_direction_output(CORGI_GPIO_IR_ON, 1);
return 0;
}
static void corgi_irda_shutdown(struct device *dev)
{
gpio_free(CORGI_GPIO_IR_ON);
}
static struct pxaficp_platform_data corgi_ficp_platform_data = {
.gpio_pwdown = CORGI_GPIO_IR_ON,
.transceiver_cap = IR_SIRMODE | IR_OFF,
.transceiver_mode = corgi_irda_transceiver_mode,
.startup = corgi_irda_startup,
.shutdown = corgi_irda_shutdown,
};
@ -636,6 +674,7 @@ static void __init corgi_init(void)
corgi_init_spi();
pxa_set_udc_info(&udc_info);
corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250);
pxa_set_mci_info(&corgi_mci_platform_data);
pxa_set_ficp_info(&corgi_ficp_platform_data);
pxa_set_i2c_info(NULL);

54
arch/arm/mach-pxa/csb726.c
View file

@ -130,61 +130,17 @@ static struct pxamci_platform_data csb726_mci_data;
static int csb726_mci_init(struct device *dev,
irq_handler_t detect, void *data)
{
int err;
csb726_mci_data.detect_delay = msecs_to_jiffies(500);
err = gpio_request(CSB726_GPIO_MMC_DETECT, "MMC detect");
if (err)
goto err_det_req;
err = gpio_direction_input(CSB726_GPIO_MMC_DETECT);
if (err)
goto err_det_dir;
err = gpio_request(CSB726_GPIO_MMC_RO, "MMC ro");
if (err)
goto err_ro_req;
err = gpio_direction_input(CSB726_GPIO_MMC_RO);
if (err)
goto err_ro_dir;
err = request_irq(gpio_to_irq(CSB726_GPIO_MMC_DETECT), detect,
IRQF_DISABLED, "MMC card detect", data);
if (err)
goto err_irq;
return 0;
err_irq:
err_ro_dir:
gpio_free(CSB726_GPIO_MMC_RO);
err_ro_req:
err_det_dir:
gpio_free(CSB726_GPIO_MMC_DETECT);
err_det_req:
return err;
}
static int csb726_mci_get_ro(struct device *dev)
{
return gpio_get_value(CSB726_GPIO_MMC_RO);
}
static void csb726_mci_exit(struct device *dev, void *data)
{
free_irq(gpio_to_irq(CSB726_GPIO_MMC_DETECT), data);
gpio_free(CSB726_GPIO_MMC_RO);
gpio_free(CSB726_GPIO_MMC_DETECT);
}
static struct pxamci_platform_data csb726_mci = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = csb726_mci_init,
.get_ro = csb726_mci_get_ro,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = csb726_mci_init,
/* FIXME setpower */
.exit = csb726_mci_exit,
.gpio_card_detect = CSB726_GPIO_MMC_DETECT,
.gpio_card_ro = CSB726_GPIO_MMC_RO,
.gpio_power = -1,
};
static struct pxaohci_platform_data csb726_ohci_platform_data = {

27
arch/arm/mach-pxa/devices.c
View file

@ -935,6 +935,33 @@ void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
{
pxa_register_device(&pxa3xx_device_nand, info);
}
static struct resource pxa3xx_resources_gcu[] = {
{
.start = 0x54000000,
.end = 0x54000fff,
.flags = IORESOURCE_MEM,
},
{
.start = IRQ_GCU,
.end = IRQ_GCU,
.flags = IORESOURCE_IRQ,
},
};
static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
struct platform_device pxa3xx_device_gcu = {
.name = "pxa3xx-gcu",
.id = -1,
.num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
.resource = pxa3xx_resources_gcu,
.dev = {
.dma_mask = &pxa3xx_gcu_dmamask,
.coherent_dma_mask = 0xffffffff,
},
};
#endif /* CONFIG_PXA3xx */
/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.

2
arch/arm/mach-pxa/devices.h
View file

@ -35,4 +35,6 @@ extern struct platform_device pxa27x_device_pwm1;
extern struct platform_device pxa3xx_device_nand;
extern struct platform_device pxa3xx_device_i2c_power;
extern struct platform_device pxa3xx_device_gcu;
void __init pxa_register_device(struct platform_device *dev, void *data);

1
arch/arm/mach-pxa/e740.c
View file

@ -199,7 +199,6 @@ static void __init e740_init(void)
platform_add_devices(devices, ARRAY_SIZE(devices));
pxa_set_udc_info(&e7xx_udc_mach_info);
pxa_set_ac97_info(NULL);
e7xx_irda_init();
pxa_set_ficp_info(&e7xx_ficp_platform_data);
}

1
arch/arm/mach-pxa/e750.c
View file

@ -200,7 +200,6 @@ static void __init e750_init(void)
platform_add_devices(devices, ARRAY_SIZE(devices));
pxa_set_udc_info(&e7xx_udc_mach_info);
pxa_set_ac97_info(NULL);
e7xx_irda_init();
pxa_set_ficp_info(&e7xx_ficp_platform_data);
}

45
arch/arm/mach-pxa/em-x270.c
View file

@ -646,13 +646,16 @@ static int em_x270_mci_get_ro(struct device *dev)
}
static struct pxamci_platform_data em_x270_mci_platform_data = {
.ocr_mask = MMC_VDD_20_21|MMC_VDD_21_22|MMC_VDD_22_23|
MMC_VDD_24_25|MMC_VDD_25_26|MMC_VDD_26_27|
MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|
MMC_VDD_30_31|MMC_VDD_31_32,
.init = em_x270_mci_init,
.setpower = em_x270_mci_setpower,
.exit = em_x270_mci_exit,
.ocr_mask = MMC_VDD_20_21|MMC_VDD_21_22|MMC_VDD_22_23|
MMC_VDD_24_25|MMC_VDD_25_26|MMC_VDD_26_27|
MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|
MMC_VDD_30_31|MMC_VDD_31_32,
.init = em_x270_mci_init,
.setpower = em_x270_mci_setpower,
.exit = em_x270_mci_exit,
.gpio_card_detect = -1,
.gpio_card_ro = -1,
.gpio_power = -1,
};
static void __init em_x270_init_mmc(void)
@ -1022,22 +1025,32 @@ static int em_x270_sensor_power(struct device *dev, int on)
return 0;
}
static struct soc_camera_link iclink = {
.bus_id = 0,
.power = em_x270_sensor_power,
};
static struct i2c_board_info em_x270_i2c_cam_info[] = {
{
I2C_BOARD_INFO("mt9m111", 0x48),
},
};
static struct soc_camera_link iclink = {
.bus_id = 0,
.power = em_x270_sensor_power,
.board_info = &em_x270_i2c_cam_info[0],
.i2c_adapter_id = 0,
.module_name = "mt9m111",
};
static struct platform_device em_x270_camera = {
.name = "soc-camera-pdrv",
.id = -1,
.dev = {
.platform_data = &iclink,
},
};
static void __init em_x270_init_camera(void)
{
i2c_register_board_info(0, ARRAY_AND_SIZE(em_x270_i2c_cam_info));
pxa_set_camera_info(&em_x270_camera_platform_data);
platform_device_register(&em_x270_camera);
}
#else
static inline void em_x270_init_camera(void) {}
@ -1103,6 +1116,7 @@ REGULATOR_CONSUMER(ldo5, NULL, "vcc cam");
REGULATOR_CONSUMER(ldo10, &pxa_device_mci.dev, "vcc sdio");
REGULATOR_CONSUMER(ldo12, NULL, "vcc usb");
REGULATOR_CONSUMER(ldo19, &em_x270_gprs_userspace_consumer.dev, "vcc gprs");
REGULATOR_CONSUMER(buck2, NULL, "vcc_core");
#define REGULATOR_INIT(_ldo, _min_uV, _max_uV, _ops_mask) \
static struct regulator_init_data _ldo##_data = { \
@ -1125,6 +1139,7 @@ REGULATOR_INIT(ldo10, 2000000, 3200000,
REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE);
REGULATOR_INIT(ldo12, 3000000, 3000000, REGULATOR_CHANGE_STATUS);
REGULATOR_INIT(ldo19, 3200000, 3200000, REGULATOR_CHANGE_STATUS);
REGULATOR_INIT(buck2, 1000000, 1650000, REGULATOR_CHANGE_VOLTAGE);
struct led_info em_x270_led_info = {
.name = "em-x270:orange",
@ -1194,6 +1209,8 @@ struct da903x_subdev_info em_x270_da9030_subdevs[] = {
DA9030_LDO(12),
DA9030_LDO(19),
DA9030_SUBDEV(regulator, BUCK2, &buck2_data),
DA9030_SUBDEV(led, LED_PC, &em_x270_led_info),
DA9030_SUBDEV(backlight, WLED, &em_x270_led_info),
DA9030_SUBDEV(battery, BAT, &em_x270_batterty_info),
@ -1245,7 +1262,6 @@ static void __init em_x270_init_i2c(void)
static void __init em_x270_module_init(void)
{
pr_info("%s\n", __func__);
pxa2xx_mfp_config(ARRAY_AND_SIZE(em_x270_pin_config));
mmc_cd = GPIO13_MMC_CD;
@ -1257,7 +1273,6 @@ static void __init em_x270_module_init(void)
static void __init em_x270_exeda_init(void)
{
pr_info("%s\n", __func__);
pxa2xx_mfp_config(ARRAY_AND_SIZE(exeda_pin_config));
mmc_cd = GPIO114_MMC_CD;

39
arch/arm/mach-pxa/eseries.c
View file

@ -47,44 +47,9 @@ struct pxa2xx_udc_mach_info e7xx_udc_mach_info = {
.gpio_pullup_inverted = 1
};
static void e7xx_irda_transceiver_mode(struct device *dev, int mode)
{
if (mode & IR_OFF) {
gpio_set_value(GPIO_E7XX_IR_OFF, 1);
pxa2xx_transceiver_mode(dev, mode);
} else {
pxa2xx_transceiver_mode(dev, mode);
gpio_set_value(GPIO_E7XX_IR_OFF, 0);
}
}
int e7xx_irda_init(void)
{
int ret;
ret = gpio_request(GPIO_E7XX_IR_OFF, "IrDA power");
if (ret)
goto out;
ret = gpio_direction_output(GPIO_E7XX_IR_OFF, 0);
if (ret)
goto out;
e7xx_irda_transceiver_mode(NULL, IR_SIRMODE | IR_OFF);
out:
return ret;
}
static void e7xx_irda_shutdown(struct device *dev)
{
e7xx_irda_transceiver_mode(dev, IR_SIRMODE | IR_OFF);
gpio_free(GPIO_E7XX_IR_OFF);
}
struct pxaficp_platform_data e7xx_ficp_platform_data = {
.transceiver_cap = IR_SIRMODE | IR_OFF,
.transceiver_mode = e7xx_irda_transceiver_mode,
.shutdown = e7xx_irda_shutdown,
.gpio_pwdown = GPIO_E7XX_IR_OFF,
.transceiver_cap = IR_SIRMODE | IR_OFF,
};
int eseries_tmio_enable(struct platform_device *dev)

5
arch/arm/mach-pxa/gumstix.c
View file

@ -88,7 +88,10 @@ static struct platform_device *devices[] __initdata = {
#ifdef CONFIG_MMC_PXA
static struct pxamci_platform_data gumstix_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.gpio_card_detect = -1,
.gpio_card_ro = -1,
.gpio_power = -1,
};
static void __init gumstix_mmc_init(void)

65
arch/arm/mach-pxa/hx4700.c
View file

@ -45,6 +45,7 @@
#include <mach/irda.h>
#include <mach/pxa2xx_spi.h>
#include <video/platform_lcd.h>
#include <video/w100fb.h>
#include "devices.h"
@ -174,14 +175,9 @@ static int hx4700_gpio_request(struct gpio_ress *gpios, int size)
* IRDA
*/
static void irda_transceiver_mode(struct device *dev, int mode)
{
gpio_set_value(GPIO105_HX4700_nIR_ON, mode & IR_OFF);
}
static struct pxaficp_platform_data ficp_info = {
.transceiver_cap = IR_SIRMODE | IR_OFF,
.transceiver_mode = irda_transceiver_mode,
.gpio_pwdown = GPIO105_HX4700_nIR_ON,
.transceiver_cap = IR_SIRMODE | IR_OFF,
};
/*
@ -368,8 +364,6 @@ static struct platform_device egpio = {
* LCD - Sony display connected to ATI Imageon w3220
*/
static int lcd_power;
static void sony_lcd_init(void)
{
gpio_set_value(GPIO84_HX4700_LCD_SQN, 1);
@ -410,35 +404,6 @@ static void sony_lcd_off(void)
gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0);
}
static int hx4700_lcd_set_power(struct lcd_device *ldev, int level)
{
switch (level) {
case FB_BLANK_UNBLANK:
sony_lcd_init();
break;
case FB_BLANK_NORMAL:
case FB_BLANK_VSYNC_SUSPEND:
case FB_BLANK_HSYNC_SUSPEND:
case FB_BLANK_POWERDOWN:
sony_lcd_off();
break;
}
lcd_power = level;
return 0;
}
static int hx4700_lcd_get_power(struct lcd_device *lm)
{
return lcd_power;
}
static struct lcd_ops hx4700_lcd_ops = {
.get_power = hx4700_lcd_get_power,
.set_power = hx4700_lcd_set_power,
};
static struct lcd_device *hx4700_lcd_device;
#ifdef CONFIG_PM
static void w3220_lcd_suspend(struct w100fb_par *wfb)
{
@ -573,6 +538,27 @@ static struct platform_device w3220 = {
.resource = w3220_resources,
};
static void hx4700_lcd_set_power(struct plat_lcd_data *pd, unsigned int power)
{
if (power)
sony_lcd_init();
else
sony_lcd_off();
}
static struct plat_lcd_data hx4700_lcd_data = {
.set_power = hx4700_lcd_set_power,
};
static struct platform_device hx4700_lcd = {
.name = "platform-lcd",
.id = -1,
.dev = {
.platform_data = &hx4700_lcd_data,
.parent = &w3220.dev,
},
};
/*
* Backlight
*/
@ -872,9 +858,6 @@ static void __init hx4700_init(void)
pxa2xx_set_spi_info(2, &pxa_ssp2_master_info);
spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info));
hx4700_lcd_device = lcd_device_register("w100fb", NULL,
(void *)&w3220_info, &hx4700_lcd_ops);
gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 0);
mdelay(10);
gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 1);

5
arch/arm/mach-pxa/idp.c
View file

@ -168,7 +168,10 @@ static struct pxafb_mach_info sharp_lm8v31 = {
};
static struct pxamci_platform_data idp_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.gpio_card_detect = -1,
.gpio_card_ro = -1,
.gpio_power = -1,
};
static void __init idp_init(void)

3
arch/arm/mach-pxa/imote2.c
View file

@ -389,6 +389,9 @@ static int imote2_mci_get_ro(struct device *dev)
static struct pxamci_platform_data imote2_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* default anyway */
.get_ro = imote2_mci_get_ro,
.gpio_card_detect = -1,
.gpio_card_ro = -1,
.gpio_power = -1,
};
static struct mtd_partition imote2flash_partitions[] = {

134
arch/arm/mach-pxa/include/mach/balloon3.h Normal file
View file

@ -0,0 +1,134 @@
/*
* linux/include/asm-arm/arch-pxa/balloon3.h
*
* Authors: Nick Bane and Wookey
* Created: Oct, 2005
* Copyright: Toby Churchill Ltd
* Cribbed from mainstone.c, by Nicholas Pitre
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef ASM_ARCH_BALLOON3_H
#define ASM_ARCH_BALLOON3_H
enum balloon3_features {
BALLOON3_FEATURE_OHCI,
BALLOON3_FEATURE_MMC,
BALLOON3_FEATURE_CF,
BALLOON3_FEATURE_AUDIO,
BALLOON3_FEATURE_TOPPOLY,
};
#define BALLOON3_FPGA_PHYS PXA_CS4_PHYS
#define BALLOON3_FPGA_VIRT (0xf1000000) /* as per balloon2 */
#define BALLOON3_FPGA_LENGTH 0x01000000
/* FPGA/CPLD registers */
#define BALLOON3_PCMCIA0_REG (BALLOON3_FPGA_VIRT + 0x00e00008)
/* fixme - same for now */
#define BALLOON3_PCMCIA1_REG (BALLOON3_FPGA_VIRT + 0x00e00008)
#define BALLOON3_NANDIO_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000)
/* fpga/cpld interrupt control register */
#define BALLOON3_INT_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e0000C)
#define BALLOON3_NANDIO_CTL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010)
#define BALLOON3_NANDIO_CTL_REG (BALLOON3_FPGA_VIRT + 0x00e00014)
#define BALLOON3_VERSION_REG (BALLOON3_FPGA_VIRT + 0x00e0001c)
#define BALLOON3_SAMOSA_ADDR_REG (BALLOON3_FPGA_VIRT + 0x00c00000)
#define BALLOON3_SAMOSA_DATA_REG (BALLOON3_FPGA_VIRT + 0x00c00004)
#define BALLOON3_SAMOSA_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00c0001c)
/* GPIOs for irqs */
#define BALLOON3_GPIO_AUX_NIRQ (94)
#define BALLOON3_GPIO_CODEC_IRQ (95)
/* Timer and Idle LED locations */
#define BALLOON3_GPIO_LED_NAND (9)
#define BALLOON3_GPIO_LED_IDLE (10)
/* backlight control */
#define BALLOON3_GPIO_RUN_BACKLIGHT (99)
#define BALLOON3_GPIO_S0_CD (105)
/* FPGA Interrupt Mask/Acknowledge Register */
#define BALLOON3_INT_S0_IRQ (1 << 0) /* PCMCIA 0 IRQ */
#define BALLOON3_INT_S0_STSCHG (1 << 1) /* PCMCIA 0 status changed */
/* CF Status Register */
#define BALLOON3_PCMCIA_nIRQ (1 << 0) /* IRQ / ready signal */
#define BALLOON3_PCMCIA_nSTSCHG_BVD1 (1 << 1)
/* VDD sense / card status changed */
/* CF control register (write) */
#define BALLOON3_PCMCIA_RESET (1 << 0) /* Card reset signal */
#define BALLOON3_PCMCIA_ENABLE (1 << 1)
#define BALLOON3_PCMCIA_ADD_ENABLE (1 << 2)
/* CPLD (and FPGA) interface definitions */
#define CPLD_LCD0_DATA_SET 0x00
#define CPLD_LCD0_DATA_CLR 0x10
#define CPLD_LCD0_COMMAND_SET 0x01
#define CPLD_LCD0_COMMAND_CLR 0x11
#define CPLD_LCD1_DATA_SET 0x02
#define CPLD_LCD1_DATA_CLR 0x12
#define CPLD_LCD1_COMMAND_SET 0x03
#define CPLD_LCD1_COMMAND_CLR 0x13
#define CPLD_MISC_SET 0x07
#define CPLD_MISC_CLR 0x17
#define CPLD_MISC_LOON_NRESET_BIT 0
#define CPLD_MISC_LOON_UNSUSP_BIT 1
#define CPLD_MISC_RUN_5V_BIT 2
#define CPLD_MISC_CHG_D0_BIT 3
#define CPLD_MISC_CHG_D1_BIT 4
#define CPLD_MISC_DAC_NCS_BIT 5
#define CPLD_LCD_SET 0x08
#define CPLD_LCD_CLR 0x18
#define CPLD_LCD_BACKLIGHT_EN_0_BIT 0
#define CPLD_LCD_BACKLIGHT_EN_1_BIT 1
#define CPLD_LCD_LED_RED_BIT 4
#define CPLD_LCD_LED_GREEN_BIT 5
#define CPLD_LCD_NRESET_BIT 7
#define CPLD_LCD_RO_SET 0x09
#define CPLD_LCD_RO_CLR 0x19
#define CPLD_LCD_RO_LCD0_nWAIT_BIT 0
#define CPLD_LCD_RO_LCD1_nWAIT_BIT 1
#define CPLD_SERIAL_SET 0x0a
#define CPLD_SERIAL_CLR 0x1a
#define CPLD_SERIAL_GSM_RI_BIT 0
#define CPLD_SERIAL_GSM_CTS_BIT 1
#define CPLD_SERIAL_GSM_DTR_BIT 2
#define CPLD_SERIAL_LPR_CTS_BIT 3
#define CPLD_SERIAL_TC232_CTS_BIT 4
#define CPLD_SERIAL_TC232_DSR_BIT 5
#define CPLD_SROUTING_SET 0x0b
#define CPLD_SROUTING_CLR 0x1b
#define CPLD_SROUTING_MSP430_LPR 0
#define CPLD_SROUTING_MSP430_TC232 1
#define CPLD_SROUTING_MSP430_GSM 2
#define CPLD_SROUTING_LOON_LPR (0 << 4)
#define CPLD_SROUTING_LOON_TC232 (1 << 4)
#define CPLD_SROUTING_LOON_GSM (2 << 4)
#define CPLD_AROUTING_SET 0x0c
#define CPLD_AROUTING_CLR 0x1c
#define CPLD_AROUTING_MIC2PHONE_BIT 0
#define CPLD_AROUTING_PHONE2INT_BIT 1
#define CPLD_AROUTING_PHONE2EXT_BIT 2
#define CPLD_AROUTING_LOONL2INT_BIT 3
#define CPLD_AROUTING_LOONL2EXT_BIT 4
#define CPLD_AROUTING_LOONR2PHONE_BIT 5
#define CPLD_AROUTING_LOONR2INT_BIT 6
#define CPLD_AROUTING_LOONR2EXT_BIT 7
extern int balloon3_has(enum balloon3_features feature);
#endif

6
arch/arm/mach-pxa/include/mach/colibri.h
View file

@ -23,6 +23,12 @@ static inline void colibri_pxa3xx_init_lcd(int bl_pin) {}
extern void colibri_pxa3xx_init_eth(struct ax_plat_data *plat_data);
#endif
#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
extern void colibri_pxa3xx_init_nand(void);
#else
static inline void colibri_pxa3xx_init_nand(void) {}
#endif
/* physical memory regions */
#define COLIBRI_SDRAM_BASE 0xa0000000 /* SDRAM region */

27
arch/arm/mach-pxa/include/mach/entry-macro.S
View file

@ -24,34 +24,27 @@
mov \tmp, \tmp, lsr #13
and \tmp, \tmp, #0x7 @ Core G
cmp \tmp, #1
bhi 1004f
bhi 1002f
@ Core Generation 1 (PXA25x)
mov \base, #io_p2v(0x40000000) @ IIR Ctl = 0x40d00000
add \base, \base, #0x00d00000
ldr \irqstat, [\base, #0] @ ICIP
ldr \irqnr, [\base, #4] @ ICMR
b 1002f
1004:
mrc p6, 0, \irqstat, c6, c0, 0 @ ICIP2
mrc p6, 0, \irqnr, c7, c0, 0 @ ICMR2
ands \irqnr, \irqstat, \irqnr
beq 1003f
rsb \irqstat, \irqnr, #0
and \irqstat, \irqstat, \irqnr
clz \irqnr, \irqstat
rsb \irqnr, \irqnr, #31
add \irqnr, \irqnr, #(32 + PXA_IRQ(0))
b 1001f
1003:
mrc p6, 0, \irqstat, c0, c0, 0 @ ICIP
mrc p6, 0, \irqnr, c1, c0, 0 @ ICMR
1002:
ands \irqnr, \irqstat, \irqnr
beq 1001f
rsb \irqstat, \irqnr, #0
and \irqstat, \irqstat, \irqnr
clz \irqnr, \irqstat
rsb \irqnr, \irqnr, #(31 + PXA_IRQ(0))
b 1001f
1002:
@ Core Generation 2 (PXA27x) or Core Generation 3 (PXA3xx)
mrc p6, 0, \irqstat, c5, c0, 0 @ ICHP
tst \irqstat, #0x80000000
beq 1001f
bic \irqstat, \irqstat, #0x80000000
mov \irqnr, \irqstat, lsr #16
1001:
.endm

17
arch/arm/mach-pxa/include/mach/hardware.h
View file

@ -197,6 +197,16 @@
#define __cpu_is_pxa935(id) (0)
#endif
#ifdef CONFIG_CPU_PXA950
#define __cpu_is_pxa950(id) \
({ \
unsigned int _id = (id) >> 4 & 0xfff; \
id == 0x697; \
})
#else
#define __cpu_is_pxa950(id) (0)
#endif
#define cpu_is_pxa210() \
({ \
__cpu_is_pxa210(read_cpuid_id()); \
@ -249,6 +259,13 @@
__cpu_is_pxa935(id); \
})
#define cpu_is_pxa950() \
({ \
unsigned int id = read_cpuid(CPUID_ID); \
__cpu_is_pxa950(id); \
})
/*
* CPUID Core Generation Bit
* <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x

2
arch/arm/mach-pxa/include/mach/irda.h
View file

@ -12,6 +12,8 @@ struct pxaficp_platform_data {
void (*transceiver_mode)(struct device *dev, int mode);
int (*startup)(struct device *dev);
void (*shutdown)(struct device *dev);
int gpio_pwdown; /* powerdown GPIO for the IrDA chip */
bool gpio_pwdown_inverted; /* gpio_pwdown is inverted */
};
extern void pxa_set_ficp_info(struct pxaficp_platform_data *info);

42
arch/arm/mach-pxa/include/mach/irqs.h
View file

@ -68,9 +68,10 @@
#ifdef CONFIG_PXA3xx
#define IRQ_SSP4 PXA_IRQ(13) /* SSP4 service request */
#define IRQ_CIR PXA_IRQ(34) /* Consumer IR */
#define IRQ_COMM_WDT PXA_IRQ(35) /* Comm WDT interrupt */
#define IRQ_TSI PXA_IRQ(36) /* Touch Screen Interface (PXA320) */
#define IRQ_USIM2 PXA_IRQ(38) /* USIM2 Controller */
#define IRQ_GRPHICS PXA_IRQ(39) /* Graphics Controller */
#define IRQ_GCU PXA_IRQ(39) /* Graphics Controller */
#define IRQ_MMC2 PXA_IRQ(41) /* MMC2 Controller */
#define IRQ_1WIRE PXA_IRQ(44) /* 1-Wire Controller */
#define IRQ_NAND PXA_IRQ(45) /* NAND Controller */
@ -81,8 +82,31 @@
#define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */
#endif
#define PXA_GPIO_IRQ_BASE PXA_IRQ(64)
#define PXA_GPIO_IRQ_NUM (128)
#ifdef CONFIG_CPU_PXA935
#define IRQ_U2O PXA_IRQ(64) /* USB OTG 2.0 Controller (PXA935) */
#define IRQ_U2H PXA_IRQ(65) /* USB Host 2.0 Controller (PXA935) */
#define IRQ_MMC3_PXA935 PXA_IRQ(72) /* MMC3 Controller (PXA935) */
#define IRQ_MMC4_PXA935 PXA_IRQ(73) /* MMC4 Controller (PXA935) */
#define IRQ_MMC5_PXA935 PXA_IRQ(74) /* MMC5 Controller (PXA935) */
#define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */
#endif
#ifdef CONFIG_CPU_PXA930
#define IRQ_ENHROT PXA_IRQ(37) /* Enhanced Rotary (PXA930) */
#define IRQ_ACIPC0 PXA_IRQ(5)
#define IRQ_ACIPC1 PXA_IRQ(40)
#define IRQ_ACIPC2 PXA_IRQ(19)
#define IRQ_TRKBALL PXA_IRQ(43) /* Track Ball */
#endif
#ifdef CONFIG_CPU_PXA950
#define IRQ_GC500 PXA_IRQ(70) /* Graphics Controller (PXA950) */
#endif
#define PXA_GPIO_IRQ_BASE PXA_IRQ(96)
#define PXA_GPIO_IRQ_NUM (192)
#define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x))
#define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))
@ -105,6 +129,8 @@
#define IRQ_BOARD_END (IRQ_BOARD_START + 70)
#elif defined(CONFIG_MACH_ZYLONITE)
#define IRQ_BOARD_END (IRQ_BOARD_START + 32)
#elif defined(CONFIG_PXA_EZX)
#define IRQ_BOARD_END (IRQ_BOARD_START + 23)
#else
#define IRQ_BOARD_END (IRQ_BOARD_START + 16)
#endif
@ -237,6 +263,16 @@
#define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14)
#define MAINSTONE_S1_IRQ MAINSTONE_IRQ(15)
/* Balloon3 Interrupts */
#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x))
#define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0)
#define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1)
#define BALLOON3_AUX_NIRQ IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ)
#define BALLOON3_CODEC_IRQ IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ)
#define BALLOON3_S0_CD_IRQ IRQ_GPIO(BALLOON3_GPIO_S0_CD)
/* LoCoMo Interrupts (CONFIG_SHARP_LOCOMO) */
#define IRQ_LOCOMO_KEY_BASE (IRQ_BOARD_START + 0)
#define IRQ_LOCOMO_GPIO_BASE (IRQ_BOARD_START + 1)

301
arch/arm/mach-pxa/include/mach/mfp.h
View file

@ -16,305 +16,6 @@
#ifndef __ASM_ARCH_MFP_H
#define __ASM_ARCH_MFP_H
#define mfp_to_gpio(m) ((m) % 128)
/* list of all the configurable MFP pins */
enum {
MFP_PIN_INVALID = -1,
MFP_PIN_GPIO0 = 0,
MFP_PIN_GPIO1,
MFP_PIN_GPIO2,
MFP_PIN_GPIO3,
MFP_PIN_GPIO4,
MFP_PIN_GPIO5,
MFP_PIN_GPIO6,
MFP_PIN_GPIO7,
MFP_PIN_GPIO8,
MFP_PIN_GPIO9,
MFP_PIN_GPIO10,
MFP_PIN_GPIO11,
MFP_PIN_GPIO12,
MFP_PIN_GPIO13,
MFP_PIN_GPIO14,
MFP_PIN_GPIO15,
MFP_PIN_GPIO16,
MFP_PIN_GPIO17,
MFP_PIN_GPIO18,
MFP_PIN_GPIO19,
MFP_PIN_GPIO20,
MFP_PIN_GPIO21,
MFP_PIN_GPIO22,
MFP_PIN_GPIO23,
MFP_PIN_GPIO24,
MFP_PIN_GPIO25,
MFP_PIN_GPIO26,
MFP_PIN_GPIO27,
MFP_PIN_GPIO28,
MFP_PIN_GPIO29,
MFP_PIN_GPIO30,
MFP_PIN_GPIO31,
MFP_PIN_GPIO32,
MFP_PIN_GPIO33,
MFP_PIN_GPIO34,
MFP_PIN_GPIO35,
MFP_PIN_GPIO36,
MFP_PIN_GPIO37,
MFP_PIN_GPIO38,
MFP_PIN_GPIO39,
MFP_PIN_GPIO40,
MFP_PIN_GPIO41,
MFP_PIN_GPIO42,
MFP_PIN_GPIO43,
MFP_PIN_GPIO44,
MFP_PIN_GPIO45,
MFP_PIN_GPIO46,
MFP_PIN_GPIO47,
MFP_PIN_GPIO48,
MFP_PIN_GPIO49,
MFP_PIN_GPIO50,
MFP_PIN_GPIO51,
MFP_PIN_GPIO52,
MFP_PIN_GPIO53,
MFP_PIN_GPIO54,
MFP_PIN_GPIO55,
MFP_PIN_GPIO56,
MFP_PIN_GPIO57,
MFP_PIN_GPIO58,
MFP_PIN_GPIO59,
MFP_PIN_GPIO60,
MFP_PIN_GPIO61,
MFP_PIN_GPIO62,
MFP_PIN_GPIO63,
MFP_PIN_GPIO64,
MFP_PIN_GPIO65,
MFP_PIN_GPIO66,
MFP_PIN_GPIO67,
MFP_PIN_GPIO68,
MFP_PIN_GPIO69,
MFP_PIN_GPIO70,
MFP_PIN_GPIO71,
MFP_PIN_GPIO72,
MFP_PIN_GPIO73,
MFP_PIN_GPIO74,
MFP_PIN_GPIO75,
MFP_PIN_GPIO76,
MFP_PIN_GPIO77,
MFP_PIN_GPIO78,
MFP_PIN_GPIO79,
MFP_PIN_GPIO80,
MFP_PIN_GPIO81,
MFP_PIN_GPIO82,
MFP_PIN_GPIO83,
MFP_PIN_GPIO84,
MFP_PIN_GPIO85,
MFP_PIN_GPIO86,
MFP_PIN_GPIO87,
MFP_PIN_GPIO88,
MFP_PIN_GPIO89,
MFP_PIN_GPIO90,
MFP_PIN_GPIO91,
MFP_PIN_GPIO92,
MFP_PIN_GPIO93,
MFP_PIN_GPIO94,
MFP_PIN_GPIO95,
MFP_PIN_GPIO96,
MFP_PIN_GPIO97,
MFP_PIN_GPIO98,
MFP_PIN_GPIO99,
MFP_PIN_GPIO100,
MFP_PIN_GPIO101,
MFP_PIN_GPIO102,
MFP_PIN_GPIO103,
MFP_PIN_GPIO104,
MFP_PIN_GPIO105,
MFP_PIN_GPIO106,
MFP_PIN_GPIO107,
MFP_PIN_GPIO108,
MFP_PIN_GPIO109,
MFP_PIN_GPIO110,
MFP_PIN_GPIO111,
MFP_PIN_GPIO112,
MFP_PIN_GPIO113,
MFP_PIN_GPIO114,
MFP_PIN_GPIO115,
MFP_PIN_GPIO116,
MFP_PIN_GPIO117,
MFP_PIN_GPIO118,
MFP_PIN_GPIO119,
MFP_PIN_GPIO120,
MFP_PIN_GPIO121,
MFP_PIN_GPIO122,
MFP_PIN_GPIO123,
MFP_PIN_GPIO124,
MFP_PIN_GPIO125,
MFP_PIN_GPIO126,
MFP_PIN_GPIO127,
MFP_PIN_GPIO0_2,
MFP_PIN_GPIO1_2,
MFP_PIN_GPIO2_2,
MFP_PIN_GPIO3_2,
MFP_PIN_GPIO4_2,
MFP_PIN_GPIO5_2,
MFP_PIN_GPIO6_2,
MFP_PIN_GPIO7_2,
MFP_PIN_GPIO8_2,
MFP_PIN_GPIO9_2,
MFP_PIN_GPIO10_2,
MFP_PIN_GPIO11_2,
MFP_PIN_GPIO12_2,
MFP_PIN_GPIO13_2,
MFP_PIN_GPIO14_2,
MFP_PIN_GPIO15_2,
MFP_PIN_GPIO16_2,
MFP_PIN_GPIO17_2,
MFP_PIN_ULPI_STP,
MFP_PIN_ULPI_NXT,
MFP_PIN_ULPI_DIR,
MFP_PIN_nXCVREN,
MFP_PIN_DF_CLE_nOE,
MFP_PIN_DF_nADV1_ALE,
MFP_PIN_DF_SCLK_E,
MFP_PIN_DF_SCLK_S,
MFP_PIN_nBE0,
MFP_PIN_nBE1,
MFP_PIN_DF_nADV2_ALE,
MFP_PIN_DF_INT_RnB,
MFP_PIN_DF_nCS0,
MFP_PIN_DF_nCS1,
MFP_PIN_nLUA,
MFP_PIN_nLLA,
MFP_PIN_DF_nWE,
MFP_PIN_DF_ALE_nWE,
MFP_PIN_DF_nRE_nOE,
MFP_PIN_DF_ADDR0,
MFP_PIN_DF_ADDR1,
MFP_PIN_DF_ADDR2,
MFP_PIN_DF_ADDR3,
MFP_PIN_DF_IO0,
MFP_PIN_DF_IO1,
MFP_PIN_DF_IO2,
MFP_PIN_DF_IO3,
MFP_PIN_DF_IO4,
MFP_PIN_DF_IO5,
MFP_PIN_DF_IO6,
MFP_PIN_DF_IO7,
MFP_PIN_DF_IO8,
MFP_PIN_DF_IO9,
MFP_PIN_DF_IO10,
MFP_PIN_DF_IO11,
MFP_PIN_DF_IO12,
MFP_PIN_DF_IO13,
MFP_PIN_DF_IO14,
MFP_PIN_DF_IO15,
/* additional pins on PXA930 */
MFP_PIN_GSIM_UIO,
MFP_PIN_GSIM_UCLK,
MFP_PIN_GSIM_UDET,
MFP_PIN_GSIM_nURST,
MFP_PIN_PMIC_INT,
MFP_PIN_RDY,
MFP_PIN_MAX,
};
/*
* a possible MFP configuration is represented by a 32-bit integer
*
* bit 0.. 9 - MFP Pin Number (1024 Pins Maximum)
* bit 10..12 - Alternate Function Selection
* bit 13..15 - Drive Strength
* bit 16..18 - Low Power Mode State
* bit 19..20 - Low Power Mode Edge Detection
* bit 21..22 - Run Mode Pull State
*
* to facilitate the definition, the following macros are provided
*
* MFP_CFG_DEFAULT - default MFP configuration value, with
* alternate function = 0,
* drive strength = fast 3mA (MFP_DS03X)
* low power mode = default
* edge detection = none
*
* MFP_CFG - default MFPR value with alternate function
* MFP_CFG_DRV - default MFPR value with alternate function and
* pin drive strength
* MFP_CFG_LPM - default MFPR value with alternate function and
* low power mode
* MFP_CFG_X - default MFPR value with alternate function,
* pin drive strength and low power mode
*/
typedef unsigned long mfp_cfg_t;
#define MFP_PIN(x) ((x) & 0x3ff)
#define MFP_AF0 (0x0 << 10)
#define MFP_AF1 (0x1 << 10)
#define MFP_AF2 (0x2 << 10)
#define MFP_AF3 (0x3 << 10)
#define MFP_AF4 (0x4 << 10)
#define MFP_AF5 (0x5 << 10)
#define MFP_AF6 (0x6 << 10)
#define MFP_AF7 (0x7 << 10)
#define MFP_AF_MASK (0x7 << 10)
#define MFP_AF(x) (((x) >> 10) & 0x7)
#define MFP_DS01X (0x0 << 13)
#define MFP_DS02X (0x1 << 13)
#define MFP_DS03X (0x2 << 13)
#define MFP_DS04X (0x3 << 13)
#define MFP_DS06X (0x4 << 13)
#define MFP_DS08X (0x5 << 13)
#define MFP_DS10X (0x6 << 13)
#define MFP_DS13X (0x7 << 13)
#define MFP_DS_MASK (0x7 << 13)
#define MFP_DS(x) (((x) >> 13) & 0x7)
#define MFP_LPM_DEFAULT (0x0 << 16)
#define MFP_LPM_DRIVE_LOW (0x1 << 16)
#define MFP_LPM_DRIVE_HIGH (0x2 << 16)
#define MFP_LPM_PULL_LOW (0x3 << 16)
#define MFP_LPM_PULL_HIGH (0x4 << 16)
#define MFP_LPM_FLOAT (0x5 << 16)
#define MFP_LPM_INPUT (0x6 << 16)
#define MFP_LPM_STATE_MASK (0x7 << 16)
#define MFP_LPM_STATE(x) (((x) >> 16) & 0x7)
#define MFP_LPM_EDGE_NONE (0x0 << 19)
#define MFP_LPM_EDGE_RISE (0x1 << 19)
#define MFP_LPM_EDGE_FALL (0x2 << 19)
#define MFP_LPM_EDGE_BOTH (0x3 << 19)
#define MFP_LPM_EDGE_MASK (0x3 << 19)
#define MFP_LPM_EDGE(x) (((x) >> 19) & 0x3)
#define MFP_PULL_NONE (0x0 << 21)
#define MFP_PULL_LOW (0x1 << 21)
#define MFP_PULL_HIGH (0x2 << 21)
#define MFP_PULL_BOTH (0x3 << 21)
#define MFP_PULL_MASK (0x3 << 21)
#define MFP_PULL(x) (((x) >> 21) & 0x3)
#define MFP_CFG_DEFAULT (MFP_AF0 | MFP_DS03X | MFP_LPM_DEFAULT |\
MFP_LPM_EDGE_NONE | MFP_PULL_NONE)
#define MFP_CFG(pin, af) \
((MFP_CFG_DEFAULT & ~MFP_AF_MASK) |\
(MFP_PIN(MFP_PIN_##pin) | MFP_##af))
#define MFP_CFG_DRV(pin, af, drv) \
((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK)) |\
(MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv))
#define MFP_CFG_LPM(pin, af, lpm) \
((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_LPM_STATE_MASK)) |\
(MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_LPM_##lpm))
#define MFP_CFG_X(pin, af, drv, lpm) \
((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK | MFP_LPM_STATE_MASK)) |\
(MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv | MFP_LPM_##lpm))
#include <plat/mfp.h>
#endif /* __ASM_ARCH_MFP_H */

5
arch/arm/mach-pxa/include/mach/mmc.h
View file

@ -14,6 +14,11 @@ struct pxamci_platform_data {
int (*get_ro)(struct device *);
void (*setpower)(struct device *, unsigned int);
void (*exit)(struct device *, void *);
int gpio_card_detect; /* gpio detecting card insertion */
int gpio_card_ro; /* gpio detecting read only toggle */
bool gpio_card_ro_invert; /* gpio ro is inverted */
int gpio_power; /* gpio powering up MMC bus */
bool gpio_power_invert; /* gpio power is inverted */
};
extern void pxa_set_mci_info(struct pxamci_platform_data *info);

86
arch/arm/mach-pxa/include/mach/palmtc.h Normal file
View file

@ -0,0 +1,86 @@
/*
* linux/include/asm-arm/arch-pxa/palmtc-gpio.h
*
* GPIOs and interrupts for Palm Tungsten|C Handheld Computer
*
* Authors: Alex Osborne <bobofdoom@gmail.com>
* Marek Vasut <marek.vasut@gmail.com>
* Holger Bocklet <bitz.email@gmx.net>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#ifndef _INCLUDE_PALMTC_H_
#define _INCLUDE_PALMTC_H_
/** HERE ARE GPIOs **/
/* GPIOs */
#define GPIO_NR_PALMTC_EARPHONE_DETECT 2
#define GPIO_NR_PALMTC_CRADLE_DETECT 5
#define GPIO_NR_PALMTC_HOTSYNC_BUTTON 7
/* SD/MMC */
#define GPIO_NR_PALMTC_SD_DETECT_N 12
#define GPIO_NR_PALMTC_SD_POWER 32
#define GPIO_NR_PALMTC_SD_READONLY 54
/* WLAN */
#define GPIO_NR_PALMTC_PCMCIA_READY 13
#define GPIO_NR_PALMTC_PCMCIA_PWRREADY 14
#define GPIO_NR_PALMTC_PCMCIA_POWER1 15
#define GPIO_NR_PALMTC_PCMCIA_POWER2 33
#define GPIO_NR_PALMTC_PCMCIA_POWER3 55
#define GPIO_NR_PALMTC_PCMCIA_RESET 78
/* UDC */
#define GPIO_NR_PALMTC_USB_DETECT_N 4
#define GPIO_NR_PALMTC_USB_POWER 36
/* LCD/BACKLIGHT */
#define GPIO_NR_PALMTC_BL_POWER 16
#define GPIO_NR_PALMTC_LCD_POWER 44
#define GPIO_NR_PALMTC_LCD_BLANK 38
/* UART */
#define GPIO_NR_PALMTC_RS232_POWER 37
/* IRDA */
#define GPIO_NR_PALMTC_IR_DISABLE 45
/* IRQs */
#define IRQ_GPIO_PALMTC_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMTC_SD_DETECT_N)
#define IRQ_GPIO_PALMTC_WLAN_READY IRQ_GPIO(GPIO_NR_PALMTC_WLAN_READY)
/* UCB1400 GPIOs */
#define GPIO_NR_PALMTC_POWER_DETECT (0x80 | 0x00)
#define GPIO_NR_PALMTC_HEADPHONE_DETECT (0x80 | 0x01)
#define GPIO_NR_PALMTC_SPEAKER_ENABLE (0x80 | 0x03)
#define GPIO_NR_PALMTC_VIBRA_POWER (0x80 | 0x05)
#define GPIO_NR_PALMTC_LED_POWER (0x80 | 0x07)
/** HERE ARE INIT VALUES **/
#define PALMTC_UCB1400_GPIO_OFFSET 0x80
/* BATTERY */
#define PALMTC_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */
#define PALMTC_BAT_MIN_VOLTAGE 3550 /* 3.55V critical voltage */
#define PALMTC_BAT_MAX_CURRENT 0 /* unknokn */
#define PALMTC_BAT_MIN_CURRENT 0 /* unknown */
#define PALMTC_BAT_MAX_CHARGE 1 /* unknown */
#define PALMTC_BAT_MIN_CHARGE 1 /* unknown */
#define PALMTC_MAX_LIFE_MINS 240 /* on-life in minutes */
#define PALMTC_BAT_MEASURE_DELAY (HZ * 1)
/* BACKLIGHT */
#define PALMTC_MAX_INTENSITY 0xFE
#define PALMTC_DEFAULT_INTENSITY 0x7E
#define PALMTC_LIMIT_MASK 0x7F
#define PALMTC_PRESCALER 0x3F
#define PALMTC_PERIOD_NS 3500
#endif

5
arch/arm/mach-pxa/include/mach/palmtx.h
View file

@ -82,6 +82,11 @@
#define PALMTX_PHYS_FLASH_START PXA_CS0_PHYS /* ChipSelect 0 */
#define PALMTX_PHYS_NAND_START PXA_CS1_PHYS /* ChipSelect 1 */
#define PALMTX_NAND_ALE_PHYS (PALMTX_PHYS_NAND_START | (1 << 24))
#define PALMTX_NAND_CLE_PHYS (PALMTX_PHYS_NAND_START | (1 << 25))
#define PALMTX_NAND_ALE_VIRT 0xff100000
#define PALMTX_NAND_CLE_VIRT 0xff200000
/* TOUCHSCREEN */
#define AC97_LINK_FRAME 21

4
arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
View file

@ -208,7 +208,7 @@
#define CKEN_MVED 43 /* < MVED clock enable */
/* Note: GCU clock enable bit differs on PXA300/PXA310 and PXA320 */
#define PXA300_CKEN_GRAPHICS 42 /* Graphics controller clock enable */
#define PXA320_CKEN_GRAPHICS 7 /* Graphics controller clock enable */
#define CKEN_PXA300_GCU 42 /* Graphics controller clock enable */
#define CKEN_PXA320_GCU 7 /* Graphics controller clock enable */
#endif /* __ASM_ARCH_PXA3XX_REGS_H */

3
arch/arm/mach-pxa/include/mach/pxafb.h
View file

@ -118,7 +118,8 @@ struct pxafb_mach_info {
u_int fixed_modes:1,
cmap_inverse:1,
cmap_static:1,
unused:29;
acceleration_enabled:1,
unused:28;
/* The following should be defined in LCCR0
* LCCR0_Act or LCCR0_Pas Active or Passive

11
arch/arm/mach-pxa/include/mach/regs-intc.h
View file

@ -13,6 +13,7 @@
#define ICFP __REG(0x40D0000C) /* Interrupt Controller FIQ Pending Register */
#define ICPR __REG(0x40D00010) /* Interrupt Controller Pending Register */
#define ICCR __REG(0x40D00014) /* Interrupt Controller Control Register */
#define ICHP __REG(0x40D00018) /* Interrupt Controller Highest Priority Register */
#define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */
#define ICMR2 __REG(0x40D000A0) /* Interrupt Controller Mask Register 2 */
@ -20,4 +21,14 @@
#define ICFP2 __REG(0x40D000A8) /* Interrupt Controller FIQ Pending Register 2 */
#define ICPR2 __REG(0x40D000AC) /* Interrupt Controller Pending Register 2 */
#define ICIP3 __REG(0x40D00130) /* Interrupt Controller IRQ Pending Register 3 */
#define ICMR3 __REG(0x40D00134) /* Interrupt Controller Mask Register 3 */
#define ICLR3 __REG(0x40D00138) /* Interrupt Controller Level Register 3 */
#define ICFP3 __REG(0x40D0013C) /* Interrupt Controller FIQ Pending Register 3 */
#define ICPR3 __REG(0x40D00140) /* Interrupt Controller Pending Register 3 */
#define IPR(x) __REG(0x40D0001C + (x < 32 ? (x << 2) \
: (x < 64 ? (0x94 + ((x - 32) << 2)) \
: (0x128 + ((x - 64) << 2)))))
#endif /* __ASM_MACH_REGS_INTC_H */

2
arch/arm/mach-pxa/include/mach/uncompress.h
View file

@ -37,7 +37,7 @@ static inline void arch_decomp_setup(void)
{
if (machine_is_littleton() || machine_is_intelmote2()
|| machine_is_csb726() || machine_is_stargate2()
|| machine_is_cm_x300())
|| machine_is_cm_x300() || machine_is_balloon3())
UART = STUART;
}

8
arch/arm/mach-pxa/irq.c
View file

@ -120,7 +120,7 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn)
void __init pxa_init_irq(int irq_nr, set_wake_t fn)
{
int irq;
int irq, i;
pxa_internal_irq_nr = irq_nr;
@ -129,6 +129,12 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
_ICLR(irq) = 0; /* all IRQs are IRQ, not FIQ */
}
/* initialize interrupt priority */
if (cpu_is_pxa27x() || cpu_is_pxa3xx()) {
for (i = 0; i < irq_nr; i++)
IPR(i) = i | (1 << 31);
}
/* only unmasked interrupts kick us out of idle */
ICCR = 1;

43
arch/arm/mach-pxa/littleton.c
View file

@ -265,45 +265,12 @@ static inline void littleton_init_keypad(void) {}
#endif
#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
static int littleton_mci_init(struct device *dev,
irq_handler_t littleton_detect_int, void *data)
{
int err, gpio_cd = GPIO_MMC1_CARD_DETECT;
err = gpio_request(gpio_cd, "mmc card detect");
if (err)
goto err_request_cd;
gpio_direction_input(gpio_cd);
err = request_irq(gpio_to_irq(gpio_cd), littleton_detect_int,
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
"mmc card detect", data);
if (err) {
dev_err(dev, "failed to request card detect IRQ\n");
goto err_request_irq;
}
return 0;
err_request_irq:
gpio_free(gpio_cd);
err_request_cd:
return err;
}
static void littleton_mci_exit(struct device *dev, void *data)
{
int gpio_cd = GPIO_MMC1_CARD_DETECT;
free_irq(gpio_to_irq(gpio_cd), data);
gpio_free(gpio_cd);
}
static struct pxamci_platform_data littleton_mci_platform_data = {
.detect_delay = 20,
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.init = littleton_mci_init,
.exit = littleton_mci_exit,
.detect_delay = 20,
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.gpio_card_detect = GPIO_MMC1_CARD_DETECT,
.gpio_card_ro = -1,
.gpio_power = -1,
};
static void __init littleton_init_mmc(void)

18
arch/arm/mach-pxa/lubbock.c
View file

@ -482,11 +482,14 @@ static void lubbock_mci_exit(struct device *dev, void *data)
}
static struct pxamci_platform_data lubbock_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.detect_delay = 1,
.init = lubbock_mci_init,
.get_ro = lubbock_mci_get_ro,
.exit = lubbock_mci_exit,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.detect_delay = 1,
.init = lubbock_mci_init,
.get_ro = lubbock_mci_get_ro,
.exit = lubbock_mci_exit,
.gpio_card_detect = -1,
.gpio_card_ro = -1,
.gpio_power = -1,
};
static void lubbock_irda_transceiver_mode(struct device *dev, int mode)
@ -504,8 +507,9 @@ static void lubbock_irda_transceiver_mode(struct device *dev, int mode)
}
static struct pxaficp_platform_data lubbock_ficp_platform_data = {
.transceiver_cap = IR_SIRMODE | IR_FIRMODE,
.transceiver_mode = lubbock_irda_transceiver_mode,
.gpio_pwdown = -1,
.transceiver_cap = IR_SIRMODE | IR_FIRMODE,
.transceiver_mode = lubbock_irda_transceiver_mode,
};
static void __init lubbock_init(void)

59
arch/arm/mach-pxa/magician.c
View file

@ -140,15 +140,9 @@ static unsigned long magician_pin_config[] __initdata = {
* IRDA
*/
static void magician_irda_transceiver_mode(struct device *dev, int mode)
{
gpio_set_value(GPIO83_MAGICIAN_nIR_EN, mode & IR_OFF);
pxa2xx_transceiver_mode(dev, mode);
}
static struct pxaficp_platform_data magician_ficp_info = {
.transceiver_cap = IR_SIRMODE | IR_OFF,
.transceiver_mode = magician_irda_transceiver_mode,
.gpio_pwdown = GPIO83_MAGICIAN_nIR_EN,
.transceiver_cap = IR_SIRMODE | IR_OFF,
};
/*
@ -651,55 +645,24 @@ static struct platform_device bq24022 = {
static int magician_mci_init(struct device *dev,
irq_handler_t detect_irq, void *data)
{
int err;
err = request_irq(IRQ_MAGICIAN_SD, detect_irq,
return request_irq(IRQ_MAGICIAN_SD, detect_irq,
IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
"MMC card detect", data);
if (err)
goto err_request_irq;
err = gpio_request(EGPIO_MAGICIAN_SD_POWER, "SD_POWER");
if (err)
goto err_request_power;
err = gpio_request(EGPIO_MAGICIAN_nSD_READONLY, "nSD_READONLY");
if (err)
goto err_request_readonly;
return 0;
err_request_readonly:
gpio_free(EGPIO_MAGICIAN_SD_POWER);
err_request_power:
free_irq(IRQ_MAGICIAN_SD, data);
err_request_irq:
return err;
}
static void magician_mci_setpower(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data *pdata = dev->platform_data;
gpio_set_value(EGPIO_MAGICIAN_SD_POWER, (1 << vdd) & pdata->ocr_mask);
}
static int magician_mci_get_ro(struct device *dev)
{
return (!gpio_get_value(EGPIO_MAGICIAN_nSD_READONLY));
"mmc card detect", data);
}
static void magician_mci_exit(struct device *dev, void *data)
{
gpio_free(EGPIO_MAGICIAN_nSD_READONLY);
gpio_free(EGPIO_MAGICIAN_SD_POWER);
free_irq(IRQ_MAGICIAN_SD, data);
}
static struct pxamci_platform_data magician_mci_info = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = magician_mci_init,
.get_ro = magician_mci_get_ro,
.setpower = magician_mci_setpower,
.exit = magician_mci_exit,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = magician_mci_init,
.exit = magician_mci_exit,
.gpio_card_detect = -1,
.gpio_card_ro = EGPIO_MAGICIAN_nSD_READONLY,
.gpio_card_ro_invert = 1,
.gpio_power = EGPIO_MAGICIAN_SD_POWER,
};

16
arch/arm/mach-pxa/mainstone.c
View file

@ -450,10 +450,13 @@ static void mainstone_mci_exit(struct device *dev, void *data)
}
static struct pxamci_platform_data mainstone_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = mainstone_mci_init,
.setpower = mainstone_mci_setpower,
.exit = mainstone_mci_exit,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = mainstone_mci_init,
.setpower = mainstone_mci_setpower,
.exit = mainstone_mci_exit,
.gpio_card_detect = -1,
.gpio_card_ro = -1,
.gpio_power = -1,
};
static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
@ -476,8 +479,9 @@ static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
}
static struct pxaficp_platform_data mainstone_ficp_platform_data = {
.transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
.transceiver_mode = mainstone_irda_transceiver_mode,
.gpio_pwdown = -1,
.transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
.transceiver_mode = mainstone_irda_transceiver_mode,
};
static struct gpio_keys_button gpio_keys_button[] = {

84
arch/arm/mach-pxa/mioa701.c
View file

@ -434,72 +434,15 @@ struct gpio_vbus_mach_info gpio_vbus_data = {
/*
* SDIO/MMC Card controller
*/
static void mci_setpower(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data *p_d = dev->platform_data;
if ((1 << vdd) & p_d->ocr_mask)
gpio_set_value(GPIO91_SDIO_EN, 1); /* enable SDIO power */
else
gpio_set_value(GPIO91_SDIO_EN, 0); /* disable SDIO power */
}
static int mci_get_ro(struct device *dev)
{
return gpio_get_value(GPIO78_SDIO_RO);
}
struct gpio_ress mci_gpios[] = {
MIO_GPIO_IN(GPIO78_SDIO_RO, "SDIO readonly detect"),
MIO_GPIO_IN(GPIO15_SDIO_INSERT, "SDIO insertion detect"),
MIO_GPIO_OUT(GPIO91_SDIO_EN, 0, "SDIO power enable")
};
static void mci_exit(struct device *dev, void *data)
{
mio_gpio_free(ARRAY_AND_SIZE(mci_gpios));
free_irq(gpio_to_irq(GPIO15_SDIO_INSERT), data);
}
static struct pxamci_platform_data mioa701_mci_info;
/**
* The card detect interrupt isn't debounced so we delay it by 250ms
* to give the card a chance to fully insert/eject.
*/
static int mci_init(struct device *dev, irq_handler_t detect_int, void *data)
{
int rc;
int irq = gpio_to_irq(GPIO15_SDIO_INSERT);
rc = mio_gpio_request(ARRAY_AND_SIZE(mci_gpios));
if (rc)
goto err_gpio;
/* enable RE/FE interrupt on card insertion and removal */
rc = request_irq(irq, detect_int,
IRQF_DISABLED | IRQF_TRIGGER_RISING |
IRQF_TRIGGER_FALLING,
"MMC card detect", data);
if (rc)
goto err_irq;
mioa701_mci_info.detect_delay = msecs_to_jiffies(250);
return 0;
err_irq:
dev_err(dev, "mioa701_mci_init: MMC/SD:"
" can't request MMC card detect IRQ\n");
mio_gpio_free(ARRAY_AND_SIZE(mci_gpios));
err_gpio:
return rc;
}
static struct pxamci_platform_data mioa701_mci_info = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.init = mci_init,
.get_ro = mci_get_ro,
.setpower = mci_setpower,
.exit = mci_exit,
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.gpio_card_detect = GPIO15_SDIO_INSERT,
.gpio_card_ro = GPIO78_SDIO_RO,
.gpio_power = GPIO91_SDIO_EN,
};
/* FlashRAM */
@ -765,19 +708,20 @@ static struct i2c_board_info __initdata mioa701_pi2c_devices[] = {
},
};
static struct soc_camera_link iclink = {
.bus_id = 0, /* Must match id in pxa27x_device_camera in device.c */
};
/* Board I2C devices. */
static struct i2c_board_info __initdata mioa701_i2c_devices[] = {
{
/* Must initialize before the camera(s) */
I2C_BOARD_INFO("mt9m111", 0x5d),
.platform_data = &iclink,
},
};
static struct soc_camera_link iclink = {
.bus_id = 0, /* Match id in pxa27x_device_camera in device.c */
.board_info = &mioa701_i2c_devices[0],
.i2c_adapter_id = 0,
.module_name = "mt9m111",
};
struct i2c_pxa_platform_data i2c_pdata = {
.fast_mode = 1,
};
@ -811,6 +755,7 @@ MIO_SIMPLE_DEV(pxa2xx_pcm, "pxa2xx-pcm", NULL)
MIO_SIMPLE_DEV(mioa701_sound, "mioa701-wm9713", NULL)
MIO_SIMPLE_DEV(mioa701_board, "mioa701-board", NULL)
MIO_SIMPLE_DEV(gpio_vbus, "gpio-vbus", &gpio_vbus_data);
MIO_SIMPLE_DEV(mioa701_camera, "soc-camera-pdrv",&iclink);
static struct platform_device *devices[] __initdata = {
&mioa701_gpio_keys,
@ -821,6 +766,7 @@ static struct platform_device *devices[] __initdata = {
&power_dev,
&strataflash,
&gpio_vbus,
&mioa701_camera,
&mioa701_board,
};
@ -841,7 +787,7 @@ static void mioa701_restart(char c, const char *cmd)
static struct gpio_ress global_gpios[] = {
MIO_GPIO_OUT(GPIO9_CHARGE_EN, 1, "Charger enable"),
MIO_GPIO_OUT(GPIO18_POWEROFF, 0, "Power Off"),
MIO_GPIO_OUT(GPIO87_LCD_POWER, 0, "LCD Power")
MIO_GPIO_OUT(GPIO87_LCD_POWER, 0, "LCD Power"),
};
static void __init mioa701_machine_init(void)
@ -855,6 +801,7 @@ static void __init mioa701_machine_init(void)
mio_gpio_request(ARRAY_AND_SIZE(global_gpios));
bootstrap_init();
set_pxa_fb_info(&mioa701_pxafb_info);
mioa701_mci_info.detect_delay = msecs_to_jiffies(250);
pxa_set_mci_info(&mioa701_mci_info);
pxa_set_keypad_info(&mioa701_keypad_info);
wm97xx_bat_set_pdata(&mioa701_battery_data);
@ -869,7 +816,6 @@ static void __init mioa701_machine_init(void)
pxa_set_i2c_info(&i2c_pdata);
pxa27x_set_i2c_power_info(NULL);
pxa_set_camera_info(&mioa701_pxacamera_platform_data);
i2c_register_board_info(0, ARRAY_AND_SIZE(mioa701_i2c_devices));
}
static void mioa701_machine_exit(void)

151
arch/arm/mach-pxa/palmld.c
View file

@ -25,6 +25,9 @@
#include <linux/wm97xx_batt.h>
#include <linux/power_supply.h>
#include <linux/sysdev.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -140,86 +143,51 @@ static unsigned long palmld_pin_config[] __initdata = {
GPIO13_GPIO, /* earphone detect */
};
/******************************************************************************
* NOR Flash
******************************************************************************/
static struct mtd_partition palmld_partitions[] = {
{
.name = "Flash",
.offset = 0x00000000,
.size = MTDPART_SIZ_FULL,
.mask_flags = 0
}
};
static struct physmap_flash_data palmld_flash_data[] = {
{
.width = 2, /* bankwidth in bytes */
.parts = palmld_partitions,
.nr_parts = ARRAY_SIZE(palmld_partitions)
}
};
static struct resource palmld_flash_resource = {
.start = PXA_CS0_PHYS,
.end = PXA_CS0_PHYS + SZ_4M - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device palmld_flash = {
.name = "physmap-flash",
.id = 0,
.resource = &palmld_flash_resource,
.num_resources = 1,
.dev = {
.platform_data = palmld_flash_data,
},
};
/******************************************************************************
* SD/MMC card controller
******************************************************************************/
static int palmld_mci_init(struct device *dev, irq_handler_t palmld_detect_int,
void *data)
{
int err = 0;
/* Setup an interrupt for detecting card insert/remove events */
err = gpio_request(GPIO_NR_PALMLD_SD_DETECT_N, "SD IRQ");
if (err)
goto err;
err = gpio_direction_input(GPIO_NR_PALMLD_SD_DETECT_N);
if (err)
goto err2;
err = request_irq(gpio_to_irq(GPIO_NR_PALMLD_SD_DETECT_N),
palmld_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
"SD/MMC card detect", data);
if (err) {
printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n",
__func__);
goto err2;
}
err = gpio_request(GPIO_NR_PALMLD_SD_POWER, "SD_POWER");
if (err)
goto err3;
err = gpio_direction_output(GPIO_NR_PALMLD_SD_POWER, 0);
if (err)
goto err4;
err = gpio_request(GPIO_NR_PALMLD_SD_READONLY, "SD_READONLY");
if (err)
goto err4;
err = gpio_direction_input(GPIO_NR_PALMLD_SD_READONLY);
if (err)
goto err5;
printk(KERN_DEBUG "%s: irq registered\n", __func__);
return 0;
err5:
gpio_free(GPIO_NR_PALMLD_SD_READONLY);
err4:
gpio_free(GPIO_NR_PALMLD_SD_POWER);
err3:
free_irq(gpio_to_irq(GPIO_NR_PALMLD_SD_DETECT_N), data);
err2:
gpio_free(GPIO_NR_PALMLD_SD_DETECT_N);
err:
return err;
}
static void palmld_mci_exit(struct device *dev, void *data)
{
gpio_free(GPIO_NR_PALMLD_SD_READONLY);
gpio_free(GPIO_NR_PALMLD_SD_POWER);
free_irq(gpio_to_irq(GPIO_NR_PALMLD_SD_DETECT_N), data);
gpio_free(GPIO_NR_PALMLD_SD_DETECT_N);
}
static void palmld_mci_power(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data *p_d = dev->platform_data;
gpio_set_value(GPIO_NR_PALMLD_SD_POWER, p_d->ocr_mask & (1 << vdd));
}
static int palmld_mci_get_ro(struct device *dev)
{
return gpio_get_value(GPIO_NR_PALMLD_SD_READONLY);
}
static struct pxamci_platform_data palmld_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.setpower = palmld_mci_power,
.get_ro = palmld_mci_get_ro,
.init = palmld_mci_init,
.exit = palmld_mci_exit,
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.gpio_card_detect = GPIO_NR_PALMLD_SD_DETECT_N,
.gpio_card_ro = GPIO_NR_PALMLD_SD_READONLY,
.gpio_power = GPIO_NR_PALMLD_SD_POWER,
.detect_delay = 20,
};
/******************************************************************************
@ -336,35 +304,9 @@ static struct platform_device palmld_backlight = {
/******************************************************************************
* IrDA
******************************************************************************/
static int palmld_irda_startup(struct device *dev)
{
int err;
err = gpio_request(GPIO_NR_PALMLD_IR_DISABLE, "IR DISABLE");
if (err)
goto err;
err = gpio_direction_output(GPIO_NR_PALMLD_IR_DISABLE, 1);
if (err)
gpio_free(GPIO_NR_PALMLD_IR_DISABLE);
err:
return err;
}
static void palmld_irda_shutdown(struct device *dev)
{
gpio_free(GPIO_NR_PALMLD_IR_DISABLE);
}
static void palmld_irda_transceiver_mode(struct device *dev, int mode)
{
gpio_set_value(GPIO_NR_PALMLD_IR_DISABLE, mode & IR_OFF);
pxa2xx_transceiver_mode(dev, mode);
}
static struct pxaficp_platform_data palmld_ficp_platform_data = {
.startup = palmld_irda_startup,
.shutdown = palmld_irda_shutdown,
.transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
.transceiver_mode = palmld_irda_transceiver_mode,
.gpio_pwdown = GPIO_NR_PALMLD_IR_DISABLE,
.transceiver_cap = IR_SIRMODE | IR_OFF,
};
/******************************************************************************
@ -560,6 +502,7 @@ static struct platform_device *devices[] __initdata = {
&power_supply,
&palmld_asoc,
&palmld_hdd,
&palmld_flash,
};
static struct map_desc palmld_io_desc[] __initdata = {

111
arch/arm/mach-pxa/palmt5.c
View file

@ -124,83 +124,12 @@ static unsigned long palmt5_pin_config[] __initdata = {
/******************************************************************************
* SD/MMC card controller
******************************************************************************/
static int palmt5_mci_init(struct device *dev, irq_handler_t palmt5_detect_int,
void *data)
{
int err = 0;
/* Setup an interrupt for detecting card insert/remove events */
err = gpio_request(GPIO_NR_PALMT5_SD_DETECT_N, "SD IRQ");
if (err)
goto err;
err = gpio_direction_input(GPIO_NR_PALMT5_SD_DETECT_N);
if (err)
goto err2;
err = request_irq(gpio_to_irq(GPIO_NR_PALMT5_SD_DETECT_N),
palmt5_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
"SD/MMC card detect", data);
if (err) {
printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n",
__func__);
goto err2;
}
err = gpio_request(GPIO_NR_PALMT5_SD_POWER, "SD_POWER");
if (err)
goto err3;
err = gpio_direction_output(GPIO_NR_PALMT5_SD_POWER, 0);
if (err)
goto err4;
err = gpio_request(GPIO_NR_PALMT5_SD_READONLY, "SD_READONLY");
if (err)
goto err4;
err = gpio_direction_input(GPIO_NR_PALMT5_SD_READONLY);
if (err)
goto err5;
printk(KERN_DEBUG "%s: irq registered\n", __func__);
return 0;
err5:
gpio_free(GPIO_NR_PALMT5_SD_READONLY);
err4:
gpio_free(GPIO_NR_PALMT5_SD_POWER);
err3:
free_irq(gpio_to_irq(GPIO_NR_PALMT5_SD_DETECT_N), data);
err2:
gpio_free(GPIO_NR_PALMT5_SD_DETECT_N);
err:
return err;
}
static void palmt5_mci_exit(struct device *dev, void *data)
{
gpio_free(GPIO_NR_PALMT5_SD_READONLY);
gpio_free(GPIO_NR_PALMT5_SD_POWER);
free_irq(IRQ_GPIO_PALMT5_SD_DETECT_N, data);
gpio_free(GPIO_NR_PALMT5_SD_DETECT_N);
}
static void palmt5_mci_power(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data *p_d = dev->platform_data;
gpio_set_value(GPIO_NR_PALMT5_SD_POWER, p_d->ocr_mask & (1 << vdd));
}
static int palmt5_mci_get_ro(struct device *dev)
{
return gpio_get_value(GPIO_NR_PALMT5_SD_READONLY);
}
static struct pxamci_platform_data palmt5_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.setpower = palmt5_mci_power,
.get_ro = palmt5_mci_get_ro,
.init = palmt5_mci_init,
.exit = palmt5_mci_exit,
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.gpio_card_detect = GPIO_NR_PALMT5_SD_DETECT_N,
.gpio_card_ro = GPIO_NR_PALMT5_SD_READONLY,
.gpio_power = GPIO_NR_PALMT5_SD_POWER,
.detect_delay = 20,
};
/******************************************************************************
@ -314,35 +243,9 @@ static struct platform_device palmt5_backlight = {
/******************************************************************************
* IrDA
******************************************************************************/
static int palmt5_irda_startup(struct device *dev)
{
int err;
err = gpio_request(GPIO_NR_PALMT5_IR_DISABLE, "IR DISABLE");
if (err)
goto err;
err = gpio_direction_output(GPIO_NR_PALMT5_IR_DISABLE, 1);
if (err)
gpio_free(GPIO_NR_PALMT5_IR_DISABLE);
err:
return err;
}
static void palmt5_irda_shutdown(struct device *dev)
{
gpio_free(GPIO_NR_PALMT5_IR_DISABLE);
}
static void palmt5_irda_transceiver_mode(struct device *dev, int mode)
{
gpio_set_value(GPIO_NR_PALMT5_IR_DISABLE, mode & IR_OFF);
pxa2xx_transceiver_mode(dev, mode);
}
static struct pxaficp_platform_data palmt5_ficp_platform_data = {
.startup = palmt5_irda_startup,
.shutdown = palmt5_irda_shutdown,
.transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
.transceiver_mode = palmt5_irda_transceiver_mode,
.gpio_pwdown = GPIO_NR_PALMT5_IR_DISABLE,
.transceiver_cap = IR_SIRMODE | IR_OFF,
};
/******************************************************************************

436
arch/arm/mach-pxa/palmtc.c Normal file
View file

@ -0,0 +1,436 @@
/*
* linux/arch/arm/mach-pxa/palmtc.c
*
* Support for the Palm Tungsten|C
*
* Author: Marek Vasut <marek.vasut@gmail.com>
*
* Based on work of:
* Petr Blaha <p3t3@centrum.cz>
* Chetan S. Kumar <shivakumar.chetan@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/input.h>
#include <linux/pwm_backlight.h>
#include <linux/gpio.h>
#include <linux/input/matrix_keypad.h>
#include <linux/ucb1400.h>
#include <linux/power_supply.h>
#include <linux/gpio_keys.h>
#include <linux/mtd/physmap.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/audio.h>
#include <mach/palmtc.h>
#include <mach/mmc.h>
#include <mach/pxafb.h>
#include <mach/mfp-pxa25x.h>
#include <mach/irda.h>
#include <mach/udc.h>
#include <mach/pxa2xx-regs.h>
#include "generic.h"
#include "devices.h"
/******************************************************************************
* Pin configuration
******************************************************************************/
static unsigned long palmtc_pin_config[] __initdata = {
/* MMC */
GPIO6_MMC_CLK,
GPIO8_MMC_CS0,
GPIO12_GPIO, /* detect */
GPIO32_GPIO, /* power */
GPIO54_GPIO, /* r/o switch */
/* PCMCIA */
GPIO52_nPCE_1,
GPIO53_nPCE_2,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO49_nPWE,
GPIO48_nPOE,
GPIO52_nPCE_1,
GPIO53_nPCE_2,
GPIO57_nIOIS16,
GPIO56_nPWAIT,
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
/* IrDA */
GPIO45_GPIO, /* ir disable */
GPIO46_FICP_RXD,
GPIO47_FICP_TXD,
/* PWM */
GPIO17_PWM1_OUT,
/* USB */
GPIO4_GPIO, /* detect */
GPIO36_GPIO, /* pullup */
/* LCD */
GPIO58_LCD_LDD_0,
GPIO59_LCD_LDD_1,
GPIO60_LCD_LDD_2,
GPIO61_LCD_LDD_3,
GPIO62_LCD_LDD_4,
GPIO63_LCD_LDD_5,
GPIO64_LCD_LDD_6,
GPIO65_LCD_LDD_7,
GPIO66_LCD_LDD_8,
GPIO67_LCD_LDD_9,
GPIO68_LCD_LDD_10,
GPIO69_LCD_LDD_11,
GPIO70_LCD_LDD_12,
GPIO71_LCD_LDD_13,
GPIO72_LCD_LDD_14,
GPIO73_LCD_LDD_15,
GPIO74_LCD_FCLK,
GPIO75_LCD_LCLK,
GPIO76_LCD_PCLK,
GPIO77_LCD_BIAS,
/* MATRIX KEYPAD */
GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH, /* in 0 */
GPIO9_GPIO | WAKEUP_ON_EDGE_BOTH, /* in 1 */
GPIO10_GPIO | WAKEUP_ON_EDGE_BOTH, /* in 2 */
GPIO11_GPIO | WAKEUP_ON_EDGE_BOTH, /* in 3 */
GPIO18_GPIO | MFP_LPM_DRIVE_LOW, /* out 0 */
GPIO19_GPIO | MFP_LPM_DRIVE_LOW, /* out 1 */
GPIO20_GPIO | MFP_LPM_DRIVE_LOW, /* out 2 */
GPIO21_GPIO | MFP_LPM_DRIVE_LOW, /* out 3 */
GPIO22_GPIO | MFP_LPM_DRIVE_LOW, /* out 4 */
GPIO23_GPIO | MFP_LPM_DRIVE_LOW, /* out 5 */
GPIO24_GPIO | MFP_LPM_DRIVE_LOW, /* out 6 */
GPIO25_GPIO | MFP_LPM_DRIVE_LOW, /* out 7 */
GPIO26_GPIO | MFP_LPM_DRIVE_LOW, /* out 8 */
GPIO27_GPIO | MFP_LPM_DRIVE_LOW, /* out 9 */
GPIO79_GPIO | MFP_LPM_DRIVE_LOW, /* out 10 */
GPIO80_GPIO | MFP_LPM_DRIVE_LOW, /* out 11 */
/* PXA GPIO KEYS */
GPIO7_GPIO | WAKEUP_ON_EDGE_BOTH, /* hotsync button on cradle */
/* MISC */
GPIO1_RST, /* reset */
GPIO2_GPIO, /* earphone detect */
GPIO16_GPIO, /* backlight switch */
};
/******************************************************************************
* SD/MMC card controller
******************************************************************************/
static struct pxamci_platform_data palmtc_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.gpio_power = GPIO_NR_PALMTC_SD_POWER,
.gpio_card_ro = GPIO_NR_PALMTC_SD_READONLY,
.gpio_card_detect = GPIO_NR_PALMTC_SD_DETECT_N,
.detect_delay = 20,
};
/******************************************************************************
* GPIO keys
******************************************************************************/
static struct gpio_keys_button palmtc_pxa_buttons[] = {
{KEY_F8, GPIO_NR_PALMTC_HOTSYNC_BUTTON, 1, "HotSync Button", EV_KEY, 1},
};
static struct gpio_keys_platform_data palmtc_pxa_keys_data = {
.buttons = palmtc_pxa_buttons,
.nbuttons = ARRAY_SIZE(palmtc_pxa_buttons),
};
static struct platform_device palmtc_pxa_keys = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &palmtc_pxa_keys_data,
},
};
/******************************************************************************
* Backlight
******************************************************************************/
static int palmtc_backlight_init(struct device *dev)
{
int ret;
ret = gpio_request(GPIO_NR_PALMTC_BL_POWER, "BL POWER");
if (ret)
goto err;
ret = gpio_direction_output(GPIO_NR_PALMTC_BL_POWER, 1);
if (ret)
goto err2;
return 0;
err2:
gpio_free(GPIO_NR_PALMTC_BL_POWER);
err:
return ret;
}
static int palmtc_backlight_notify(int brightness)
{
/* backlight is on when GPIO16 AF0 is high */
gpio_set_value(GPIO_NR_PALMTC_BL_POWER, brightness);
return brightness;
}
static void palmtc_backlight_exit(struct device *dev)
{
gpio_free(GPIO_NR_PALMTC_BL_POWER);
}
static struct platform_pwm_backlight_data palmtc_backlight_data = {
.pwm_id = 1,
.max_brightness = PALMTC_MAX_INTENSITY,
.dft_brightness = PALMTC_MAX_INTENSITY,
.pwm_period_ns = PALMTC_PERIOD_NS,
.init = palmtc_backlight_init,
.notify = palmtc_backlight_notify,
.exit = palmtc_backlight_exit,
};
static struct platform_device palmtc_backlight = {
.name = "pwm-backlight",
.dev = {
.parent = &pxa25x_device_pwm1.dev,
.platform_data = &palmtc_backlight_data,
},
};
/******************************************************************************
* IrDA
******************************************************************************/
static struct pxaficp_platform_data palmtc_ficp_platform_data = {
.gpio_pwdown = GPIO_NR_PALMTC_IR_DISABLE,
.transceiver_cap = IR_SIRMODE | IR_OFF,
};
/******************************************************************************
* Keyboard
******************************************************************************/
static const uint32_t palmtc_matrix_keys[] = {
KEY(0, 0, KEY_F1),
KEY(0, 1, KEY_X),
KEY(0, 2, KEY_POWER),
KEY(0, 3, KEY_TAB),
KEY(0, 4, KEY_A),
KEY(0, 5, KEY_Q),
KEY(0, 6, KEY_LEFTSHIFT),
KEY(0, 7, KEY_Z),
KEY(0, 8, KEY_S),
KEY(0, 9, KEY_W),
KEY(0, 10, KEY_E),
KEY(0, 11, KEY_UP),
KEY(1, 0, KEY_F2),
KEY(1, 1, KEY_DOWN),
KEY(1, 3, KEY_D),
KEY(1, 4, KEY_C),
KEY(1, 5, KEY_F),
KEY(1, 6, KEY_R),
KEY(1, 7, KEY_SPACE),
KEY(1, 8, KEY_V),
KEY(1, 9, KEY_G),
KEY(1, 10, KEY_T),
KEY(1, 11, KEY_LEFT),
KEY(2, 0, KEY_F3),
KEY(2, 1, KEY_LEFTCTRL),
KEY(2, 3, KEY_H),
KEY(2, 4, KEY_Y),
KEY(2, 5, KEY_N),
KEY(2, 6, KEY_J),
KEY(2, 7, KEY_U),
KEY(2, 8, KEY_M),
KEY(2, 9, KEY_K),
KEY(2, 10, KEY_I),
KEY(2, 11, KEY_RIGHT),
KEY(3, 0, KEY_F4),
KEY(3, 1, KEY_ENTER),
KEY(3, 3, KEY_DOT),
KEY(3, 4, KEY_L),
KEY(3, 5, KEY_O),
KEY(3, 6, KEY_LEFTALT),
KEY(3, 7, KEY_ENTER),
KEY(3, 8, KEY_BACKSPACE),
KEY(3, 9, KEY_P),
KEY(3, 10, KEY_B),
KEY(3, 11, KEY_FN),
};
const struct matrix_keymap_data palmtc_keymap_data = {
.keymap = palmtc_matrix_keys,
.keymap_size = ARRAY_SIZE(palmtc_matrix_keys),
};
const static unsigned int palmtc_keypad_row_gpios[] = {
0, 9, 10, 11
};
const static unsigned int palmtc_keypad_col_gpios[] = {
18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 79, 80
};
static struct matrix_keypad_platform_data palmtc_keypad_platform_data = {
.keymap_data = &palmtc_keymap_data,
.col_gpios = palmtc_keypad_row_gpios,
.num_col_gpios = 12,
.row_gpios = palmtc_keypad_col_gpios,
.num_row_gpios = 4,
.active_low = 1,
.debounce_ms = 20,
.col_scan_delay_us = 5,
};
static struct platform_device palmtc_keyboard = {
.name = "matrix-keypad",
.id = -1,
.dev = {
.platform_data = &palmtc_keypad_platform_data,
},
};
/******************************************************************************
* UDC
******************************************************************************/
static struct pxa2xx_udc_mach_info palmtc_udc_info __initdata = {
.gpio_vbus = GPIO_NR_PALMTC_USB_DETECT_N,
.gpio_vbus_inverted = 1,
.gpio_pullup = GPIO_NR_PALMTC_USB_POWER,
};
/******************************************************************************
* Touchscreen / Battery / GPIO-extender
******************************************************************************/
static struct platform_device palmtc_ucb1400_core = {
.name = "ucb1400_core",
.id = -1,
};
/******************************************************************************
* NOR Flash
******************************************************************************/
static struct resource palmtc_flash_resource = {
.start = PXA_CS0_PHYS,
.end = PXA_CS0_PHYS + SZ_16M - 1,
.flags = IORESOURCE_MEM,
};
static struct mtd_partition palmtc_flash_parts[] = {
{
.name = "U-Boot Bootloader",
.offset = 0x0,
.size = 0x40000,
},
{
.name = "Linux Kernel",
.offset = 0x40000,
.size = 0x2c0000,
},
{
.name = "Filesystem",
.offset = 0x300000,
.size = 0xcc0000,
},
{
.name = "U-Boot Environment",
.offset = 0xfc0000,
.size = MTDPART_SIZ_FULL,
},
};
static struct physmap_flash_data palmtc_flash_data = {
.width = 4,
.parts = palmtc_flash_parts,
.nr_parts = ARRAY_SIZE(palmtc_flash_parts),
};
static struct platform_device palmtc_flash = {
.name = "physmap-flash",
.id = -1,
.resource = &palmtc_flash_resource,
.num_resources = 1,
.dev = {
.platform_data = &palmtc_flash_data,
},
};
/******************************************************************************
* Framebuffer
******************************************************************************/
static struct pxafb_mode_info palmtc_lcd_modes[] = {
{
.pixclock = 115384,
.xres = 320,
.yres = 320,
.bpp = 16,
.left_margin = 27,
.right_margin = 7,
.upper_margin = 7,
.lower_margin = 8,
.hsync_len = 6,
.vsync_len = 1,
},
};
static struct pxafb_mach_info palmtc_lcd_screen = {
.modes = palmtc_lcd_modes,
.num_modes = ARRAY_SIZE(palmtc_lcd_modes),
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
};
/******************************************************************************
* Machine init
******************************************************************************/
static struct platform_device *devices[] __initdata = {
&palmtc_backlight,
&palmtc_ucb1400_core,
&palmtc_keyboard,
&palmtc_pxa_keys,
&palmtc_flash,
};
static void __init palmtc_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtc_pin_config));
set_pxa_fb_info(&palmtc_lcd_screen);
pxa_set_mci_info(&palmtc_mci_platform_data);
pxa_set_udc_info(&palmtc_udc_info);
pxa_set_ac97_info(NULL);
pxa_set_ficp_info(&palmtc_ficp_platform_data);
platform_add_devices(devices, ARRAY_SIZE(devices));
};
MACHINE_START(PALMTC, "Palm Tungsten|C")
.phys_io = 0x40000000,
.boot_params = 0xa0000100,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.map_io = pxa_map_io,
.init_irq = pxa25x_init_irq,
.timer = &pxa_timer,
.init_machine = palmtc_init
MACHINE_END

110
arch/arm/mach-pxa/palmte2.c
View file

@ -117,83 +117,11 @@ static unsigned long palmte2_pin_config[] __initdata = {
/******************************************************************************
* SD/MMC card controller
******************************************************************************/
static int palmte2_mci_init(struct device *dev,
irq_handler_t palmte2_detect_int, void *data)
{
int err = 0;
/* Setup an interrupt for detecting card insert/remove events */
err = gpio_request(GPIO_NR_PALMTE2_SD_DETECT_N, "SD IRQ");
if (err)
goto err;
err = gpio_direction_input(GPIO_NR_PALMTE2_SD_DETECT_N);
if (err)
goto err2;
err = request_irq(gpio_to_irq(GPIO_NR_PALMTE2_SD_DETECT_N),
palmte2_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
"SD/MMC card detect", data);
if (err) {
printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n",
__func__);
goto err2;
}
err = gpio_request(GPIO_NR_PALMTE2_SD_POWER, "SD_POWER");
if (err)
goto err3;
err = gpio_direction_output(GPIO_NR_PALMTE2_SD_POWER, 0);
if (err)
goto err4;
err = gpio_request(GPIO_NR_PALMTE2_SD_READONLY, "SD_READONLY");
if (err)
goto err4;
err = gpio_direction_input(GPIO_NR_PALMTE2_SD_READONLY);
if (err)
goto err5;
printk(KERN_DEBUG "%s: irq registered\n", __func__);
return 0;
err5:
gpio_free(GPIO_NR_PALMTE2_SD_READONLY);
err4:
gpio_free(GPIO_NR_PALMTE2_SD_POWER);
err3:
free_irq(gpio_to_irq(GPIO_NR_PALMTE2_SD_DETECT_N), data);
err2:
gpio_free(GPIO_NR_PALMTE2_SD_DETECT_N);
err:
return err;
}
static void palmte2_mci_exit(struct device *dev, void *data)
{
gpio_free(GPIO_NR_PALMTE2_SD_READONLY);
gpio_free(GPIO_NR_PALMTE2_SD_POWER);
free_irq(gpio_to_irq(GPIO_NR_PALMTE2_SD_DETECT_N), data);
gpio_free(GPIO_NR_PALMTE2_SD_DETECT_N);
}
static void palmte2_mci_power(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data *p_d = dev->platform_data;
gpio_set_value(GPIO_NR_PALMTE2_SD_POWER, p_d->ocr_mask & (1 << vdd));
}
static int palmte2_mci_get_ro(struct device *dev)
{
return gpio_get_value(GPIO_NR_PALMTE2_SD_READONLY);
}
static struct pxamci_platform_data palmte2_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.setpower = palmte2_mci_power,
.get_ro = palmte2_mci_get_ro,
.init = palmte2_mci_init,
.exit = palmte2_mci_exit,
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.gpio_card_detect = GPIO_NR_PALMTE2_SD_DETECT_N,
.gpio_card_ro = GPIO_NR_PALMTE2_SD_READONLY,
.gpio_power = GPIO_NR_PALMTE2_SD_POWER,
};
/******************************************************************************
@ -287,35 +215,9 @@ static struct platform_device palmte2_backlight = {
/******************************************************************************
* IrDA
******************************************************************************/
static int palmte2_irda_startup(struct device *dev)
{
int err;
err = gpio_request(GPIO_NR_PALMTE2_IR_DISABLE, "IR DISABLE");
if (err)
goto err;
err = gpio_direction_output(GPIO_NR_PALMTE2_IR_DISABLE, 1);
if (err)
gpio_free(GPIO_NR_PALMTE2_IR_DISABLE);
err:
return err;
}
static void palmte2_irda_shutdown(struct device *dev)
{
gpio_free(GPIO_NR_PALMTE2_IR_DISABLE);
}
static void palmte2_irda_transceiver_mode(struct device *dev, int mode)
{
gpio_set_value(GPIO_NR_PALMTE2_IR_DISABLE, mode & IR_OFF);
pxa2xx_transceiver_mode(dev, mode);
}
static struct pxaficp_platform_data palmte2_ficp_platform_data = {
.startup = palmte2_irda_startup,
.shutdown = palmte2_irda_shutdown,
.transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
.transceiver_mode = palmte2_irda_transceiver_mode,
.gpio_pwdown = GPIO_NR_PALMTE2_IR_DISABLE,
.transceiver_cap = IR_SIRMODE | IR_OFF,
};
/******************************************************************************

233
arch/arm/mach-pxa/palmtx.c
View file

@ -28,6 +28,10 @@
#include <linux/wm97xx_batt.h>
#include <linux/power_supply.h>
#include <linux/usb/gpio_vbus.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/physmap.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -131,92 +135,61 @@ static unsigned long palmtx_pin_config[] __initdata = {
GPIO34_FFUART_RXD,
GPIO39_FFUART_TXD,
/* NAND */
GPIO15_nCS_1,
GPIO18_RDY,
/* MISC. */
GPIO10_GPIO, /* hotsync button */
GPIO12_GPIO, /* power detect */
GPIO107_GPIO, /* earphone detect */
};
/******************************************************************************
* NOR Flash
******************************************************************************/
static struct mtd_partition palmtx_partitions[] = {
{
.name = "Flash",
.offset = 0x00000000,
.size = MTDPART_SIZ_FULL,
.mask_flags = 0
}
};
static struct physmap_flash_data palmtx_flash_data[] = {
{
.width = 2, /* bankwidth in bytes */
.parts = palmtx_partitions,
.nr_parts = ARRAY_SIZE(palmtx_partitions)
}
};
static struct resource palmtx_flash_resource = {
.start = PXA_CS0_PHYS,
.end = PXA_CS0_PHYS + SZ_8M - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device palmtx_flash = {
.name = "physmap-flash",
.id = 0,
.resource = &palmtx_flash_resource,
.num_resources = 1,
.dev = {
.platform_data = palmtx_flash_data,
},
};
/******************************************************************************
* SD/MMC card controller
******************************************************************************/
static int palmtx_mci_init(struct device *dev, irq_handler_t palmtx_detect_int,
void *data)
{
int err = 0;
/* Setup an interrupt for detecting card insert/remove events */
err = gpio_request(GPIO_NR_PALMTX_SD_DETECT_N, "SD IRQ");
if (err)
goto err;
err = gpio_direction_input(GPIO_NR_PALMTX_SD_DETECT_N);
if (err)
goto err2;
err = request_irq(gpio_to_irq(GPIO_NR_PALMTX_SD_DETECT_N),
palmtx_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
"SD/MMC card detect", data);
if (err) {
printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n",
__func__);
goto err2;
}
err = gpio_request(GPIO_NR_PALMTX_SD_POWER, "SD_POWER");
if (err)
goto err3;
err = gpio_direction_output(GPIO_NR_PALMTX_SD_POWER, 0);
if (err)
goto err4;
err = gpio_request(GPIO_NR_PALMTX_SD_READONLY, "SD_READONLY");
if (err)
goto err4;
err = gpio_direction_input(GPIO_NR_PALMTX_SD_READONLY);
if (err)
goto err5;
printk(KERN_DEBUG "%s: irq registered\n", __func__);
return 0;
err5:
gpio_free(GPIO_NR_PALMTX_SD_READONLY);
err4:
gpio_free(GPIO_NR_PALMTX_SD_POWER);
err3:
free_irq(gpio_to_irq(GPIO_NR_PALMTX_SD_DETECT_N), data);
err2:
gpio_free(GPIO_NR_PALMTX_SD_DETECT_N);
err:
return err;
}
static void palmtx_mci_exit(struct device *dev, void *data)
{
gpio_free(GPIO_NR_PALMTX_SD_READONLY);
gpio_free(GPIO_NR_PALMTX_SD_POWER);
free_irq(gpio_to_irq(GPIO_NR_PALMTX_SD_DETECT_N), data);
gpio_free(GPIO_NR_PALMTX_SD_DETECT_N);
}
static void palmtx_mci_power(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data *p_d = dev->platform_data;
gpio_set_value(GPIO_NR_PALMTX_SD_POWER, p_d->ocr_mask & (1 << vdd));
}
static int palmtx_mci_get_ro(struct device *dev)
{
return gpio_get_value(GPIO_NR_PALMTX_SD_READONLY);
}
static struct pxamci_platform_data palmtx_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.setpower = palmtx_mci_power,
.get_ro = palmtx_mci_get_ro,
.init = palmtx_mci_init,
.exit = palmtx_mci_exit,
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.gpio_card_detect = GPIO_NR_PALMTX_SD_DETECT_N,
.gpio_card_ro = GPIO_NR_PALMTX_SD_READONLY,
.gpio_power = GPIO_NR_PALMTX_SD_POWER,
.detect_delay = 20,
};
/******************************************************************************
@ -330,35 +303,9 @@ static struct platform_device palmtx_backlight = {
/******************************************************************************
* IrDA
******************************************************************************/
static int palmtx_irda_startup(struct device *dev)
{
int err;
err = gpio_request(GPIO_NR_PALMTX_IR_DISABLE, "IR DISABLE");
if (err)
goto err;
err = gpio_direction_output(GPIO_NR_PALMTX_IR_DISABLE, 1);
if (err)
gpio_free(GPIO_NR_PALMTX_IR_DISABLE);
err:
return err;
}
static void palmtx_irda_shutdown(struct device *dev)
{
gpio_free(GPIO_NR_PALMTX_IR_DISABLE);
}
static void palmtx_irda_transceiver_mode(struct device *dev, int mode)
{
gpio_set_value(GPIO_NR_PALMTX_IR_DISABLE, mode & IR_OFF);
pxa2xx_transceiver_mode(dev, mode);
}
static struct pxaficp_platform_data palmtx_ficp_platform_data = {
.startup = palmtx_irda_startup,
.shutdown = palmtx_irda_shutdown,
.transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
.transceiver_mode = palmtx_irda_transceiver_mode,
.gpio_pwdown = GPIO_NR_PALMTX_IR_DISABLE,
.transceiver_cap = IR_SIRMODE | IR_OFF,
};
/******************************************************************************
@ -492,6 +439,68 @@ static struct pxafb_mach_info palmtx_lcd_screen = {
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
};
/******************************************************************************
* NAND Flash
******************************************************************************/
static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd,
unsigned int ctrl)
{
struct nand_chip *this = mtd->priv;
unsigned long nandaddr = (unsigned long)this->IO_ADDR_W;
if (cmd == NAND_CMD_NONE)
return;
if (ctrl & NAND_CLE)
writeb(cmd, PALMTX_NAND_CLE_VIRT);
else if (ctrl & NAND_ALE)
writeb(cmd, PALMTX_NAND_ALE_VIRT);
else
writeb(cmd, nandaddr);
}
static struct mtd_partition palmtx_partition_info[] = {
[0] = {
.name = "palmtx-0",
.offset = 0,
.size = MTDPART_SIZ_FULL
},
};
static const char *palmtx_part_probes[] = { "cmdlinepart", NULL };
struct platform_nand_data palmtx_nand_platdata = {
.chip = {
.nr_chips = 1,
.chip_offset = 0,
.nr_partitions = ARRAY_SIZE(palmtx_partition_info),
.partitions = palmtx_partition_info,
.chip_delay = 20,
.part_probe_types = palmtx_part_probes,
},
.ctrl = {
.cmd_ctrl = palmtx_nand_cmd_ctl,
},
};
static struct resource palmtx_nand_resource[] = {
[0] = {
.start = PXA_CS1_PHYS,
.end = PXA_CS1_PHYS + SZ_1M - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device palmtx_nand = {
.name = "gen_nand",
.num_resources = ARRAY_SIZE(palmtx_nand_resource),
.resource = palmtx_nand_resource,
.id = -1,
.dev = {
.platform_data = &palmtx_nand_platdata,
}
};
/******************************************************************************
* Power management - standby
******************************************************************************/
@ -518,6 +527,8 @@ static struct platform_device *devices[] __initdata = {
&power_supply,
&palmtx_asoc,
&palmtx_gpio_vbus,
&palmtx_flash,
&palmtx_nand,
};
static struct map_desc palmtx_io_desc[] __initdata = {
@ -525,8 +536,18 @@ static struct map_desc palmtx_io_desc[] __initdata = {
.virtual = PALMTX_PCMCIA_VIRT,
.pfn = __phys_to_pfn(PALMTX_PCMCIA_PHYS),
.length = PALMTX_PCMCIA_SIZE,
.type = MT_DEVICE
},
.type = MT_DEVICE,
}, {
.virtual = PALMTX_NAND_ALE_VIRT,
.pfn = __phys_to_pfn(PALMTX_NAND_ALE_PHYS),
.length = SZ_1M,
.type = MT_DEVICE,
}, {
.virtual = PALMTX_NAND_CLE_VIRT,
.pfn = __phys_to_pfn(PALMTX_NAND_CLE_PHYS),
.length = SZ_1M,
.type = MT_DEVICE,
}
};
static void __init palmtx_map_io(void)

116
arch/arm/mach-pxa/palmz72.c
View file

@ -129,88 +129,14 @@ static unsigned long palmz72_pin_config[] __initdata = {
/******************************************************************************
* SD/MMC card controller
******************************************************************************/
static int palmz72_mci_init(struct device *dev,
irq_handler_t palmz72_detect_int, void *data)
{
int err = 0;
/* Setup an interrupt for detecting card insert/remove events */
err = gpio_request(GPIO_NR_PALMZ72_SD_DETECT_N, "SD IRQ");
if (err)
goto err;
err = gpio_direction_input(GPIO_NR_PALMZ72_SD_DETECT_N);
if (err)
goto err2;
err = request_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N),
palmz72_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
"SD/MMC card detect", data);
if (err) {
printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n",
__func__);
goto err2;
}
/* SD_POWER is not actually power, but it is more like chip
* select, i.e. it is inverted */
err = gpio_request(GPIO_NR_PALMZ72_SD_POWER_N, "SD_POWER");
if (err)
goto err3;
err = gpio_direction_output(GPIO_NR_PALMZ72_SD_POWER_N, 0);
if (err)
goto err4;
err = gpio_request(GPIO_NR_PALMZ72_SD_RO, "SD_RO");
if (err)
goto err4;
err = gpio_direction_input(GPIO_NR_PALMZ72_SD_RO);
if (err)
goto err5;
printk(KERN_DEBUG "%s: irq registered\n", __func__);
return 0;
err5:
gpio_free(GPIO_NR_PALMZ72_SD_RO);
err4:
gpio_free(GPIO_NR_PALMZ72_SD_POWER_N);
err3:
free_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N), data);
err2:
gpio_free(GPIO_NR_PALMZ72_SD_DETECT_N);
err:
return err;
}
static void palmz72_mci_exit(struct device *dev, void *data)
{
gpio_free(GPIO_NR_PALMZ72_SD_POWER_N);
free_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N), data);
gpio_free(GPIO_NR_PALMZ72_SD_DETECT_N);
gpio_free(GPIO_NR_PALMZ72_SD_RO);
}
static void palmz72_mci_power(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data *p_d = dev->platform_data;
if (p_d->ocr_mask & (1 << vdd))
gpio_set_value(GPIO_NR_PALMZ72_SD_POWER_N, 0);
else
gpio_set_value(GPIO_NR_PALMZ72_SD_POWER_N, 1);
}
static int palmz72_mci_ro(struct device *dev)
{
return gpio_get_value(GPIO_NR_PALMZ72_SD_RO);
}
/* SD_POWER is not actually power, but it is more like chip
* select, i.e. it is inverted */
static struct pxamci_platform_data palmz72_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.setpower = palmz72_mci_power,
.get_ro = palmz72_mci_ro,
.init = palmz72_mci_init,
.exit = palmz72_mci_exit,
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.gpio_card_detect = GPIO_NR_PALMZ72_SD_DETECT_N,
.gpio_card_ro = GPIO_NR_PALMZ72_SD_RO,
.gpio_power = GPIO_NR_PALMZ72_SD_POWER_N,
.gpio_power_invert = 1,
};
/******************************************************************************
@ -304,35 +230,9 @@ static struct platform_device palmz72_backlight = {
/******************************************************************************
* IrDA
******************************************************************************/
static int palmz72_irda_startup(struct device *dev)
{
int err;
err = gpio_request(GPIO_NR_PALMZ72_IR_DISABLE, "IR DISABLE");
if (err)
goto err;
err = gpio_direction_output(GPIO_NR_PALMZ72_IR_DISABLE, 1);
if (err)
gpio_free(GPIO_NR_PALMZ72_IR_DISABLE);
err:
return err;
}
static void palmz72_irda_shutdown(struct device *dev)
{
gpio_free(GPIO_NR_PALMZ72_IR_DISABLE);
}
static void palmz72_irda_transceiver_mode(struct device *dev, int mode)
{
gpio_set_value(GPIO_NR_PALMZ72_IR_DISABLE, mode & IR_OFF);
pxa2xx_transceiver_mode(dev, mode);
}
static struct pxaficp_platform_data palmz72_ficp_platform_data = {
.startup = palmz72_irda_startup,
.shutdown = palmz72_irda_shutdown,
.gpio_pwdown = GPIO_NR_PALMZ72_IR_DISABLE,
.transceiver_cap = IR_SIRMODE | IR_OFF,
.transceiver_mode = palmz72_irda_transceiver_mode,
};
/******************************************************************************

67
arch/arm/mach-pxa/pcm990-baseboard.c
View file

@ -321,11 +321,14 @@ static void pcm990_mci_exit(struct device *dev, void *data)
#define MSECS_PER_JIFFY (1000/HZ)
static struct pxamci_platform_data pcm990_mci_platform_data = {
.detect_delay = 250 / MSECS_PER_JIFFY,
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.init = pcm990_mci_init,
.setpower = pcm990_mci_setpower,
.exit = pcm990_mci_exit,
.detect_delay = 250 / MSECS_PER_JIFFY,
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.init = pcm990_mci_init,
.setpower = pcm990_mci_setpower,
.exit = pcm990_mci_exit,
.gpio_card_detect = -1,
.gpio_card_ro = -1,
.gpio_power = -1,
};
static struct pxaohci_platform_data pcm990_ohci_platform_data = {
@ -427,25 +430,56 @@ static void pcm990_camera_free_bus(struct soc_camera_link *link)
gpio_bus_switch = -EINVAL;
}
static struct soc_camera_link iclink = {
.bus_id = 0, /* Must match with the camera ID above */
.query_bus_param = pcm990_camera_query_bus_param,
.set_bus_param = pcm990_camera_set_bus_param,
.free_bus = pcm990_camera_free_bus,
};
/* Board I2C devices. */
static struct i2c_board_info __initdata pcm990_i2c_devices[] = {
{
/* Must initialize before the camera(s) */
I2C_BOARD_INFO("pca9536", 0x41),
.platform_data = &pca9536_data,
}, {
},
};
static struct i2c_board_info pcm990_camera_i2c[] = {
{
I2C_BOARD_INFO("mt9v022", 0x48),
.platform_data = &iclink, /* With extender */
}, {
I2C_BOARD_INFO("mt9m001", 0x5d),
.platform_data = &iclink, /* With extender */
},
};
static struct soc_camera_link iclink[] = {
{
.bus_id = 0, /* Must match with the camera ID */
.board_info = &pcm990_camera_i2c[0],
.i2c_adapter_id = 0,
.query_bus_param = pcm990_camera_query_bus_param,
.set_bus_param = pcm990_camera_set_bus_param,
.free_bus = pcm990_camera_free_bus,
.module_name = "mt9v022",
}, {
.bus_id = 0, /* Must match with the camera ID */
.board_info = &pcm990_camera_i2c[1],
.i2c_adapter_id = 0,
.query_bus_param = pcm990_camera_query_bus_param,
.set_bus_param = pcm990_camera_set_bus_param,
.free_bus = pcm990_camera_free_bus,
.module_name = "mt9m001",
},
};
static struct platform_device pcm990_camera[] = {
{
.name = "soc-camera-pdrv",
.id = 0,
.dev = {
.platform_data = &iclink[0],
},
}, {
.name = "soc-camera-pdrv",
.id = 1,
.dev = {
.platform_data = &iclink[1],
},
},
};
#endif /* CONFIG_VIDEO_PXA27x ||CONFIG_VIDEO_PXA27x_MODULE */
@ -501,6 +535,9 @@ void __init pcm990_baseboard_init(void)
pxa_set_camera_info(&pcm990_pxacamera_platform_data);
i2c_register_board_info(0, ARRAY_AND_SIZE(pcm990_i2c_devices));
platform_device_register(&pcm990_camera[0]);
platform_device_register(&pcm990_camera[1]);
#endif
printk(KERN_INFO "PCM-990 Evaluation baseboard initialized\n");

80
arch/arm/mach-pxa/poodle.c
View file

@ -245,20 +245,10 @@ static inline void poodle_init_spi(void) {}
* The card detect interrupt isn't debounced so we delay it by 250ms
* to give the card a chance to fully insert/eject.
*/
static struct pxamci_platform_data poodle_mci_platform_data;
static int poodle_mci_init(struct device *dev, irq_handler_t poodle_detect_int, void *data)
{
int err;
err = gpio_request(POODLE_GPIO_nSD_DETECT, "nSD_DETECT");
if (err)
goto err_out;
err = gpio_request(POODLE_GPIO_nSD_WP, "nSD_WP");
if (err)
goto err_free_1;
err = gpio_request(POODLE_GPIO_SD_PWR, "SD_PWR");
if (err)
goto err_free_2;
@ -267,34 +257,14 @@ static int poodle_mci_init(struct device *dev, irq_handler_t poodle_detect_int,
if (err)
goto err_free_3;
gpio_direction_input(POODLE_GPIO_nSD_DETECT);
gpio_direction_input(POODLE_GPIO_nSD_WP);
gpio_direction_output(POODLE_GPIO_SD_PWR, 0);
gpio_direction_output(POODLE_GPIO_SD_PWR1, 0);
poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250);
err = request_irq(POODLE_IRQ_GPIO_nSD_DETECT, poodle_detect_int,
IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
"MMC card detect", data);
if (err) {
pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n",
__func__);
goto err_free_4;
}
return 0;
err_free_4:
gpio_free(POODLE_GPIO_SD_PWR1);
err_free_3:
gpio_free(POODLE_GPIO_SD_PWR);
err_free_2:
gpio_free(POODLE_GPIO_nSD_WP);
err_free_1:
gpio_free(POODLE_GPIO_nSD_DETECT);
err_out:
return err;
}
@ -312,62 +282,29 @@ static void poodle_mci_setpower(struct device *dev, unsigned int vdd)
}
}
static int poodle_mci_get_ro(struct device *dev)
{
return !!gpio_get_value(POODLE_GPIO_nSD_WP);
return GPLR(POODLE_GPIO_nSD_WP) & GPIO_bit(POODLE_GPIO_nSD_WP);
}
static void poodle_mci_exit(struct device *dev, void *data)
{
free_irq(POODLE_IRQ_GPIO_nSD_DETECT, data);
gpio_free(POODLE_GPIO_SD_PWR1);
gpio_free(POODLE_GPIO_SD_PWR);
gpio_free(POODLE_GPIO_nSD_WP);
gpio_free(POODLE_GPIO_nSD_DETECT);
}
static struct pxamci_platform_data poodle_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = poodle_mci_init,
.get_ro = poodle_mci_get_ro,
.setpower = poodle_mci_setpower,
.exit = poodle_mci_exit,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = poodle_mci_init,
.setpower = poodle_mci_setpower,
.exit = poodle_mci_exit,
.gpio_card_detect = POODLE_IRQ_GPIO_nSD_DETECT,
.gpio_card_ro = POODLE_GPIO_nSD_WP,
.gpio_power = -1,
};
/*
* Irda
*/
static void poodle_irda_transceiver_mode(struct device *dev, int mode)
{
gpio_set_value(POODLE_GPIO_IR_ON, mode & IR_OFF);
pxa2xx_transceiver_mode(dev, mode);
}
static int poodle_irda_startup(struct device *dev)
{
int err;
err = gpio_request(POODLE_GPIO_IR_ON, "IR_ON");
if (err)
return err;
gpio_direction_output(POODLE_GPIO_IR_ON, 1);
return 0;
}
static void poodle_irda_shutdown(struct device *dev)
{
gpio_free(POODLE_GPIO_IR_ON);
}
static struct pxaficp_platform_data poodle_ficp_platform_data = {
.gpio_pwdown = POODLE_GPIO_IR_ON,
.transceiver_cap = IR_SIRMODE | IR_OFF,
.transceiver_mode = poodle_irda_transceiver_mode,
.startup = poodle_irda_startup,
.shutdown = poodle_irda_shutdown,
};
@ -521,6 +458,7 @@ static void __init poodle_init(void)
set_pxa_fb_parent(&poodle_locomo_device.dev);
set_pxa_fb_info(&poodle_fb_info);
pxa_set_udc_info(&udc_info);
poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250);
pxa_set_mci_info(&poodle_mci_platform_data);
pxa_set_ficp_info(&poodle_ficp_platform_data);
pxa_set_i2c_info(NULL);

1
arch/arm/mach-pxa/pxa2xx.c
View file

@ -52,3 +52,4 @@ void pxa2xx_transceiver_mode(struct device *dev, int mode)
} else
BUG();
}
EXPORT_SYMBOL_GPL(pxa2xx_transceiver_mode);

2
arch/arm/mach-pxa/pxa300.c
View file

@ -84,9 +84,11 @@ static struct mfp_addr_map pxa310_mfp_addr_map[] __initdata = {
};
static DEFINE_PXA3_CKEN(common_nand, NAND, 156000000, 0);
static DEFINE_PXA3_CKEN(gcu, PXA300_GCU, 0, 0);
static struct clk_lookup common_clkregs[] = {
INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL),
INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
};
static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0);

2
arch/arm/mach-pxa/pxa320.c
View file

@ -78,9 +78,11 @@ static struct mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
};
static DEFINE_PXA3_CKEN(pxa320_nand, NAND, 104000000, 0);
static DEFINE_PXA3_CKEN(gcu, PXA320_GCU, 0, 0);
static struct clk_lookup pxa320_clkregs[] = {
INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL),
INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
};
static int __init pxa320_init(void)

19
arch/arm/mach-pxa/pxa930.c
View file

@ -176,13 +176,30 @@ static struct mfp_addr_map pxa930_mfp_addr_map[] __initdata = {
MFP_ADDR_END,
};
static struct mfp_addr_map pxa935_mfp_addr_map[] __initdata = {
MFP_ADDR(GPIO159, 0x0524),
MFP_ADDR(GPIO163, 0x0534),
MFP_ADDR(GPIO167, 0x0544),
MFP_ADDR(GPIO168, 0x0548),
MFP_ADDR(GPIO169, 0x054c),
MFP_ADDR(GPIO170, 0x0550),
MFP_ADDR(GPIO171, 0x0554),
MFP_ADDR(GPIO172, 0x0558),
MFP_ADDR(GPIO173, 0x055c),
MFP_ADDR_END,
};
static int __init pxa930_init(void)
{
if (cpu_is_pxa930()) {
if (cpu_is_pxa930() || cpu_is_pxa935()) {
mfp_init_base(io_p2v(MFPR_BASE));
mfp_init_addr(pxa930_mfp_addr_map);
}
if (cpu_is_pxa935())
mfp_init_addr(pxa935_mfp_addr_map);
return 0;
}

238
arch/arm/mach-pxa/spitz.c
View file

@ -24,6 +24,7 @@
#include <linux/spi/ads7846.h>
#include <linux/spi/corgi_lcd.h>
#include <linux/mtd/sharpsl.h>
#include <linux/input/matrix_keypad.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
@ -111,6 +112,26 @@ static unsigned long spitz_pin_config[] __initdata = {
GPIO105_GPIO, /* SPITZ_GPIO_CF_IRQ */
GPIO106_GPIO, /* SPITZ_GPIO_CF2_IRQ */
/* GPIO matrix keypad */
GPIO88_GPIO, /* column 0 */
GPIO23_GPIO, /* column 1 */
GPIO24_GPIO, /* column 2 */
GPIO25_GPIO, /* column 3 */
GPIO26_GPIO, /* column 4 */
GPIO27_GPIO, /* column 5 */
GPIO52_GPIO, /* column 6 */
GPIO103_GPIO, /* column 7 */
GPIO107_GPIO, /* column 8 */
GPIO108_GPIO, /* column 9 */
GPIO114_GPIO, /* column 10 */
GPIO12_GPIO, /* row 0 */
GPIO17_GPIO, /* row 1 */
GPIO91_GPIO, /* row 2 */
GPIO34_GPIO, /* row 3 */
GPIO36_GPIO, /* row 4 */
GPIO38_GPIO, /* row 5 */
GPIO39_GPIO, /* row 6 */
/* I2C */
GPIO117_I2C_SCL,
GPIO118_I2C_SDA,
@ -242,9 +263,115 @@ EXPORT_SYMBOL(spitzscoop2_device);
/*
* Spitz Keyboard Device
*/
#define SPITZ_KEY_CALENDAR KEY_F1
#define SPITZ_KEY_ADDRESS KEY_F2
#define SPITZ_KEY_FN KEY_F3
#define SPITZ_KEY_CANCEL KEY_F4
#define SPITZ_KEY_EXOK KEY_F5
#define SPITZ_KEY_EXCANCEL KEY_F6
#define SPITZ_KEY_EXJOGDOWN KEY_F7
#define SPITZ_KEY_EXJOGUP KEY_F8
#define SPITZ_KEY_JAP1 KEY_LEFTALT
#define SPITZ_KEY_JAP2 KEY_RIGHTCTRL
#define SPITZ_KEY_SYNC KEY_F9
#define SPITZ_KEY_MAIL KEY_F10
#define SPITZ_KEY_OK KEY_F11
#define SPITZ_KEY_MENU KEY_F12
static const uint32_t spitzkbd_keymap[] = {
KEY(0, 0, KEY_LEFTCTRL),
KEY(0, 1, KEY_1),
KEY(0, 2, KEY_3),
KEY(0, 3, KEY_5),
KEY(0, 4, KEY_6),
KEY(0, 5, KEY_7),
KEY(0, 6, KEY_9),
KEY(0, 7, KEY_0),
KEY(0, 8, KEY_BACKSPACE),
KEY(0, 9, SPITZ_KEY_EXOK), /* EXOK */
KEY(0, 10, SPITZ_KEY_EXCANCEL), /* EXCANCEL */
KEY(1, 1, KEY_2),
KEY(1, 2, KEY_4),
KEY(1, 3, KEY_R),
KEY(1, 4, KEY_Y),
KEY(1, 5, KEY_8),
KEY(1, 6, KEY_I),
KEY(1, 7, KEY_O),
KEY(1, 8, KEY_P),
KEY(1, 9, SPITZ_KEY_EXJOGDOWN), /* EXJOGDOWN */
KEY(1, 10, SPITZ_KEY_EXJOGUP), /* EXJOGUP */
KEY(2, 0, KEY_TAB),
KEY(2, 1, KEY_Q),
KEY(2, 2, KEY_E),
KEY(2, 3, KEY_T),
KEY(2, 4, KEY_G),
KEY(2, 5, KEY_U),
KEY(2, 6, KEY_J),
KEY(2, 7, KEY_K),
KEY(3, 0, SPITZ_KEY_ADDRESS), /* ADDRESS */
KEY(3, 1, KEY_W),
KEY(3, 2, KEY_S),
KEY(3, 3, KEY_F),
KEY(3, 4, KEY_V),
KEY(3, 5, KEY_H),
KEY(3, 6, KEY_M),
KEY(3, 7, KEY_L),
KEY(3, 9, KEY_RIGHTSHIFT),
KEY(4, 0, SPITZ_KEY_CALENDAR), /* CALENDAR */
KEY(4, 1, KEY_A),
KEY(4, 2, KEY_D),
KEY(4, 3, KEY_C),
KEY(4, 4, KEY_B),
KEY(4, 5, KEY_N),
KEY(4, 6, KEY_DOT),
KEY(4, 8, KEY_ENTER),
KEY(4, 9, KEY_LEFTSHIFT),
KEY(5, 0, SPITZ_KEY_MAIL), /* MAIL */
KEY(5, 1, KEY_Z),
KEY(5, 2, KEY_X),
KEY(5, 3, KEY_MINUS),
KEY(5, 4, KEY_SPACE),
KEY(5, 5, KEY_COMMA),
KEY(5, 7, KEY_UP),
KEY(5, 10, SPITZ_KEY_FN), /* FN */
KEY(6, 0, KEY_SYSRQ),
KEY(6, 1, SPITZ_KEY_JAP1), /* JAP1 */
KEY(6, 2, SPITZ_KEY_JAP2), /* JAP2 */
KEY(6, 3, SPITZ_KEY_CANCEL), /* CANCEL */
KEY(6, 4, SPITZ_KEY_OK), /* OK */
KEY(6, 5, SPITZ_KEY_MENU), /* MENU */
KEY(6, 6, KEY_LEFT),
KEY(6, 7, KEY_DOWN),
KEY(6, 8, KEY_RIGHT),
};
static const struct matrix_keymap_data spitzkbd_keymap_data = {
.keymap = spitzkbd_keymap,
.keymap_size = ARRAY_SIZE(spitzkbd_keymap),
};
static const uint32_t spitzkbd_row_gpios[] =
{ 12, 17, 91, 34, 36, 38, 39 };
static const uint32_t spitzkbd_col_gpios[] =
{ 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 };
static struct matrix_keypad_platform_data spitzkbd_pdata = {
.keymap_data = &spitzkbd_keymap_data,
.row_gpios = spitzkbd_row_gpios,
.col_gpios = spitzkbd_col_gpios,
.num_row_gpios = ARRAY_SIZE(spitzkbd_row_gpios),
.num_col_gpios = ARRAY_SIZE(spitzkbd_col_gpios),
.col_scan_delay_us = 10,
.debounce_ms = 10,
.wakeup = 1,
};
static struct platform_device spitzkbd_device = {
.name = "spitz-keyboard",
.name = "matrix-keypad",
.id = -1,
.dev = {
.platform_data = &spitzkbd_pdata,
},
};
@ -296,6 +423,7 @@ static struct ads7846_platform_data spitz_ads7846_info = {
.vref_delay_usecs = 100,
.x_plate_ohms = 419,
.y_plate_ohms = 486,
.pressure_max = 1024,
.gpio_pendown = SPITZ_GPIO_TP_INT,
.wait_for_sync = spitz_wait_for_hsync,
};
@ -378,45 +506,6 @@ static inline void spitz_init_spi(void) {}
* The card detect interrupt isn't debounced so we delay it by 250ms
* to give the card a chance to fully insert/eject.
*/
static struct pxamci_platform_data spitz_mci_platform_data;
static int spitz_mci_init(struct device *dev, irq_handler_t spitz_detect_int, void *data)
{
int err;
err = gpio_request(SPITZ_GPIO_nSD_DETECT, "nSD_DETECT");
if (err)
goto err_out;
err = gpio_request(SPITZ_GPIO_nSD_WP, "nSD_WP");
if (err)
goto err_free_1;
gpio_direction_input(SPITZ_GPIO_nSD_DETECT);
gpio_direction_input(SPITZ_GPIO_nSD_WP);
spitz_mci_platform_data.detect_delay = msecs_to_jiffies(250);
err = request_irq(SPITZ_IRQ_GPIO_nSD_DETECT, spitz_detect_int,
IRQF_DISABLED | IRQF_TRIGGER_RISING |
IRQF_TRIGGER_FALLING,
"MMC card detect", data);
if (err) {
pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n",
__func__);
goto err_free_2;
}
return 0;
err_free_2:
gpio_free(SPITZ_GPIO_nSD_WP);
err_free_1:
gpio_free(SPITZ_GPIO_nSD_DETECT);
err_out:
return err;
}
static void spitz_mci_setpower(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data* p_d = dev->platform_data;
@ -427,24 +516,12 @@ static void spitz_mci_setpower(struct device *dev, unsigned int vdd)
spitz_card_pwr_ctrl(SPITZ_PWR_SD, 0x0000);
}
static int spitz_mci_get_ro(struct device *dev)
{
return gpio_get_value(SPITZ_GPIO_nSD_WP);
}
static void spitz_mci_exit(struct device *dev, void *data)
{
free_irq(SPITZ_IRQ_GPIO_nSD_DETECT, data);
gpio_free(SPITZ_GPIO_nSD_WP);
gpio_free(SPITZ_GPIO_nSD_DETECT);
}
static struct pxamci_platform_data spitz_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = spitz_mci_init,
.get_ro = spitz_mci_get_ro,
.setpower = spitz_mci_setpower,
.exit = spitz_mci_exit,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.setpower = spitz_mci_setpower,
.gpio_card_detect = SPITZ_GPIO_nSD_DETECT,
.gpio_card_ro = SPITZ_GPIO_nSD_WP,
.gpio_power = -1,
};
@ -484,50 +561,10 @@ static struct pxaohci_platform_data spitz_ohci_platform_data = {
/*
* Irda
*/
static int spitz_irda_startup(struct device *dev)
{
int rc;
rc = gpio_request(SPITZ_GPIO_IR_ON, "IrDA on");
if (rc)
goto err;
rc = gpio_direction_output(SPITZ_GPIO_IR_ON, 1);
if (rc)
goto err_dir;
return 0;
err_dir:
gpio_free(SPITZ_GPIO_IR_ON);
err:
return rc;
}
static void spitz_irda_shutdown(struct device *dev)
{
gpio_free(SPITZ_GPIO_IR_ON);
}
static void spitz_irda_transceiver_mode(struct device *dev, int mode)
{
gpio_set_value(SPITZ_GPIO_IR_ON, mode & IR_OFF);
pxa2xx_transceiver_mode(dev, mode);
}
#ifdef CONFIG_MACH_AKITA
static void akita_irda_transceiver_mode(struct device *dev, int mode)
{
gpio_set_value(AKITA_GPIO_IR_ON, mode & IR_OFF);
pxa2xx_transceiver_mode(dev, mode);
}
#endif
static struct pxaficp_platform_data spitz_ficp_platform_data = {
/* .gpio_pwdown is set in spitz_init() and akita_init() accordingly */
.transceiver_cap = IR_SIRMODE | IR_OFF,
.transceiver_mode = spitz_irda_transceiver_mode,
.startup = spitz_irda_startup,
.shutdown = spitz_irda_shutdown,
};
@ -695,6 +732,7 @@ static void __init common_init(void)
spitz_init_spi();
platform_add_devices(devices, ARRAY_SIZE(devices));
spitz_mci_platform_data.detect_delay = msecs_to_jiffies(250);
pxa_set_mci_info(&spitz_mci_platform_data);
pxa_set_ohci_info(&spitz_ohci_platform_data);
pxa_set_ficp_info(&spitz_ficp_platform_data);
@ -705,6 +743,8 @@ static void __init common_init(void)
#if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI)
static void __init spitz_init(void)
{
spitz_ficp_platform_data.gpio_pwdown = SPITZ_GPIO_IR_ON;
platform_scoop_config = &spitz_pcmcia_config;
common_init();
@ -747,7 +787,7 @@ static struct nand_ecclayout akita_oobinfo = {
static void __init akita_init(void)
{
spitz_ficp_platform_data.transceiver_mode = akita_irda_transceiver_mode;
spitz_ficp_platform_data.gpio_pwdown = AKITA_GPIO_IR_ON;
sharpsl_nand_platform_data.badblock_pattern = &sharpsl_akita_bbt;
sharpsl_nand_platform_data.ecc_layout = &akita_oobinfo;

91
arch/arm/mach-pxa/tosa.c
View file

@ -247,49 +247,10 @@ static struct pxa2xx_udc_mach_info udc_info __initdata = {
/*
* MMC/SD Device
*/
static struct pxamci_platform_data tosa_mci_platform_data;
static int tosa_mci_init(struct device *dev, irq_handler_t tosa_detect_int, void *data)
{
int err;
tosa_mci_platform_data.detect_delay = msecs_to_jiffies(250);
err = gpio_request(TOSA_GPIO_nSD_DETECT, "MMC/SD card detect");
if (err) {
printk(KERN_ERR "tosa_mci_init: can't request nSD_DETECT gpio\n");
goto err_gpio_detect;
}
err = gpio_direction_input(TOSA_GPIO_nSD_DETECT);
if (err)
goto err_gpio_detect_dir;
err = request_irq(TOSA_IRQ_GPIO_nSD_DETECT, tosa_detect_int,
IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
"MMC/SD card detect", data);
if (err) {
printk(KERN_ERR "tosa_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
goto err_irq;
}
err = gpio_request(TOSA_GPIO_SD_WP, "SD Write Protect");
if (err) {
printk(KERN_ERR "tosa_mci_init: can't request SD_WP gpio\n");
goto err_gpio_wp;
}
err = gpio_direction_input(TOSA_GPIO_SD_WP);
if (err)
goto err_gpio_wp_dir;
err = gpio_request(TOSA_GPIO_PWR_ON, "SD Power");
if (err) {
printk(KERN_ERR "tosa_mci_init: can't request SD_PWR gpio\n");
goto err_gpio_pwr;
}
err = gpio_direction_output(TOSA_GPIO_PWR_ON, 0);
if (err)
goto err_gpio_pwr_dir;
err = gpio_request(TOSA_GPIO_nSD_INT, "SD Int");
if (err) {
printk(KERN_ERR "tosa_mci_init: can't request SD_PWR gpio\n");
@ -304,51 +265,21 @@ static int tosa_mci_init(struct device *dev, irq_handler_t tosa_detect_int, void
err_gpio_int_dir:
gpio_free(TOSA_GPIO_nSD_INT);
err_gpio_int:
err_gpio_pwr_dir:
gpio_free(TOSA_GPIO_PWR_ON);
err_gpio_pwr:
err_gpio_wp_dir:
gpio_free(TOSA_GPIO_SD_WP);
err_gpio_wp:
free_irq(TOSA_IRQ_GPIO_nSD_DETECT, data);
err_irq:
err_gpio_detect_dir:
gpio_free(TOSA_GPIO_nSD_DETECT);
err_gpio_detect:
return err;
}
static void tosa_mci_setpower(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data* p_d = dev->platform_data;
if (( 1 << vdd) & p_d->ocr_mask) {
gpio_set_value(TOSA_GPIO_PWR_ON, 1);
} else {
gpio_set_value(TOSA_GPIO_PWR_ON, 0);
}
}
static int tosa_mci_get_ro(struct device *dev)
{
return gpio_get_value(TOSA_GPIO_SD_WP);
}
static void tosa_mci_exit(struct device *dev, void *data)
{
gpio_free(TOSA_GPIO_nSD_INT);
gpio_free(TOSA_GPIO_PWR_ON);
gpio_free(TOSA_GPIO_SD_WP);
free_irq(TOSA_IRQ_GPIO_nSD_DETECT, data);
gpio_free(TOSA_GPIO_nSD_DETECT);
}
static struct pxamci_platform_data tosa_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = tosa_mci_init,
.get_ro = tosa_mci_get_ro,
.setpower = tosa_mci_setpower,
.exit = tosa_mci_exit,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = tosa_mci_init,
.exit = tosa_mci_exit,
.gpio_card_detect = TOSA_GPIO_nSD_DETECT,
.gpio_card_ro = TOSA_GPIO_SD_WP,
.gpio_power = TOSA_GPIO_PWR_ON,
};
/*
@ -406,10 +337,11 @@ static void tosa_irda_shutdown(struct device *dev)
}
static struct pxaficp_platform_data tosa_ficp_platform_data = {
.transceiver_cap = IR_SIRMODE | IR_OFF,
.transceiver_mode = tosa_irda_transceiver_mode,
.startup = tosa_irda_startup,
.shutdown = tosa_irda_shutdown,
.gpio_pwdown = -1,
.transceiver_cap = IR_SIRMODE | IR_OFF,
.transceiver_mode = tosa_irda_transceiver_mode,
.startup = tosa_irda_startup,
.shutdown = tosa_irda_shutdown,
};
/*
@ -910,6 +842,7 @@ static void __init tosa_init(void)
dummy = gpiochip_reserve(TOSA_SCOOP_JC_GPIO_BASE, 12);
dummy = gpiochip_reserve(TOSA_TC6393XB_GPIO_BASE, 16);
tosa_mci_platform_data.detect_delay = msecs_to_jiffies(250);
pxa_set_mci_info(&tosa_mci_platform_data);
pxa_set_udc_info(&udc_info);
pxa_set_ficp_info(&tosa_ficp_platform_data);

159
arch/arm/mach-pxa/treo680.c
View file

@ -153,87 +153,11 @@ static unsigned long treo680_pin_config[] __initdata = {
/******************************************************************************
* SD/MMC card controller
******************************************************************************/
static int treo680_mci_init(struct device *dev,
irq_handler_t treo680_detect_int, void *data)
{
int err = 0;
/* Setup an interrupt for detecting card insert/remove events */
err = gpio_request(GPIO_NR_TREO680_SD_DETECT_N, "SD IRQ");
if (err)
goto err;
err = gpio_direction_input(GPIO_NR_TREO680_SD_DETECT_N);
if (err)
goto err2;
err = request_irq(gpio_to_irq(GPIO_NR_TREO680_SD_DETECT_N),
treo680_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
"SD/MMC card detect", data);
if (err) {
dev_err(dev, "%s: cannot request SD/MMC card detect IRQ\n",
__func__);
goto err2;
}
err = gpio_request(GPIO_NR_TREO680_SD_POWER, "SD_POWER");
if (err)
goto err3;
err = gpio_direction_output(GPIO_NR_TREO680_SD_POWER, 1);
if (err)
goto err4;
err = gpio_request(GPIO_NR_TREO680_SD_READONLY, "SD_READONLY");
if (err)
goto err4;
err = gpio_direction_input(GPIO_NR_TREO680_SD_READONLY);
if (err)
goto err5;
return 0;
err5:
gpio_free(GPIO_NR_TREO680_SD_READONLY);
err4:
gpio_free(GPIO_NR_TREO680_SD_POWER);
err3:
free_irq(gpio_to_irq(GPIO_NR_TREO680_SD_DETECT_N), data);
err2:
gpio_free(GPIO_NR_TREO680_SD_DETECT_N);
err:
return err;
}
static void treo680_mci_exit(struct device *dev, void *data)
{
gpio_free(GPIO_NR_TREO680_SD_READONLY);
gpio_free(GPIO_NR_TREO680_SD_POWER);
free_irq(gpio_to_irq(GPIO_NR_TREO680_SD_DETECT_N), data);
gpio_free(GPIO_NR_TREO680_SD_DETECT_N);
}
static void treo680_mci_power(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data *p_d = dev->platform_data;
gpio_set_value(GPIO_NR_TREO680_SD_POWER, p_d->ocr_mask & (1 << vdd));
}
static int treo680_mci_get_ro(struct device *dev)
{
return gpio_get_value(GPIO_NR_TREO680_SD_READONLY);
}
static struct pxamci_platform_data treo680_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.setpower = treo680_mci_power,
.get_ro = treo680_mci_get_ro,
.init = treo680_mci_init,
.exit = treo680_mci_exit,
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.gpio_card_detect = GPIO_NR_TREO680_SD_DETECT_N,
.gpio_card_ro = GPIO_NR_TREO680_SD_READONLY,
.gpio_power = GPIO_NR_TREO680_SD_POWER,
};
/******************************************************************************
@ -330,16 +254,9 @@ static int treo680_backlight_init(struct device *dev)
ret = gpio_direction_output(GPIO_NR_TREO680_BL_POWER, 0);
if (ret)
goto err2;
ret = gpio_request(GPIO_NR_TREO680_LCD_POWER, "LCD POWER");
if (ret)
goto err2;
ret = gpio_direction_output(GPIO_NR_TREO680_LCD_POWER, 0);
if (ret)
goto err3;
return 0;
err3:
gpio_free(GPIO_NR_TREO680_LCD_POWER);
err2:
gpio_free(GPIO_NR_TREO680_BL_POWER);
err:
@ -355,7 +272,6 @@ static int treo680_backlight_notify(int brightness)
static void treo680_backlight_exit(struct device *dev)
{
gpio_free(GPIO_NR_TREO680_BL_POWER);
gpio_free(GPIO_NR_TREO680_LCD_POWER);
}
static struct platform_pwm_backlight_data treo680_backlight_data = {
@ -379,44 +295,9 @@ static struct platform_device treo680_backlight = {
/******************************************************************************
* IrDA
******************************************************************************/
static void treo680_transceiver_mode(struct device *dev, int mode)
{
gpio_set_value(GPIO_NR_TREO680_IR_EN, mode & IR_OFF);
pxa2xx_transceiver_mode(dev, mode);
}
static int treo680_irda_startup(struct device *dev)
{
int err;
err = gpio_request(GPIO_NR_TREO680_IR_EN, "Ir port disable");
if (err)
goto err1;
err = gpio_direction_output(GPIO_NR_TREO680_IR_EN, 1);
if (err)
goto err2;
return 0;
err2:
dev_err(dev, "treo680_irda: cannot change IR gpio direction\n");
gpio_free(GPIO_NR_TREO680_IR_EN);
err1:
dev_err(dev, "treo680_irda: cannot allocate IR gpio\n");
return err;
}
static void treo680_irda_shutdown(struct device *dev)
{
gpio_free(GPIO_NR_TREO680_IR_EN);
}
static struct pxaficp_platform_data treo680_ficp_info = {
.transceiver_cap = IR_FIRMODE | IR_SIRMODE | IR_OFF,
.startup = treo680_irda_startup,
.shutdown = treo680_irda_shutdown,
.transceiver_mode = treo680_transceiver_mode,
.gpio_pwdown = GPIO_NR_TREO680_IR_EN,
.transceiver_cap = IR_SIRMODE | IR_OFF,
};
/******************************************************************************
@ -546,6 +427,11 @@ static struct pxafb_mode_info treo680_lcd_modes[] = {
},
};
static void treo680_lcd_power(int on, struct fb_var_screeninfo *info)
{
gpio_set_value(GPIO_NR_TREO680_BL_POWER, on);
}
static struct pxafb_mach_info treo680_lcd_screen = {
.modes = treo680_lcd_modes,
.num_modes = ARRAY_SIZE(treo680_lcd_modes),
@ -585,11 +471,32 @@ static void __init treo680_udc_init(void)
}
}
static void __init treo680_lcd_power_init(void)
{
int ret;
ret = gpio_request(GPIO_NR_TREO680_LCD_POWER, "LCD POWER");
if (ret) {
pr_err("Treo680: LCD power GPIO request failed!\n");
return;
}
ret = gpio_direction_output(GPIO_NR_TREO680_LCD_POWER, 0);
if (ret) {
pr_err("Treo680: setting LCD power GPIO direction failed!\n");
gpio_free(GPIO_NR_TREO680_LCD_POWER);
return;
}
treo680_lcd_screen.pxafb_lcd_power = treo680_lcd_power;
}
static void __init treo680_init(void)
{
treo680_pm_init();
pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config));
pxa_set_keypad_info(&treo680_keypad_platform_data);
treo680_lcd_power_init();
set_pxa_fb_info(&treo680_lcd_screen);
pxa_set_mci_info(&treo680_mci_platform_data);
treo680_udc_init();

4
arch/arm/mach-pxa/trizeps4.c
View file

@ -367,6 +367,9 @@ static struct pxamci_platform_data trizeps4_mci_platform_data = {
.exit = trizeps4_mci_exit,
.get_ro = NULL, /* write-protection not supported */
.setpower = NULL, /* power-switching not supported */
.gpio_card_detect = -1,
.gpio_card_ro = -1,
.gpio_power = -1,
};
/****************************************************************************
@ -412,6 +415,7 @@ static void trizeps4_irda_transceiver_mode(struct device *dev, int mode)
}
static struct pxaficp_platform_data trizeps4_ficp_platform_data = {
.gpio_pwdown = -1,
.transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
.transceiver_mode = trizeps4_irda_transceiver_mode,
.startup = trizeps4_irda_startup,

187
arch/arm/mach-pxa/xcep.c Normal file
View file

@ -0,0 +1,187 @@
/* linux/arch/arm/mach-pxa/xcep.c
*
* Support for the Iskratel Electronics XCEP platform as used in
* the Libera instruments from Instrumentation Technologies.
*
* Author: Ales Bardorfer <ales@i-tech.si>
* Contributions by: Abbott, MG (Michael) <michael.abbott@diamond.ac.uk>
* Contributions by: Matej Kenda <matej.kenda@i-tech.si>
* Created: June 2006
* Copyright: (C) 2006-2009 Instrumentation Technologies
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <linux/i2c.h>
#include <linux/smc91x.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/irq.h>
#include <asm/mach/map.h>
#include <plat/i2c.h>
#include <mach/hardware.h>
#include <mach/pxa2xx-regs.h>
#include <mach/mfp-pxa25x.h>
#include "generic.h"
#define XCEP_ETH_PHYS (PXA_CS3_PHYS + 0x00000300)
#define XCEP_ETH_PHYS_END (PXA_CS3_PHYS + 0x000fffff)
#define XCEP_ETH_ATTR (PXA_CS3_PHYS + 0x02000000)
#define XCEP_ETH_ATTR_END (PXA_CS3_PHYS + 0x020fffff)
#define XCEP_ETH_IRQ IRQ_GPIO0
/* XCEP CPLD base */
#define XCEP_CPLD_BASE 0xf0000000
/* Flash partitions. */
static struct mtd_partition xcep_partitions[] = {
{
.name = "Bootloader",
.size = 0x00040000,
.offset = 0,
.mask_flags = MTD_WRITEABLE
}, {
.name = "Bootloader ENV",
.size = 0x00040000,
.offset = 0x00040000,
.mask_flags = MTD_WRITEABLE
}, {
.name = "Kernel",
.size = 0x00100000,
.offset = 0x00080000,
}, {
.name = "Rescue fs",
.size = 0x00280000,
.offset = 0x00180000,
}, {
.name = "Filesystem",
.size = MTDPART_SIZ_FULL,
.offset = 0x00400000
}
};
static struct physmap_flash_data xcep_flash_data[] = {
{
.width = 4, /* bankwidth in bytes */
.parts = xcep_partitions,
.nr_parts = ARRAY_SIZE(xcep_partitions)
}
};
static struct resource flash_resource = {
.start = PXA_CS0_PHYS,
.end = PXA_CS0_PHYS + SZ_32M - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device flash_device = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = xcep_flash_data,
},
.resource = &flash_resource,
.num_resources = 1,
};
/* SMC LAN91C111 network controller. */
static struct resource smc91x_resources[] = {
[0] = {
.name = "smc91x-regs",
.start = XCEP_ETH_PHYS,
.end = XCEP_ETH_PHYS_END,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = XCEP_ETH_IRQ,
.end = XCEP_ETH_IRQ,
.flags = IORESOURCE_IRQ,
},
[2] = {
.name = "smc91x-attrib",
.start = XCEP_ETH_ATTR,
.end = XCEP_ETH_ATTR_END,
.flags = IORESOURCE_MEM,
},
};
static struct smc91x_platdata xcep_smc91x_info = {
.flags = SMC91X_USE_32BIT | SMC91X_NOWAIT | SMC91X_USE_DMA,
};
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = -1,
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
.dev = {
.platform_data = &xcep_smc91x_info,
},
};
static struct platform_device *devices[] __initdata = {
&flash_device,
&smc91x_device,
};
/* We have to state that there are HWMON devices on the I2C bus on XCEP.
* Drivers for HWMON verify capabilities of the adapter when loading and
* refuse to attach if the adapter doesn't support HWMON class of devices.
* See also Documentation/i2c/porting-clients. */
static struct i2c_pxa_platform_data xcep_i2c_platform_data = {
.class = I2C_CLASS_HWMON
};
static mfp_cfg_t xcep_pin_config[] __initdata = {
GPIO79_nCS_3, /* SMC 91C111 chip select. */
GPIO80_nCS_4, /* CPLD chip select. */
/* SSP communication to MSP430 */
GPIO23_SSP1_SCLK,
GPIO24_SSP1_SFRM,
GPIO25_SSP1_TXD,
GPIO26_SSP1_RXD,
GPIO27_SSP1_EXTCLK
};
static void __init xcep_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(xcep_pin_config));
/* See Intel XScale Developer's Guide for details */
/* Set RDF and RDN to appropriate values (chip select 3 (smc91x)) */
MSC1 = (MSC1 & 0xffff) | 0xD5540000;
/* Set RDF and RDN to appropriate values (chip select 5 (fpga)) */
MSC2 = (MSC2 & 0xffff) | 0x72A00000;
platform_add_devices(ARRAY_AND_SIZE(devices));
pxa_set_i2c_info(&xcep_i2c_platform_data);
}
MACHINE_START(XCEP, "Iskratel XCEP")
.phys_io = 0x40000000,
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.boot_params = 0xa0000100,
.init_machine = xcep_init,
.map_io = pxa_map_io,
.init_irq = pxa25x_init_irq,
.timer = &pxa_timer,
MACHINE_END

3
arch/arm/mach-pxa/zylonite.c
View file

@ -290,6 +290,9 @@ static struct pxamci_platform_data zylonite_mci_platform_data = {
.init = zylonite_mci_init,
.exit = zylonite_mci_exit,
.get_ro = zylonite_mci_ro,
.gpio_card_detect = -1,
.gpio_card_ro = -1,
.gpio_power = -1,
};
static struct pxamci_platform_data zylonite_mci2_platform_data = {

24
arch/arm/mach-realview/core.c
View file

@ -30,6 +30,7 @@
#include <linux/io.h>
#include <linux/smsc911x.h>
#include <linux/ata_platform.h>
#include <linux/amba/mmci.h>
#include <asm/clkdev.h>
#include <asm/system.h>
@ -44,7 +45,6 @@
#include <asm/mach/flash.h>
#include <asm/mach/irq.h>
#include <asm/mach/map.h>
#include <asm/mach/mmc.h>
#include <asm/hardware/gic.h>
@ -237,14 +237,14 @@ static unsigned int realview_mmc_status(struct device *dev)
return readl(REALVIEW_SYSMCI) & mask;
}
struct mmc_platform_data realview_mmc0_plat_data = {
struct mmci_platform_data realview_mmc0_plat_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.status = realview_mmc_status,
.gpio_wp = 17,
.gpio_cd = 16,
};
struct mmc_platform_data realview_mmc1_plat_data = {
struct mmci_platform_data realview_mmc1_plat_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.status = realview_mmc_status,
.gpio_wp = 19,
@ -296,31 +296,31 @@ static struct clk ref24_clk = {
static struct clk_lookup lookups[] = {
{ /* UART0 */
.dev_id = "dev:f1",
.dev_id = "dev:uart0",
.clk = &ref24_clk,
}, { /* UART1 */
.dev_id = "dev:f2",
.dev_id = "dev:uart1",
.clk = &ref24_clk,
}, { /* UART2 */
.dev_id = "dev:f3",
.dev_id = "dev:uart2",
.clk = &ref24_clk,
}, { /* UART3 */
.dev_id = "fpga:09",
.dev_id = "fpga:uart3",
.clk = &ref24_clk,
}, { /* KMI0 */
.dev_id = "fpga:06",
.dev_id = "fpga:kmi0",
.clk = &ref24_clk,
}, { /* KMI1 */
.dev_id = "fpga:07",
.dev_id = "fpga:kmi1",
.clk = &ref24_clk,
}, { /* MMC0 */
.dev_id = "fpga:05",
.dev_id = "fpga:mmc0",
.clk = &ref24_clk,
}, { /* EB:CLCD */
.dev_id = "dev:20",
.dev_id = "dev:clcd",
.clk = &oscvco_clk,
}, { /* PB:CLCD */
.dev_id = "issp:20",
.dev_id = "issp:clcd",
.clk = &oscvco_clk,
}
};

4
arch/arm/mach-realview/core.h
View file

@ -47,8 +47,8 @@ static struct amba_device name##_device = { \
extern struct platform_device realview_flash_device;
extern struct platform_device realview_cf_device;
extern struct platform_device realview_i2c_device;
extern struct mmc_platform_data realview_mmc0_plat_data;
extern struct mmc_platform_data realview_mmc1_plat_data;
extern struct mmci_platform_data realview_mmc0_plat_data;
extern struct mmci_platform_data realview_mmc1_plat_data;
extern struct clcd_board clcd_plat_data;
extern void __iomem *gic_cpu_base_addr;
extern void __iomem *timer0_va_base;

40
arch/arm/mach-realview/realview_eb.c
View file

@ -24,6 +24,7 @@
#include <linux/sysdev.h>
#include <linux/amba/bus.h>
#include <linux/amba/pl061.h>
#include <linux/amba/mmci.h>
#include <linux/io.h>
#include <mach/hardware.h>
@ -37,7 +38,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/mmc.h>
#include <asm/mach/time.h>
#include <mach/board-eb.h>
@ -193,27 +193,27 @@ static struct pl061_platform_data gpio2_plat_data = {
#define EB_SSP_DMA { 9, 8 }
/* FPGA Primecells */
AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
AMBA_DEVICE(uart3, "fpga:09", EB_UART3, NULL);
AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
/* DevChip Primecells */
AMBA_DEVICE(smc, "dev:00", EB_SMC, NULL);
AMBA_DEVICE(clcd, "dev:20", EB_CLCD, &clcd_plat_data);
AMBA_DEVICE(dmac, "dev:30", DMAC, NULL);
AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
AMBA_DEVICE(wdog, "dev:e1", EB_WATCHDOG, NULL);
AMBA_DEVICE(gpio0, "dev:e4", EB_GPIO0, &gpio0_plat_data);
AMBA_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data);
AMBA_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data);
AMBA_DEVICE(rtc, "dev:e8", EB_RTC, NULL);
AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
AMBA_DEVICE(uart0, "dev:f1", EB_UART0, NULL);
AMBA_DEVICE(uart1, "dev:f2", EB_UART1, NULL);
AMBA_DEVICE(uart2, "dev:f3", EB_UART2, NULL);
AMBA_DEVICE(ssp0, "dev:f4", EB_SSP, NULL);
AMBA_DEVICE(smc, "dev:smc", EB_SMC, NULL);
AMBA_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data);
AMBA_DEVICE(dmac, "dev:dmac", DMAC, NULL);
AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL);
AMBA_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL);
AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
AMBA_DEVICE(rtc, "dev:rtc", EB_RTC, NULL);
AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
AMBA_DEVICE(ssp0, "dev:ssp0", EB_SSP, NULL);
static struct amba_device *amba_devs[] __initdata = {
&dmac_device,

40
arch/arm/mach-realview/realview_pb1176.c
View file

@ -24,6 +24,7 @@
#include <linux/sysdev.h>
#include <linux/amba/bus.h>
#include <linux/amba/pl061.h>
#include <linux/amba/mmci.h>
#include <linux/io.h>
#include <mach/hardware.h>
@ -37,7 +38,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>
#include <asm/mach/mmc.h>
#include <asm/mach/time.h>
#include <mach/board-pb1176.h>
@ -170,29 +170,29 @@ static struct pl061_platform_data gpio2_plat_data = {
#define PB1176_SSP_DMA { 9, 8 }
/* FPGA Primecells */
AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
AMBA_DEVICE(uart3, "fpga:09", PB1176_UART3, NULL);
AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
AMBA_DEVICE(uart3, "fpga:uart3", PB1176_UART3, NULL);
/* DevChip Primecells */
AMBA_DEVICE(smc, "dev:00", PB1176_SMC, NULL);
AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
AMBA_DEVICE(wdog, "dev:e1", PB1176_WATCHDOG, NULL);
AMBA_DEVICE(gpio0, "dev:e4", PB1176_GPIO0, &gpio0_plat_data);
AMBA_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data);
AMBA_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data);
AMBA_DEVICE(rtc, "dev:e8", PB1176_RTC, NULL);
AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
AMBA_DEVICE(uart0, "dev:f1", PB1176_UART0, NULL);
AMBA_DEVICE(uart1, "dev:f2", PB1176_UART1, NULL);
AMBA_DEVICE(uart2, "dev:f3", PB1176_UART2, NULL);
AMBA_DEVICE(ssp0, "dev:f4", PB1176_SSP, NULL);
AMBA_DEVICE(smc, "dev:smc", PB1176_SMC, NULL);
AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL);
AMBA_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL);
AMBA_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data);
AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
AMBA_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL);
AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
AMBA_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL);
AMBA_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL);
AMBA_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL);
AMBA_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, NULL);
/* Primecells on the NEC ISSP chip */
AMBA_DEVICE(clcd, "issp:20", PB1176_CLCD, &clcd_plat_data);
//AMBA_DEVICE(dmac, "issp:30", PB1176_DMAC, NULL);
AMBA_DEVICE(clcd, "issp:clcd", PB1176_CLCD, &clcd_plat_data);
//AMBA_DEVICE(dmac, "issp:dmac", PB1176_DMAC, NULL);
static struct amba_device *amba_devs[] __initdata = {
// &dmac_device,

40
arch/arm/mach-realview/realview_pb11mp.c
View file

@ -24,6 +24,7 @@
#include <linux/sysdev.h>
#include <linux/amba/bus.h>
#include <linux/amba/pl061.h>
#include <linux/amba/mmci.h>
#include <linux/io.h>
#include <mach/hardware.h>
@ -38,7 +39,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>
#include <asm/mach/mmc.h>
#include <asm/mach/time.h>
#include <mach/board-pb11mp.h>
@ -172,29 +172,29 @@ static struct pl061_platform_data gpio2_plat_data = {
#define PB11MP_SSP_DMA { 9, 8 }
/* FPGA Primecells */
AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
AMBA_DEVICE(uart3, "fpga:09", PB11MP_UART3, NULL);
AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
AMBA_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL);
/* DevChip Primecells */
AMBA_DEVICE(smc, "dev:00", PB11MP_SMC, NULL);
AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
AMBA_DEVICE(wdog, "dev:e1", PB11MP_WATCHDOG, NULL);
AMBA_DEVICE(gpio0, "dev:e4", PB11MP_GPIO0, &gpio0_plat_data);
AMBA_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data);
AMBA_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data);
AMBA_DEVICE(rtc, "dev:e8", PB11MP_RTC, NULL);
AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
AMBA_DEVICE(uart0, "dev:f1", PB11MP_UART0, NULL);
AMBA_DEVICE(uart1, "dev:f2", PB11MP_UART1, NULL);
AMBA_DEVICE(uart2, "dev:f3", PB11MP_UART2, NULL);
AMBA_DEVICE(ssp0, "dev:f4", PB11MP_SSP, NULL);
AMBA_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL);
AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL);
AMBA_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL);
AMBA_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data);
AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
AMBA_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL);
AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
AMBA_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL);
AMBA_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL);
AMBA_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL);
AMBA_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, NULL);
/* Primecells on the NEC ISSP chip */
AMBA_DEVICE(clcd, "issp:20", PB11MP_CLCD, &clcd_plat_data);
AMBA_DEVICE(dmac, "issp:30", DMAC, NULL);
AMBA_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data);
AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL);
static struct amba_device *amba_devs[] __initdata = {
&dmac_device,

40
arch/arm/mach-realview/realview_pba8.c
View file

@ -24,6 +24,7 @@
#include <linux/sysdev.h>
#include <linux/amba/bus.h>
#include <linux/amba/pl061.h>
#include <linux/amba/mmci.h>
#include <linux/io.h>
#include <asm/irq.h>
@ -34,7 +35,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/mmc.h>
#include <asm/mach/time.h>
#include <mach/hardware.h>
@ -162,29 +162,29 @@ static struct pl061_platform_data gpio2_plat_data = {
#define PBA8_SSP_DMA { 9, 8 }
/* FPGA Primecells */
AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
AMBA_DEVICE(uart3, "fpga:09", PBA8_UART3, NULL);
AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
AMBA_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL);
/* DevChip Primecells */
AMBA_DEVICE(smc, "dev:00", PBA8_SMC, NULL);
AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
AMBA_DEVICE(wdog, "dev:e1", PBA8_WATCHDOG, NULL);
AMBA_DEVICE(gpio0, "dev:e4", PBA8_GPIO0, &gpio0_plat_data);
AMBA_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data);
AMBA_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data);
AMBA_DEVICE(rtc, "dev:e8", PBA8_RTC, NULL);
AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
AMBA_DEVICE(uart0, "dev:f1", PBA8_UART0, NULL);
AMBA_DEVICE(uart1, "dev:f2", PBA8_UART1, NULL);
AMBA_DEVICE(uart2, "dev:f3", PBA8_UART2, NULL);
AMBA_DEVICE(ssp0, "dev:f4", PBA8_SSP, NULL);
AMBA_DEVICE(smc, "dev:smc", PBA8_SMC, NULL);
AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL);
AMBA_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL);
AMBA_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data);
AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
AMBA_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL);
AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
AMBA_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL);
AMBA_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL);
AMBA_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL);
AMBA_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, NULL);
/* Primecells on the NEC ISSP chip */
AMBA_DEVICE(clcd, "issp:20", PBA8_CLCD, &clcd_plat_data);
AMBA_DEVICE(dmac, "issp:30", DMAC, NULL);
AMBA_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data);
AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL);
static struct amba_device *amba_devs[] __initdata = {
&dmac_device,

40
arch/arm/mach-realview/realview_pbx.c
View file

@ -23,6 +23,7 @@
#include <linux/sysdev.h>
#include <linux/amba/bus.h>
#include <linux/amba/pl061.h>
#include <linux/amba/mmci.h>
#include <linux/io.h>
#include <asm/irq.h>
@ -34,7 +35,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/mmc.h>
#include <asm/mach/time.h>
#include <mach/hardware.h>
@ -182,29 +182,29 @@ static struct pl061_platform_data gpio2_plat_data = {
#define PBX_SSP_DMA { 9, 8 }
/* FPGA Primecells */
AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
AMBA_DEVICE(uart3, "fpga:09", PBX_UART3, NULL);
AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
AMBA_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL);
/* DevChip Primecells */
AMBA_DEVICE(smc, "dev:00", PBX_SMC, NULL);
AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
AMBA_DEVICE(wdog, "dev:e1", PBX_WATCHDOG, NULL);
AMBA_DEVICE(gpio0, "dev:e4", PBX_GPIO0, &gpio0_plat_data);
AMBA_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data);
AMBA_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data);
AMBA_DEVICE(rtc, "dev:e8", PBX_RTC, NULL);
AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
AMBA_DEVICE(uart0, "dev:f1", PBX_UART0, NULL);
AMBA_DEVICE(uart1, "dev:f2", PBX_UART1, NULL);
AMBA_DEVICE(uart2, "dev:f3", PBX_UART2, NULL);
AMBA_DEVICE(ssp0, "dev:f4", PBX_SSP, NULL);
AMBA_DEVICE(smc, "dev:smc", PBX_SMC, NULL);
AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL);
AMBA_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL);
AMBA_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data);
AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
AMBA_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL);
AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
AMBA_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL);
AMBA_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL);
AMBA_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL);
AMBA_DEVICE(ssp0, "dev:ssp0", PBX_SSP, NULL);
/* Primecells on the NEC ISSP chip */
AMBA_DEVICE(clcd, "issp:20", PBX_CLCD, &clcd_plat_data);
AMBA_DEVICE(dmac, "issp:30", DMAC, NULL);
AMBA_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data);
AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL);
static struct amba_device *amba_devs[] __initdata = {
&dmac_device,

5
arch/arm/mach-s3c2410/Kconfig
View file

@ -77,6 +77,7 @@ config ARCH_H1940
select CPU_S3C2410
select PM_H1940 if PM
select S3C_DEV_USB_HOST
select S3C_DEV_NAND
help
Say Y here if you are using the HP IPAQ H1940
@ -89,6 +90,7 @@ config MACH_N30
bool "Acer N30 family"
select CPU_S3C2410
select S3C_DEV_USB_HOST
select S3C_DEV_NAND
help
Say Y here if you want suppt for the Acer N30, Acer N35,
Navman PiN570, Yakumo AlphaX or Airis NC05 PDAs.
@ -103,6 +105,7 @@ config ARCH_BAST
select S3C24XX_DCLK
select ISA
select S3C_DEV_USB_HOST
select S3C_DEV_NAND
help
Say Y here if you are using the Simtec Electronics EB2410ITX
development board (also known as BAST)
@ -111,6 +114,7 @@ config MACH_OTOM
bool "NexVision OTOM Board"
select CPU_S3C2410
select S3C_DEV_USB_HOST
select S3C_DEV_NAND
help
Say Y here if you are using the Nex Vision OTOM board
@ -154,6 +158,7 @@ config MACH_QT2410
bool "QT2410"
select CPU_S3C2410
select S3C_DEV_USB_HOST
select S3C_DEV_NAND
help
Say Y here if you are using the Armzone QT2410

3
arch/arm/mach-s3c2412/Kconfig
View file

@ -48,6 +48,7 @@ config MACH_JIVE
bool "Logitech Jive"
select CPU_S3C2412
select S3C_DEV_USB_HOST
select S3C_DEV_NAND
help
Say Y here if you are using the Logitech Jive.
@ -61,6 +62,7 @@ config MACH_SMDK2413
select MACH_S3C2413
select MACH_SMDK
select S3C_DEV_USB_HOST
select S3C_DEV_NAND
help
Say Y here if you are using an SMDK2413
@ -84,6 +86,7 @@ config MACH_VSTMS
bool "VMSTMS"
select CPU_S3C2412
select S3C_DEV_USB_HOST
select S3C_DEV_NAND
help
Say Y here if you are using an VSTMS board

6
arch/arm/mach-s3c2440/Kconfig
View file

@ -48,6 +48,7 @@ config MACH_OSIRIS
select S3C2440_XTAL_12000000
select S3C2410_IOTIMING if S3C2440_CPUFREQ
select S3C_DEV_USB_HOST
select S3C_DEV_NAND
help
Say Y here if you are using the Simtec IM2440D20 module, also
known as the Osiris.
@ -57,6 +58,7 @@ config MACH_RX3715
select CPU_S3C2440
select S3C2440_XTAL_16934400
select PM_H1940 if PM
select S3C_DEV_NAND
help
Say Y here if you are using the HP iPAQ rx3715.
@ -66,6 +68,7 @@ config ARCH_S3C2440
select S3C2440_XTAL_16934400
select MACH_SMDK
select S3C_DEV_USB_HOST
select S3C_DEV_NAND
help
Say Y here if you are using the SMDK2440.
@ -74,6 +77,7 @@ config MACH_NEXCODER_2440
select CPU_S3C2440
select S3C2440_XTAL_12000000
select S3C_DEV_USB_HOST
select S3C_DEV_NAND
help
Say Y here if you are using the Nex Vision NEXCODER 2440 Light Board
@ -88,6 +92,7 @@ config MACH_AT2440EVB
bool "Avantech AT2440EVB development board"
select CPU_S3C2440
select S3C_DEV_USB_HOST
select S3C_DEV_NAND
help
Say Y here if you are using the AT2440EVB development board
@ -97,6 +102,7 @@ config MACH_MINI2440
select EEPROM_AT24
select LEDS_TRIGGER_BACKLIGHT
select SND_S3C24XX_SOC_S3C24XX_UDA134X
select S3C_DEV_NAND
help
Say Y here to select support for the MINI2440. Is a 10cm x 10cm board
available via various sources. It can come with a 3.5" or 7" touch LCD.

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