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[PATCH] x86-64: make GART PTEs uncacheable

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This patches fixes the silent data corruption problems being seen using the
GART iommu where 4kB of data where incorrect (seen mostly on Nvidia CK804
systems).  This fix, to mark the memory regin the GART PTEs reside on as
uncacheable, also brings the code in line with the AGP specification.

Signed-off-by: Joachim Deguara <joachim.deguara@amd.com>
Signed-off-by: Andi Kleen <ak@suse.de>
This commit is contained in:
Joachim Deguara 2007-04-24 13:05:36 +02:00 committed by Andi Kleen
parent c445a31cd7
commit cf6387daf8
1 changed files with 5 additions and 1 deletions
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6
arch/x86_64/kernel/pci-gart.c
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@ -519,7 +519,11 @@ static __init int init_k8_gatt(struct agp_kern_info *info)
gatt_size = (aper_size >> PAGE_SHIFT) * sizeof(u32);
gatt = (void *)__get_free_pages(GFP_KERNEL, get_order(gatt_size));
if (!gatt)
panic("Cannot allocate GATT table");
panic("Cannot allocate GATT table");
if (change_page_attr_addr((unsigned long)gatt, gatt_size >> PAGE_SHIFT, PAGE_KERNEL_NOCACHE))
panic("Could not set GART PTEs to uncacheable pages");
global_flush_tlb();
memset(gatt, 0, gatt_size);
agp_gatt_table = gatt;