From c934878cc09fdd4a06ffa554c5149b11d972456f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 6 Nov 2009 21:40:46 +0100 Subject: [PATCH] Serial: pxa: work around Errata #75 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Intel(R) PXA27x Processor Family Specification Update (Nov 2005) says: E75. UART: Baud rate may not be programmed correctly on back-to-back writes. Problem: When programming the Divisor Latch registers, Low and High (DLL and DLH), with back-to-back writes, the second register write may not take effect. The result is an incorrect baud rate. Workaround: After programming the first Divisor Latch register, read and verify it before programming the second Divisor Latch register. This was hit when changing the baud rate from 115200 to 9600 while receiving characters at 9600 Bd. And fixed indention of some comments nearby. Signed-off-by: Uwe Kleine-König Acked-by: Wolfram Sang Acked-by: Marc Kleine-Budde Cc: Eric Miao Cc: Alan Cox Cc: Mike Rapoport Signed-off-by: Greg Kroah-Hartman --- drivers/serial/pxa.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/serial/pxa.c b/drivers/serial/pxa.c index b8629d74f6a..4a821046baa 100644 --- a/drivers/serial/pxa.c +++ b/drivers/serial/pxa.c @@ -438,6 +438,7 @@ serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios, unsigned char cval, fcr = 0; unsigned long flags; unsigned int baud, quot; + unsigned int dll; switch (termios->c_cflag & CSIZE) { case CS5: @@ -534,10 +535,18 @@ serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios, else up->mcr &= ~UART_MCR_AFE; - serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */ + serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */ serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */ + + /* + * work around Errata #75 according to Intel(R) PXA27x Processor Family + * Specification Update (Nov 2005) + */ + dll = serial_in(up, UART_DLL); + WARN_ON(dll != (quot & 0xff)); + serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */ - serial_out(up, UART_LCR, cval); /* reset DLAB */ + serial_out(up, UART_LCR, cval); /* reset DLAB */ up->lcr = cval; /* Save LCR */ serial_pxa_set_mctrl(&up->port, up->port.mctrl); serial_out(up, UART_FCR, fcr);