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ata_piix: ICH7 does not support correct MWDMA timings
See Errata documentation. The recommended workaround is to use PIO4 instead which will we automatically do by flagging this mode not available. Signed-off-by: Alan Cox <alan.cox@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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1 changed files with 14 additions and 3 deletions
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@ -72,6 +72,7 @@
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* ICH2 spec c #20 - IDE PRD must not cross a 64K boundary
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* and must be dword aligned
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* ICH2 spec c #24 - UDMA mode 4,5 t85/86 should be 6ns not 3.3
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* ICH7 errata #16 - MWDMA1 timings are incorrect
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*
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* Should have been BIOS fixed:
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* 450NX: errata #19 - DMA hangs on old 450NX
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@ -94,7 +95,7 @@
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#include <linux/dmi.h>
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#define DRV_NAME "ata_piix"
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#define DRV_VERSION "2.12"
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#define DRV_VERSION "2.13"
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enum {
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PIIX_IOCFG = 0x54, /* IDE I/O configuration register */
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@ -136,6 +137,7 @@ enum piix_controller_ids {
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ich_pata_33, /* ICH up to UDMA 33 only */
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ich_pata_66, /* ICH up to 66 Mhz */
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ich_pata_100, /* ICH up to UDMA 100 */
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ich_pata_100_nomwdma1, /* ICH up to UDMA 100 but with no MWDMA1*/
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ich5_sata,
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ich6_sata,
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ich6m_sata,
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@ -216,8 +218,8 @@ static const struct pci_device_id piix_pci_tbl[] = {
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/* ICH6 (and 6) (i915) UDMA 100 */
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{ 0x8086, 0x266F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
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/* ICH7/7-R (i945, i975) UDMA 100*/
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{ 0x8086, 0x27DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
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{ 0x8086, 0x269E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
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{ 0x8086, 0x27DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100_nomwdma1 },
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{ 0x8086, 0x269E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100_nomwdma1 },
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/* ICH8 Mobile PATA Controller */
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{ 0x8086, 0x2850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
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@ -487,6 +489,15 @@ static struct ata_port_info piix_port_info[] = {
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.port_ops = &ich_pata_ops,
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},
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[ich_pata_100_nomwdma1] =
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{
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.flags = PIIX_PATA_FLAGS | PIIX_FLAG_CHECKINTR,
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.pio_mask = ATA_PIO4,
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.mwdma_mask = ATA_MWDMA2_ONLY,
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.udma_mask = ATA_UDMA5,
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.port_ops = &ich_pata_ops,
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},
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[ich5_sata] =
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{
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.flags = PIIX_SATA_FLAGS,
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