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MIPS: Loongson: Cleanups of serial port support

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This patchs uses a loongson_uart_base variable instead of the
uart_base[] array and adds a new kernel option to avoid to compile
uart_base.c all the time, which will save a little bit of memory for us.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
http://patchwork.linux-mips.org/patch/727/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Wu Zhangjin 2009-11-28 14:21:50 +08:00 committed by Ralf Baechle
parent c47a48d83a
commit c3d8d85019
6 changed files with 51 additions and 26 deletions
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14
arch/mips/include/asm/mach-loongson/loongson.h
View file

@ -31,9 +31,17 @@ extern void __init prom_init_memory(void);
extern void __init prom_init_cmdline(void);
extern void __init prom_init_machtype(void);
extern void __init prom_init_env(void);
extern unsigned long _loongson_uart_base;
extern unsigned long uart8250_base[];
extern void prom_init_uart_base(void);
#ifdef CONFIG_LOONGSON_UART_BASE
extern unsigned long _loongson_uart_base, loongson_uart_base;
extern void prom_init_loongson_uart_base(void);
#endif
static inline void prom_init_uart_base(void)
{
#ifdef CONFIG_LOONGSON_UART_BASE
prom_init_loongson_uart_base();
#endif
}
/* irq operation functions */
extern void bonito_irqdispatch(void);

5
arch/mips/loongson/Kconfig
View file

@ -78,3 +78,8 @@ config LOONGSON_SUSPEND
bool
default y
depends on CPU_SUPPORTS_CPUFREQ && SUSPEND
config LOONGSON_UART_BASE
bool
default y
depends on EARLY_PRINTK || SERIAL_8250

5
arch/mips/loongson/common/Makefile
View file

@ -3,13 +3,14 @@
#
obj-y += setup.o init.o cmdline.o env.o time.o reset.o irq.o \
pci.o bonito-irq.o mem.o machtype.o platform.o uart_base.o
pci.o bonito-irq.o mem.o machtype.o platform.o
#
# Early printk support
# Serial port support
#
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
obj-$(CONFIG_SERIAL_8250) += serial.o
obj-$(CONFIG_LOONGSON_UART_BASE) += uart_base.o
#
# Enable CS5536 Virtual Support Module(VSM) to virtulize the PCI configure

2
arch/mips/loongson/common/init.c
View file

@ -31,9 +31,7 @@ void __init prom_init(void)
prom_init_memory();
/*init the uart base address */
#if defined(CONFIG_EARLY_PRINTK) || defined(CONFIG_SERIAL_8250)
prom_init_uart_base();
#endif
}
void __init prom_free_prom_memory(void)

10
arch/mips/loongson/common/serial.c
View file

@ -57,12 +57,16 @@ static struct platform_device uart8250_device = {
static int __init serial_init(void)
{
if (uart8250_data[mips_machtype][0].iotype == UPIO_MEM)
unsigned char iotype;
iotype = uart8250_data[mips_machtype][0].iotype;
if (UPIO_MEM == iotype)
uart8250_data[mips_machtype][0].membase =
(void __iomem *)_loongson_uart_base;
else if (uart8250_data[mips_machtype][0].iotype == UPIO_PORT)
else if (UPIO_PORT == iotype)
uart8250_data[mips_machtype][0].iobase =
uart8250_base[mips_machtype] - LOONGSON_PCIIO_BASE;
loongson_uart_base - LOONGSON_PCIIO_BASE;
uart8250_device.dev.platform_data = uart8250_data[mips_machtype];

43
arch/mips/loongson/common/uart_base.c
View file

@ -13,24 +13,33 @@
#include <loongson.h>
unsigned long __maybe_unused _loongson_uart_base;
/* ioremapped */
unsigned long _loongson_uart_base;
EXPORT_SYMBOL(_loongson_uart_base);
/* raw */
unsigned long loongson_uart_base;
EXPORT_SYMBOL(loongson_uart_base);
unsigned long __maybe_unused uart8250_base[] = {
[MACH_LOONGSON_UNKNOWN] 0,
[MACH_LEMOTE_FL2E] (LOONGSON_PCIIO_BASE + 0x3f8),
[MACH_LEMOTE_FL2F] (LOONGSON_PCIIO_BASE + 0x2f8),
[MACH_LEMOTE_ML2F7] (LOONGSON_LIO1_BASE + 0x3f8),
[MACH_LEMOTE_YL2F89] (LOONGSON_LIO1_BASE + 0x3f8),
[MACH_DEXXON_GDIUM2F10] (LOONGSON_LIO1_BASE + 0x3f8),
[MACH_LEMOTE_NAS] (LOONGSON_LIO1_BASE + 0x3f8),
[MACH_LEMOTE_LL2F] (LOONGSON_PCIIO_BASE + 0x2f8),
[MACH_LOONGSON_END] 0,
};
EXPORT_SYMBOL(uart8250_base);
void __maybe_unused prom_init_uart_base(void)
void prom_init_loongson_uart_base(void)
{
_loongson_uart_base =
(unsigned long)ioremap_nocache(uart8250_base[mips_machtype], 8);
switch (mips_machtype) {
case MACH_LEMOTE_FL2E:
loongson_uart_base = LOONGSON_PCIIO_BASE + 0x3f8;
break;
case MACH_LEMOTE_FL2F:
case MACH_LEMOTE_LL2F:
loongson_uart_base = LOONGSON_PCIIO_BASE + 0x2f8;
break;
case MACH_LEMOTE_ML2F7:
case MACH_LEMOTE_YL2F89:
case MACH_DEXXON_GDIUM2F10:
case MACH_LEMOTE_NAS:
default:
/* The CPU provided serial port */
loongson_uart_base = LOONGSON_LIO1_BASE + 0x3f8;
break;
}
_loongson_uart_base =
(unsigned long)ioremap_nocache(loongson_uart_base, 8);
}