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system.c: runtime base address
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
parent
8db5d1a64d
commit
be124c9427
5 changed files with 19 additions and 9 deletions
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@ -41,6 +41,7 @@ static struct map_desc imx_io_desc[] __initdata = {
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void __init mx1_map_io(void)
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{
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mxc_set_cpu_type(MXC_CPU_MX1);
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mxc_arch_reset_init(IO_ADDRESS(WDT_BASE_ADDR));
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iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc));
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}
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@ -72,6 +72,7 @@ static struct map_desc mxc_io_desc[] __initdata = {
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void __init mx21_map_io(void)
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{
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mxc_set_cpu_type(MXC_CPU_MX21);
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mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
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iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
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}
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@ -79,6 +80,7 @@ void __init mx21_map_io(void)
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void __init mx27_map_io(void)
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{
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mxc_set_cpu_type(MXC_CPU_MX27);
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mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
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iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
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}
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@ -75,6 +75,7 @@ static struct map_desc mxc_io_desc[] __initdata = {
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void __init mx31_map_io(void)
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{
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mxc_set_cpu_type(MXC_CPU_MX31);
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mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
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iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
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}
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@ -82,6 +83,7 @@ void __init mx31_map_io(void)
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void __init mx35_map_io(void)
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{
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mxc_set_cpu_type(MXC_CPU_MX35);
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mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
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iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
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}
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@ -29,5 +29,6 @@ extern int mx35_clocks_init(void);
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extern int mxc_register_gpios(void);
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extern int mxc_register_device(struct platform_device *pdev, void *data);
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extern void mxc_set_cpu_type(unsigned int type);
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extern void mxc_arch_reset_init(void __iomem *);
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#endif
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@ -30,29 +30,28 @@
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#include <asm/proc-fns.h>
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#include <asm/system.h>
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#ifdef CONFIG_ARCH_MX1
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#define WDOG_WCR_REG IO_ADDRESS(WDT_BASE_ADDR)
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#define WDOG_WCR_ENABLE (1 << 0)
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#else
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#define WDOG_WCR_REG IO_ADDRESS(WDOG_BASE_ADDR)
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#define WDOG_WCR_ENABLE (1 << 2)
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#endif
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static void __iomem *wdog_base;
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/*
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* Reset the system. It is called by machine_restart().
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*/
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void arch_reset(char mode, const char *cmd)
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{
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if (!cpu_is_mx1()) {
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unsigned int wcr_enable;
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if (cpu_is_mx1()) {
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wcr_enable = (1 << 0);
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} else {
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struct clk *clk;
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clk = clk_get_sys("imx-wdt.0", NULL);
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if (!IS_ERR(clk))
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clk_enable(clk);
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wcr_enable = (1 << 2);
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}
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/* Assert SRS signal */
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__raw_writew(WDOG_WCR_ENABLE, WDOG_WCR_REG);
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__raw_writew(wcr_enable, wdog_base);
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/* wait for reset to assert... */
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mdelay(500);
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@ -65,3 +64,8 @@ void arch_reset(char mode, const char *cmd)
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/* we'll take a jump through zero as a poor second */
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cpu_reset(0);
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}
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void mxc_arch_reset_init(void __iomem *base)
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{
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wdog_base = base;
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}
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