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https://github.com/adulau/aha.git
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[PATCH] irq-flags: PPC: Use the new IRQF_ constants
Use the new IRQF_ constants and remove the SA_INTERRUPT define Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: "David S. Miller" <davem@davemloft.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
parent
6714465e83
commit
bc59d2800d
14 changed files with 31 additions and 28 deletions
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@ -2116,7 +2116,7 @@ init_fcc_startup(fcc_info_t *fip, struct net_device *dev)
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#ifdef PHY_INTERRUPT
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#ifdef CONFIG_ADS8272
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if (request_irq(PHY_INTERRUPT, mii_link_interrupt, SA_SHIRQ,
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if (request_irq(PHY_INTERRUPT, mii_link_interrupt, IRQF_SHARED,
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"mii", dev) < 0)
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printk(KERN_CRIT "Can't get MII IRQ %d\n", PHY_INTERRUPT);
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#else
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@ -131,7 +131,7 @@ static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs)
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static struct irqaction cpm2_irqaction = {
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.handler = cpm2_cascade,
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.flags = SA_INTERRUPT,
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.flags = IRQF_DISABLED,
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.mask = CPU_MASK_NONE,
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.name = "cpm2_cascade",
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};
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@ -136,7 +136,7 @@ static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs)
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static struct irqaction cpm2_irqaction = {
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.handler = cpm2_cascade,
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.flags = SA_INTERRUPT,
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.flags = IRQF_DISABLED,
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.mask = CPU_MASK_NONE,
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.name = "cpm2_cascade",
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};
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@ -166,7 +166,7 @@ static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs)
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static struct irqaction cpm2_irqaction = {
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.handler = cpm2_cascade,
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.flags = SA_INTERRUPT,
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.flags = IRQF_DISABLED,
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.mask = CPU_MASK_NONE,
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.name = "cpm2_cascade",
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};
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@ -190,7 +190,7 @@ static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs)
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static struct irqaction cpm2_irqaction = {
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.handler = cpm2_cascade,
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.flags = SA_INTERRUPT,
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.flags = IRQF_DISABLED,
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.mask = CPU_MASK_NONE,
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.name = "cpm2_cascade",
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};
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@ -837,7 +837,7 @@ static void smp_hdpu_setup_cpu(int cpu_nr)
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mv64x60_write(&bh, MV64360_CPU0_DOORBELL_CLR, 0xff);
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mv64x60_write(&bh, MV64360_CPU0_DOORBELL_MASK, 0xff);
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request_irq(60, hdpu_smp_cpu0_int_handler,
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SA_INTERRUPT, hdpu_smp0, 0);
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IRQF_DISABLED, hdpu_smp0, 0);
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}
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if (cpu_nr == 1) {
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@ -857,7 +857,7 @@ static void smp_hdpu_setup_cpu(int cpu_nr)
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mv64x60_write(&bh, MV64360_CPU1_DOORBELL_CLR, 0x0);
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mv64x60_write(&bh, MV64360_CPU1_DOORBELL_MASK, 0xff);
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request_irq(28, hdpu_smp_cpu1_int_handler,
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SA_INTERRUPT, hdpu_smp1, 0);
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IRQF_DISABLED, hdpu_smp1, 0);
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}
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}
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@ -1310,7 +1310,7 @@ static void ppc7d_init2(void)
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/* Hook up i8259 interrupt which is connected to GPP28 */
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request_irq(mv64360_irq_base + MV64x60_IRQ_GPP28, ppc7d_i8259_intr,
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SA_INTERRUPT, "I8259 (GPP28) interrupt", (void *)0);
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IRQF_DISABLED, "I8259 (GPP28) interrupt", (void *)0);
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/* Configure MPP16 as watchdog NMI, MPP17 as watchdog WDE */
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spin_lock_irqsave(&mv64x60_lock, flags);
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@ -145,7 +145,7 @@ static irqreturn_t sbc82xx_i8259_demux(int irq, void *dev_id, struct pt_regs *re
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static struct irqaction sbc82xx_i8259_irqaction = {
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.handler = sbc82xx_i8259_demux,
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.flags = SA_INTERRUPT,
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.flags = IRQF_DISABLED,
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.mask = CPU_MASK_NONE,
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.name = "i8259 demux",
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};
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@ -297,7 +297,7 @@ gt64260_register_hdlrs(void)
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/* Register CPU interface error interrupt handler */
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if ((rc = request_irq(MV64x60_IRQ_CPU_ERR,
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gt64260_cpu_error_int_handler, SA_INTERRUPT, CPU_INTR_STR, 0)))
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gt64260_cpu_error_int_handler, IRQF_DISABLED, CPU_INTR_STR, 0)))
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printk(KERN_WARNING "Can't register cpu error handler: %d", rc);
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mv64x60_write(&bh, MV64x60_CPU_ERR_MASK, 0);
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@ -305,7 +305,7 @@ gt64260_register_hdlrs(void)
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/* Register PCI 0 error interrupt handler */
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if ((rc = request_irq(MV64360_IRQ_PCI0, gt64260_pci_error_int_handler,
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SA_INTERRUPT, PCI0_INTR_STR, (void *)0)))
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IRQF_DISABLED, PCI0_INTR_STR, (void *)0)))
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printk(KERN_WARNING "Can't register pci 0 error handler: %d",
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rc);
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@ -314,7 +314,7 @@ gt64260_register_hdlrs(void)
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/* Register PCI 1 error interrupt handler */
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if ((rc = request_irq(MV64360_IRQ_PCI1, gt64260_pci_error_int_handler,
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SA_INTERRUPT, PCI1_INTR_STR, (void *)1)))
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IRQF_DISABLED, PCI1_INTR_STR, (void *)1)))
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printk(KERN_WARNING "Can't register pci 1 error handler: %d",
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rc);
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@ -149,7 +149,7 @@ void __init ibm440gx_l2c_enable(void){
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unsigned long flags;
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/* Install error handler */
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if (request_irq(87, l2c_error_handler, SA_INTERRUPT, "L2C", 0) < 0){
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if (request_irq(87, l2c_error_handler, IRQF_DISABLED, "L2C", 0) < 0){
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printk(KERN_ERR "Cannot install L2C error handler, cache is not enabled\n");
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return;
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}
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@ -139,7 +139,7 @@ pq2pci_irq_demux(int irq, void *dev_id, struct pt_regs *regs)
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static struct irqaction pq2pci_irqaction = {
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.handler = pq2pci_irq_demux,
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.flags = SA_INTERRUPT,
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.flags = IRQF_DISABLED,
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.mask = CPU_MASK_NONE,
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.name = "PQ2 PCI cascade",
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};
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@ -380,7 +380,7 @@ mv64360_register_hdlrs(void)
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/* Clear old errors and register CPU interface error intr handler */
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mv64x60_write(&bh, MV64x60_CPU_ERR_CAUSE, 0);
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if ((rc = request_irq(MV64x60_IRQ_CPU_ERR + mv64360_irq_base,
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mv64360_cpu_error_int_handler, SA_INTERRUPT, CPU_INTR_STR, 0)))
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mv64360_cpu_error_int_handler, IRQF_DISABLED, CPU_INTR_STR, 0)))
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printk(KERN_WARNING "Can't register cpu error handler: %d", rc);
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mv64x60_write(&bh, MV64x60_CPU_ERR_MASK, 0);
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@ -389,14 +389,14 @@ mv64360_register_hdlrs(void)
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/* Clear old errors and register internal SRAM error intr handler */
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mv64x60_write(&bh, MV64360_SRAM_ERR_CAUSE, 0);
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if ((rc = request_irq(MV64360_IRQ_SRAM_PAR_ERR + mv64360_irq_base,
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mv64360_sram_error_int_handler,SA_INTERRUPT,SRAM_INTR_STR, 0)))
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mv64360_sram_error_int_handler,IRQF_DISABLED,SRAM_INTR_STR, 0)))
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printk(KERN_WARNING "Can't register SRAM error handler: %d",rc);
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/* Clear old errors and register PCI 0 error intr handler */
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mv64x60_write(&bh, MV64x60_PCI0_ERR_CAUSE, 0);
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if ((rc = request_irq(MV64360_IRQ_PCI0 + mv64360_irq_base,
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mv64360_pci_error_int_handler,
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SA_INTERRUPT, PCI0_INTR_STR, (void *)0)))
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IRQF_DISABLED, PCI0_INTR_STR, (void *)0)))
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printk(KERN_WARNING "Can't register pci 0 error handler: %d",
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rc);
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@ -411,7 +411,7 @@ mv64360_register_hdlrs(void)
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mv64x60_write(&bh, MV64x60_PCI1_ERR_CAUSE, 0);
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if ((rc = request_irq(MV64360_IRQ_PCI1 + mv64360_irq_base,
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mv64360_pci_error_int_handler,
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SA_INTERRUPT, PCI1_INTR_STR, (void *)1)))
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IRQF_DISABLED, PCI1_INTR_STR, (void *)1)))
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printk(KERN_WARNING "Can't register pci 1 error handler: %d",
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rc);
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@ -575,18 +575,21 @@ void openpic_request_IPIs(void)
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if (OpenPIC == NULL)
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return;
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/* IPIs are marked SA_INTERRUPT as they must run with irqs disabled */
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/*
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* IPIs are marked IRQF_DISABLED as they must run with irqs
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* disabled
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*/
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request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset,
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openpic_ipi_action, SA_INTERRUPT,
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openpic_ipi_action, IRQF_DISABLED,
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"IPI0 (call function)", NULL);
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request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+1,
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openpic_ipi_action, SA_INTERRUPT,
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openpic_ipi_action, IRQF_DISABLED,
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"IPI1 (reschedule)", NULL);
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request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+2,
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openpic_ipi_action, SA_INTERRUPT,
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openpic_ipi_action, IRQF_DISABLED,
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"IPI2 (invalidate tlb)", NULL);
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request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+3,
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openpic_ipi_action, SA_INTERRUPT,
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openpic_ipi_action, IRQF_DISABLED,
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"IPI3 (xmon break)", NULL);
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for ( i = 0; i < OPENPIC_NUM_IPI ; i++ )
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@ -691,7 +694,7 @@ openpic_init_nmi_irq(u_int irq)
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static struct irqaction openpic_cascade_irqaction = {
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.handler = no_action,
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.flags = SA_INTERRUPT,
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.flags = IRQF_DISABLED,
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.mask = CPU_MASK_NONE,
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};
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@ -96,11 +96,11 @@ static int vdma_get_dma_residue(unsigned int dummy)
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static int fd_request_irq(void)
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{
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if (can_use_virtual_dma)
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return request_irq(FLOPPY_IRQ, floppy_hardint,SA_INTERRUPT,
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"floppy", NULL);
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return request_irq(FLOPPY_IRQ, floppy_hardint,
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IRQF_DISABLED, "floppy", NULL);
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else
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return request_irq(FLOPPY_IRQ, floppy_interrupt, SA_INTERRUPT,
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"floppy", NULL);
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return request_irq(FLOPPY_IRQ, floppy_interrupt,
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IRQF_DISABLED, "floppy", NULL);
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}
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static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)
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