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Blackfin arch: Fix bug - Run "reboot" hangs bf518-ezbrd

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[Mike Frysinger <vapier.adi@gmail.com>:
 - setup P_DEFAULT_BOOT_SPI_CS  for every arch based on
   the default bootrom behavior and convert all our boards
   to it
 - revert previous anomaly change ... bf51x is not affected
   by anomaly 05000353]

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
This commit is contained in:
Sonic Zhang 2009-02-04 16:49:45 +08:00 committed by Bryan Wu
parent 5b93e13ffa
commit b52dae3139
16 changed files with 19 additions and 15 deletions
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2
arch/blackfin/include/asm/reboot.h
View file

@ -15,6 +15,6 @@ extern void native_machine_halt(void);
extern void native_machine_power_off(void); extern void native_machine_power_off(void);
/* common reboot workarounds */ /* common reboot workarounds */
extern void bfin_gpio_reset_spi0_ssel1(void); extern void bfin_reset_boot_spi_cs(unsigned short pin);
#endif #endif

5
arch/blackfin/kernel/bfin_gpio.c
View file

@ -1172,10 +1172,9 @@ EXPORT_SYMBOL(bfin_gpio_get_value);
* lives here as we need to force all the GPIO states w/out going through * lives here as we need to force all the GPIO states w/out going through
* BUG() checks and such. * BUG() checks and such.
*/ */
void bfin_gpio_reset_spi0_ssel1(void) void bfin_reset_boot_spi_cs(unsigned short pin)
{ {
u16 gpio = P_IDENT(P_SPI0_SSEL1); unsigned short gpio = P_IDENT(pin);
port_setup(gpio, GPIO_USAGE); port_setup(gpio, GPIO_USAGE);
gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio); gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
AWA_DUMMY_READ(data_set); AWA_DUMMY_READ(data_set);

2
arch/blackfin/mach-bf518/boards/ezbrd.c
View file

@ -649,7 +649,7 @@ void native_machine_restart(char *cmd)
{ {
/* workaround reboot hang when booting from SPI */ /* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3) if ((bfin_read_SYSCR() & 0x7) == 0x3)
bfin_gpio_reset_spi0_ssel1(); bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
} }
void bfin_get_ether_addr(char *addr) void bfin_get_ether_addr(char *addr)

2
arch/blackfin/mach-bf518/include/mach/portmux.h
View file

@ -103,6 +103,8 @@
#define P_SPI1_SSEL4 (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(2)) #define P_SPI1_SSEL4 (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(2))
#define P_SPI1_SSEL5 (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(2)) #define P_SPI1_SSEL5 (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(2))
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2
/* SPORT Port Mux */ /* SPORT Port Mux */
#define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(0)) #define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(0))
#define P_SPORT0_RSCLK (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(0)) #define P_SPORT0_RSCLK (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(0))

2
arch/blackfin/mach-bf527/boards/cm_bf527.c
View file

@ -988,7 +988,7 @@ void native_machine_restart(char *cmd)
{ {
/* workaround reboot hang when booting from SPI */ /* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3) if ((bfin_read_SYSCR() & 0x7) == 0x3)
bfin_gpio_reset_spi0_ssel1(); bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
} }
void bfin_get_ether_addr(char *addr) void bfin_get_ether_addr(char *addr)

2
arch/blackfin/mach-bf527/boards/ezbrd.c
View file

@ -784,7 +784,7 @@ void native_machine_restart(char *cmd)
{ {
/* workaround reboot hang when booting from SPI */ /* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3) if ((bfin_read_SYSCR() & 0x7) == 0x3)
bfin_gpio_reset_spi0_ssel1(); bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
} }
void bfin_get_ether_addr(char *addr) void bfin_get_ether_addr(char *addr)

2
arch/blackfin/mach-bf527/boards/ezkit.c
View file

@ -1068,7 +1068,7 @@ void native_machine_restart(char *cmd)
{ {
/* workaround reboot hang when booting from SPI */ /* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3) if ((bfin_read_SYSCR() & 0x7) == 0x3)
bfin_gpio_reset_spi0_ssel1(); bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
} }
void bfin_get_ether_addr(char *addr) void bfin_get_ether_addr(char *addr)

2
arch/blackfin/mach-bf527/include/mach/portmux.h
View file

@ -73,6 +73,8 @@
#define P_HWAIT (P_DONTCARE) #define P_HWAIT (P_DONTCARE)
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1
#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0)) #define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0))
#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(2)) #define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(2))
#define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(2)) #define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(2))

5
arch/blackfin/mach-bf533/include/mach/portmux.h
View file

@ -54,14 +54,11 @@
#define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2)) #define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2))
#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1)) #define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1))
#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0)) #define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0))
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2
#define P_TMR2 (P_DONTCARE) #define P_TMR2 (P_DONTCARE)
#define P_TMR1 (P_DONTCARE) #define P_TMR1 (P_DONTCARE)
#define P_TMR0 (P_DONTCARE) #define P_TMR0 (P_DONTCARE)
#define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF1)) #define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF1))
#endif /* _MACH_PORTMUX_H_ */ #endif /* _MACH_PORTMUX_H_ */

2
arch/blackfin/mach-bf537/boards/generic_board.c
View file

@ -726,7 +726,7 @@ void native_machine_restart(char *cmd)
{ {
/* workaround reboot hang when booting from SPI */ /* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3) if ((bfin_read_SYSCR() & 0x7) == 0x3)
bfin_gpio_reset_spi0_ssel1(); bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
} }
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)

2
arch/blackfin/mach-bf537/boards/minotaur.c
View file

@ -377,5 +377,5 @@ void native_machine_restart(char *cmd)
{ {
/* workaround reboot hang when booting from SPI */ /* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3) if ((bfin_read_SYSCR() & 0x7) == 0x3)
bfin_gpio_reset_spi0_ssel1(); bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
} }

2
arch/blackfin/mach-bf537/boards/stamp.c
View file

@ -1307,7 +1307,7 @@ void native_machine_restart(char *cmd)
{ {
/* workaround reboot hang when booting from SPI */ /* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3) if ((bfin_read_SYSCR() & 0x7) == 0x3)
bfin_gpio_reset_spi0_ssel1(); bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
} }
/* /*

1
arch/blackfin/mach-bf537/include/mach/portmux.h
View file

@ -31,6 +31,7 @@
#define P_PPI0_FS1 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1)) #define P_PPI0_FS1 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1))
#define P_TACLK0 (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1)) #define P_TACLK0 (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1))
#define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1)) #define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1))
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1
#define P_PPI0_D0 (P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0)) #define P_PPI0_D0 (P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0))
#define P_PPI0_D1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0)) #define P_PPI0_D1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0))

1
arch/blackfin/mach-bf538/include/mach/portmux.h
View file

@ -102,5 +102,6 @@
#define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2)) #define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2))
#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1)) #define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1))
#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0)) #define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0))
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2
#endif /* _MACH_PORTMUX_H_ */ #endif /* _MACH_PORTMUX_H_ */

1
arch/blackfin/mach-bf548/include/mach/portmux.h
View file

@ -125,6 +125,7 @@
#define P_KEY_COL2 (P_DEFINED | P_IDENT(GPIO_PD14) | P_FUNCT(3)) #define P_KEY_COL2 (P_DEFINED | P_IDENT(GPIO_PD14) | P_FUNCT(3))
#define P_KEY_COL3 (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(3)) #define P_KEY_COL3 (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(3))
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1
#define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PE0) | P_FUNCT(0)) #define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PE0) | P_FUNCT(0))
#define P_SPI0_MISO (P_DEFINED | P_IDENT(GPIO_PE1) | P_FUNCT(0)) #define P_SPI0_MISO (P_DEFINED | P_IDENT(GPIO_PE1) | P_FUNCT(0))
#define P_SPI0_MOSI (P_DEFINED | P_IDENT(GPIO_PE2) | P_FUNCT(0)) #define P_SPI0_MOSI (P_DEFINED | P_IDENT(GPIO_PE2) | P_FUNCT(0))

1
arch/blackfin/mach-bf561/include/mach/portmux.h
View file

@ -85,5 +85,6 @@
#define P_SPI0_MOSI (P_DONTCARE) #define P_SPI0_MOSI (P_DONTCARE)
#define P_SPI0_MISO (P_DONTCARE) #define P_SPI0_MISO (P_DONTCARE)
#define P_SPI0_SCK (P_DONTCARE) #define P_SPI0_SCK (P_DONTCARE)
#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2
#endif /* _MACH_PORTMUX_H_ */ #endif /* _MACH_PORTMUX_H_ */