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[PATCH] i386: Some additional chipset register values validation.
On i945, a mmconfig range hitting the f0000000-ffffffff zone conflicts with the APIC registers and others. Consider it invalid. On E7520, values 0000 and f000 for the window register are defined invalid in the documentation. I haven't seen a bios use these values, but who trusts biosen these days? Signed-off-by: Olivier Galibert <galibert@pobox.com> Signed-off-by: Andi Kleen <ak@suse.de> arch/i386/pci/mmconfig-shared.c | 25 +++++++++++++++++-------- 1 file changed, 17 insertions(+), 8 deletions(-)
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6c2af35820
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1 changed files with 17 additions and 8 deletions
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@ -60,14 +60,19 @@ static const char __init *pci_mmcfg_e7520(void)
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u32 win;
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pci_conf1_read(0, 0, PCI_DEVFN(0,0), 0xce, 2, &win);
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pci_mmcfg_config_num = 1;
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pci_mmcfg_config = kzalloc(sizeof(pci_mmcfg_config[0]), GFP_KERNEL);
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if (!pci_mmcfg_config)
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return NULL;
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pci_mmcfg_config[0].address = (win & 0xf000) << 16;
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pci_mmcfg_config[0].pci_segment = 0;
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pci_mmcfg_config[0].start_bus_number = 0;
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pci_mmcfg_config[0].end_bus_number = 255;
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win = win & 0xf000;
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if(win == 0x0000 || win == 0xf000)
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pci_mmcfg_config_num = 0;
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else {
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pci_mmcfg_config_num = 1;
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pci_mmcfg_config = kzalloc(sizeof(pci_mmcfg_config[0]), GFP_KERNEL);
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if (!pci_mmcfg_config)
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return NULL;
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pci_mmcfg_config[0].address = win << 16;
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pci_mmcfg_config[0].pci_segment = 0;
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pci_mmcfg_config[0].start_bus_number = 0;
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pci_mmcfg_config[0].end_bus_number = 255;
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}
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return "Intel Corporation E7520 Memory Controller Hub";
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}
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@ -108,6 +113,10 @@ static const char __init *pci_mmcfg_intel_945(void)
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if ((pciexbar & mask) & 0x0fffffffU)
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pci_mmcfg_config_num = 0;
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/* Don't hit the APIC registers and their friends */
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if ((pciexbar & mask) >= 0xf0000000U)
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pci_mmcfg_config_num = 0;
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if (pci_mmcfg_config_num) {
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pci_mmcfg_config = kzalloc(sizeof(pci_mmcfg_config[0]), GFP_KERNEL);
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if (!pci_mmcfg_config)
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