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Add support for Eukrea's CPUIMX27
CPUIMX27 is built around Freescale's i.MX27 and has up to 64MB of NOR Flash, up to 512MB of NAND Flash and up to 256MB of mDDR, it includes an ethernet PHY in MII mode, an I2C RTC and a ST16554 QuadUART on nCS3. Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Eric Benard
Sascha Hauer
parent
627fb3b9d2
commit
af5b1df713
4 changed files with 275 additions and 1 deletions
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@ -53,6 +53,20 @@ config MACH_PCM970_BASEBOARD
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endchoice
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config MACH_EUKREA_CPUIMX27
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bool "Eukrea CPUIMX27 module"
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depends on MACH_MX27
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help
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Include support for Eukrea CPUIMX27 platform. This includes
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specific configurations for the module and its peripherals.
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config MACH_EUKREA_CPUIMX27_USESDHC2
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bool "CPUIMX27 integrates SDHC2 module"
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depends on MACH_EUKREA_CPUIMX27
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help
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This adds support for the internal SDHC2 used on CPUIMX27 used
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for wifi or eMMC.
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config MACH_MX27_3DS
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bool "MX27PDK platform"
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depends on MACH_MX27
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@ -17,4 +17,4 @@ obj-$(CONFIG_MACH_PCM038) += pcm038.o
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obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o
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obj-$(CONFIG_MACH_MX27_3DS) += mx27pdk.o
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obj-$(CONFIG_MACH_MX27LITE) += mx27lite.o
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obj-$(CONFIG_MACH_EUKREA_CPUIMX27) += eukrea_cpuimx27.o
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235
arch/arm/mach-mx2/eukrea_cpuimx27.c
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235
arch/arm/mach-mx2/eukrea_cpuimx27.c
Normal file
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@ -0,0 +1,235 @@
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/*
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* Copyright (C) 2009 Eric Benard - eric@eukrea.com
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*
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* Based on pcm038.c which is :
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* Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
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* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#include <linux/i2c.h>
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#include <linux/io.h>
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#include <linux/mtd/plat-ram.h>
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#include <linux/mtd/physmap.h>
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/mach/map.h>
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#include <mach/board-eukrea_cpuimx27.h>
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#include <mach/common.h>
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#include <mach/hardware.h>
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#include <mach/i2c.h>
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#include <mach/iomux.h>
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#include <mach/imx-uart.h>
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#include <mach/mxc_nand.h>
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#include "devices.h"
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static int eukrea_cpuimx27_pins[] = {
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/* UART1 */
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PE12_PF_UART1_TXD,
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PE13_PF_UART1_RXD,
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PE14_PF_UART1_CTS,
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PE15_PF_UART1_RTS,
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/* UART4 */
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PB26_AF_UART4_RTS,
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PB28_AF_UART4_TXD,
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PB29_AF_UART4_CTS,
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PB31_AF_UART4_RXD,
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/* FEC */
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PD0_AIN_FEC_TXD0,
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PD1_AIN_FEC_TXD1,
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PD2_AIN_FEC_TXD2,
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PD3_AIN_FEC_TXD3,
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PD4_AOUT_FEC_RX_ER,
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PD5_AOUT_FEC_RXD1,
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PD6_AOUT_FEC_RXD2,
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PD7_AOUT_FEC_RXD3,
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PD8_AF_FEC_MDIO,
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PD9_AIN_FEC_MDC,
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PD10_AOUT_FEC_CRS,
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PD11_AOUT_FEC_TX_CLK,
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PD12_AOUT_FEC_RXD0,
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PD13_AOUT_FEC_RX_DV,
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PD14_AOUT_FEC_RX_CLK,
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PD15_AOUT_FEC_COL,
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PD16_AIN_FEC_TX_ER,
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PF23_AIN_FEC_TX_EN,
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/* I2C1 */
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PD17_PF_I2C_DATA,
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PD18_PF_I2C_CLK,
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/* SDHC2 */
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PB4_PF_SD2_D0,
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PB5_PF_SD2_D1,
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PB6_PF_SD2_D2,
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PB7_PF_SD2_D3,
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PB8_PF_SD2_CMD,
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PB9_PF_SD2_CLK,
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#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
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/* Quad UART's IRQ */
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GPIO_PORTD | 22 | GPIO_GPIO | GPIO_IN,
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GPIO_PORTD | 23 | GPIO_GPIO | GPIO_IN,
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GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN,
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GPIO_PORTD | 30 | GPIO_GPIO | GPIO_IN,
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#endif
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};
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static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
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.width = 2,
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};
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static struct resource eukrea_cpuimx27_flash_resource = {
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.start = 0xc0000000,
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.end = 0xc3ffffff,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = &eukrea_cpuimx27_flash_data,
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},
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.num_resources = 1,
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.resource = &eukrea_cpuimx27_flash_resource,
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};
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static struct imxuart_platform_data uart_pdata[] = {
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{
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.flags = IMXUART_HAVE_RTSCTS,
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}, {
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.flags = IMXUART_HAVE_RTSCTS,
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},
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};
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static struct mxc_nand_platform_data eukrea_cpuimx27_nand_board_info = {
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.width = 1,
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.hw_ecc = 1,
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};
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static struct platform_device *platform_devices[] __initdata = {
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&eukrea_cpuimx27_nor_mtd_device,
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&mxc_fec_device,
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};
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static struct imxi2c_platform_data eukrea_cpuimx27_i2c_1_data = {
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.bitrate = 100000,
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};
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static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
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{
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I2C_BOARD_INFO("rtc-pcf8563", 0x51),
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.type = "pcf8563"
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},
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};
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#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
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static struct plat_serial8250_port serial_platform_data[] = {
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{
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.mapbase = (unsigned long)(CS3_BASE_ADDR + 0x200000),
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.irq = IRQ_GPIOB(23),
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.uartclk = 14745600,
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.regshift = 1,
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.iotype = UPIO_MEM,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
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}, {
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.mapbase = (unsigned long)(CS3_BASE_ADDR + 0x400000),
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.irq = IRQ_GPIOB(22),
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.uartclk = 14745600,
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.regshift = 1,
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.iotype = UPIO_MEM,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
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}, {
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.mapbase = (unsigned long)(CS3_BASE_ADDR + 0x800000),
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.irq = IRQ_GPIOB(27),
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.uartclk = 14745600,
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.regshift = 1,
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.iotype = UPIO_MEM,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
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}, {
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.mapbase = (unsigned long)(CS3_BASE_ADDR + 0x1000000),
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.irq = IRQ_GPIOB(30),
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.uartclk = 14745600,
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.regshift = 1,
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.iotype = UPIO_MEM,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
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}, {
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}
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};
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static struct platform_device serial_device = {
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.name = "serial8250",
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.id = 0,
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.dev = {
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.platform_data = serial_platform_data,
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},
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};
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#endif
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static void __init eukrea_cpuimx27_init(void)
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{
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mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
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ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");
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mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
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mxc_register_device(&mxc_nand_device, &eukrea_cpuimx27_nand_board_info);
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i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
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ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
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mxc_register_device(&mxc_i2c_device0, &eukrea_cpuimx27_i2c_1_data);
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platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
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#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
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/* SDHC2 can be used for Wifi */
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mxc_register_device(&mxc_sdhc_device1, NULL);
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/* in which case UART4 is also used for Bluetooth */
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mxc_register_device(&mxc_uart_device3, &uart_pdata[1]);
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#endif
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#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
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platform_device_register(&serial_device);
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#endif
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#ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
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eukrea_mbimx27_baseboard_init();
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#endif
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}
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static void __init eukrea_cpuimx27_timer_init(void)
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{
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mx27_clocks_init(26000000);
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}
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static struct sys_timer eukrea_cpuimx27_timer = {
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.init = eukrea_cpuimx27_timer_init,
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};
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MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
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.phys_io = AIPI_BASE_ADDR,
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.io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
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.boot_params = PHYS_OFFSET + 0x100,
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.map_io = mx27_map_io,
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.init_irq = mx27_init_irq,
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.init_machine = eukrea_cpuimx27_init,
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.timer = &eukrea_cpuimx27_timer,
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MACHINE_END
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25
arch/arm/plat-mxc/include/mach/board-eukrea_cpuimx27.h
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25
arch/arm/plat-mxc/include/mach/board-eukrea_cpuimx27.h
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@ -0,0 +1,25 @@
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/*
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* Copyright (C) 2009 Eric Benard - eric@eukrea.com
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*
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* Based on board-pcm038.h which is :
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* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#ifndef __ASM_ARCH_MXC_BOARD_EUKREA_CPUIMX27_H__
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#define __ASM_ARCH_MXC_BOARD_EUKREA_CPUIMX27_H__
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#endif /* __ASM_ARCH_MXC_BOARD_EUKREA_CPUIMX27_H__ */
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