mirror of
https://github.com/adulau/aha.git
synced 2025-01-02 14:13:18 +00:00
[IB] mthca: fix posting long lists of receive work requests
In Tavor mode, when posting a long list of receive work requests, a doorbell must be rung every 256 requests. Add code to do this when required. Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
This commit is contained in:
parent
64044bcf75
commit
ae57e24a40
3 changed files with 39 additions and 5 deletions
|
@ -1707,6 +1707,7 @@ int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
|
||||||
{
|
{
|
||||||
struct mthca_dev *dev = to_mdev(ibqp->device);
|
struct mthca_dev *dev = to_mdev(ibqp->device);
|
||||||
struct mthca_qp *qp = to_mqp(ibqp);
|
struct mthca_qp *qp = to_mqp(ibqp);
|
||||||
|
__be32 doorbell[2];
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
int err = 0;
|
int err = 0;
|
||||||
int nreq;
|
int nreq;
|
||||||
|
@ -1724,6 +1725,22 @@ int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
|
||||||
ind = qp->rq.next_ind;
|
ind = qp->rq.next_ind;
|
||||||
|
|
||||||
for (nreq = 0; wr; ++nreq, wr = wr->next) {
|
for (nreq = 0; wr; ++nreq, wr = wr->next) {
|
||||||
|
if (unlikely(nreq == MTHCA_TAVOR_MAX_WQES_PER_RECV_DB)) {
|
||||||
|
nreq = 0;
|
||||||
|
|
||||||
|
doorbell[0] = cpu_to_be32((qp->rq.next_ind << qp->rq.wqe_shift) | size0);
|
||||||
|
doorbell[1] = cpu_to_be32(qp->qpn << 8);
|
||||||
|
|
||||||
|
wmb();
|
||||||
|
|
||||||
|
mthca_write64(doorbell,
|
||||||
|
dev->kar + MTHCA_RECEIVE_DOORBELL,
|
||||||
|
MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock));
|
||||||
|
|
||||||
|
qp->rq.head += MTHCA_TAVOR_MAX_WQES_PER_RECV_DB;
|
||||||
|
size0 = 0;
|
||||||
|
}
|
||||||
|
|
||||||
if (mthca_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) {
|
if (mthca_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) {
|
||||||
mthca_err(dev, "RQ %06x full (%u head, %u tail,"
|
mthca_err(dev, "RQ %06x full (%u head, %u tail,"
|
||||||
" %d max, %d nreq)\n", qp->qpn,
|
" %d max, %d nreq)\n", qp->qpn,
|
||||||
|
@ -1781,8 +1798,6 @@ int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
|
||||||
|
|
||||||
out:
|
out:
|
||||||
if (likely(nreq)) {
|
if (likely(nreq)) {
|
||||||
__be32 doorbell[2];
|
|
||||||
|
|
||||||
doorbell[0] = cpu_to_be32((qp->rq.next_ind << qp->rq.wqe_shift) | size0);
|
doorbell[0] = cpu_to_be32((qp->rq.next_ind << qp->rq.wqe_shift) | size0);
|
||||||
doorbell[1] = cpu_to_be32((qp->qpn << 8) | nreq);
|
doorbell[1] = cpu_to_be32((qp->qpn << 8) | nreq);
|
||||||
|
|
||||||
|
|
|
@ -414,6 +414,7 @@ int mthca_tavor_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
|
||||||
{
|
{
|
||||||
struct mthca_dev *dev = to_mdev(ibsrq->device);
|
struct mthca_dev *dev = to_mdev(ibsrq->device);
|
||||||
struct mthca_srq *srq = to_msrq(ibsrq);
|
struct mthca_srq *srq = to_msrq(ibsrq);
|
||||||
|
__be32 doorbell[2];
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
int err = 0;
|
int err = 0;
|
||||||
int first_ind;
|
int first_ind;
|
||||||
|
@ -429,6 +430,25 @@ int mthca_tavor_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
|
||||||
first_ind = srq->first_free;
|
first_ind = srq->first_free;
|
||||||
|
|
||||||
for (nreq = 0; wr; ++nreq, wr = wr->next) {
|
for (nreq = 0; wr; ++nreq, wr = wr->next) {
|
||||||
|
if (unlikely(nreq == MTHCA_TAVOR_MAX_WQES_PER_RECV_DB)) {
|
||||||
|
nreq = 0;
|
||||||
|
|
||||||
|
doorbell[0] = cpu_to_be32(first_ind << srq->wqe_shift);
|
||||||
|
doorbell[1] = cpu_to_be32(srq->srqn << 8);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Make sure that descriptors are written
|
||||||
|
* before doorbell is rung.
|
||||||
|
*/
|
||||||
|
wmb();
|
||||||
|
|
||||||
|
mthca_write64(doorbell,
|
||||||
|
dev->kar + MTHCA_RECEIVE_DOORBELL,
|
||||||
|
MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock));
|
||||||
|
|
||||||
|
first_ind = srq->first_free;
|
||||||
|
}
|
||||||
|
|
||||||
ind = srq->first_free;
|
ind = srq->first_free;
|
||||||
|
|
||||||
if (ind < 0) {
|
if (ind < 0) {
|
||||||
|
@ -491,8 +511,6 @@ int mthca_tavor_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
|
||||||
}
|
}
|
||||||
|
|
||||||
if (likely(nreq)) {
|
if (likely(nreq)) {
|
||||||
__be32 doorbell[2];
|
|
||||||
|
|
||||||
doorbell[0] = cpu_to_be32(first_ind << srq->wqe_shift);
|
doorbell[0] = cpu_to_be32(first_ind << srq->wqe_shift);
|
||||||
doorbell[1] = cpu_to_be32((srq->srqn << 8) | nreq);
|
doorbell[1] = cpu_to_be32((srq->srqn << 8) | nreq);
|
||||||
|
|
||||||
|
|
|
@ -49,7 +49,8 @@ enum {
|
||||||
};
|
};
|
||||||
|
|
||||||
enum {
|
enum {
|
||||||
MTHCA_INVAL_LKEY = 0x100
|
MTHCA_INVAL_LKEY = 0x100,
|
||||||
|
MTHCA_TAVOR_MAX_WQES_PER_RECV_DB = 256
|
||||||
};
|
};
|
||||||
|
|
||||||
struct mthca_next_seg {
|
struct mthca_next_seg {
|
||||||
|
|
Loading…
Reference in a new issue